Lines Matching full:rx0
681 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
685 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
695 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1861 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
3159 SND_SOC_DAPM_MUX("RX_MACRO RX0 MUX", SND_SOC_NOPM, RX_MACRO_RX0, 0,
3298 {"RX_MACRO RX0 MUX", "AIF1_PB", "RX AIF1 PB"},
3305 {"RX_MACRO RX0 MUX", "AIF2_PB", "RX AIF2 PB"},
3312 {"RX_MACRO RX0 MUX", "AIF3_PB", "RX AIF3 PB"},
3319 {"RX_MACRO RX0 MUX", "AIF4_PB", "RX AIF4 PB"},
3326 {"RX_RX0", NULL, "RX_MACRO RX0 MUX"},
3333 {"RX INT0_1 MIX1 INP0", "RX0", "RX_RX0"},
3343 {"RX INT0_1 MIX1 INP1", "RX0", "RX_RX0"},
3353 {"RX INT0_1 MIX1 INP2", "RX0", "RX_RX0"},
3364 {"RX INT1_1 MIX1 INP0", "RX0", "RX_RX0"},
3374 {"RX INT1_1 MIX1 INP1", "RX0", "RX_RX0"},
3384 {"RX INT1_1 MIX1 INP2", "RX0", "RX_RX0"},
3395 {"RX INT2_1 MIX1 INP0", "RX0", "RX_RX0"},
3405 {"RX INT2_1 MIX1 INP1", "RX0", "RX_RX0"},
3415 {"RX INT2_1 MIX1 INP2", "RX0", "RX_RX0"},
3451 {"RX INT0_2 MUX", "RX0", "RX_RX0"},
3461 {"RX INT1_2 MUX", "RX0", "RX_RX0"},
3471 {"RX INT2_2 MUX", "RX0", "RX_RX0"},
3510 {"IIR0 INP0 MUX", "RX0", "RX_RX0"},
3521 {"IIR0 INP1 MUX", "RX0", "RX_RX0"},
3532 {"IIR0 INP2 MUX", "RX0", "RX_RX0"},
3543 {"IIR0 INP3 MUX", "RX0", "RX_RX0"},
3556 {"IIR1 INP0 MUX", "RX0", "RX_RX0"},
3567 {"IIR1 INP1 MUX", "RX0", "RX_RX0"},
3578 {"IIR1 INP2 MUX", "RX0", "RX_RX0"},
3589 {"IIR1 INP3 MUX", "RX0", "RX_RX0"},