Lines Matching +full:switch +full:- +full:freq +full:- +full:select
1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l52.c -- CS42L52 ALSA SoC audio driver
28 #include <sound/soc-dapm.h>
60 { CS42L52_ADC_PGA_A, 0x80 }, /* r08 Input A Select */
61 { CS42L52_ADC_PGA_B, 0x80 }, /* r09 Input B Select */
63 { CS42L52_ADC_HPF_FREQ, 0x00 }, /* r0B ADC HPF Corner Freq */
80 { CS42L52_BEEP_FREQ, 0x00 }, /* r1C Beep Freq on Time */
108 switch (reg) { in cs42l52_readable_register()
118 switch (reg) { in cs42l52_volatile_register()
130 static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0);
132 static DECLARE_TLV_DB_SCALE(hpd_tlv, -9600, 50, 1);
134 static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0);
138 static DECLARE_TLV_DB_SCALE(pga_tlv, -600, 50, 0);
140 static DECLARE_TLV_DB_SCALE(pass_tlv, -6000, 50, 0);
142 static DECLARE_TLV_DB_SCALE(mix_tlv, -5150, 50, 0);
144 static DECLARE_TLV_DB_SCALE(beep_tlv, -56, 200, 0);
147 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0),
148 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0)
256 "-34dB", "-37dB", "-40dB", "-43dB",
257 "-46dB", "-52dB", "-58dB", "-64dB"
325 SOC_DAPM_SINGLE("Switch", CS42L52_MISC_CTL, 6, 1, 0);
328 SOC_DAPM_SINGLE("Switch", CS42L52_MISC_CTL, 7, 1, 0);
331 SOC_DAPM_SINGLE("Switch", CS42L52_PWRCTL3, 0, 1, 1);
334 SOC_DAPM_SINGLE("Switch", CS42L52_PWRCTL3, 2, 1, 1);
337 SOC_DAPM_SINGLE("Switch", CS42L52_PWRCTL3, 4, 1, 1);
340 SOC_DAPM_SINGLE("Switch", CS42L52_PWRCTL3, 6, 1, 1);
371 SOC_DOUBLE("ADC Switch", CS42L52_ADC_MISC_CTL, 0, 1, 1, 0),
373 SOC_DOUBLE_R("ADC Mixer Switch", CS42L52_ADCA_MIXER_VOL,
382 SOC_DOUBLE_R("PCM Mixer Switch",
391 SOC_SINGLE("Beep Mixer Switch", CS42L52_BEEP_TONE_CTL, 5, 1, 1),
392 SOC_ENUM("Beep Treble Corner Freq", beep_treble_enum),
393 SOC_ENUM("Beep Bass Corner Freq", beep_bass_enum),
395 SOC_SINGLE("Tone Control Switch", CS42L52_BEEP_TONE_CTL, 0, 1, 1),
411 SOC_SINGLE("Limiter SR Switch", CS42L52_LIMITER_CTL1, 1, 1, 0),
412 SOC_SINGLE("Limiter ZC Switch", CS42L52_LIMITER_CTL1, 0, 1, 0),
413 SOC_SINGLE("Limiter Switch", CS42L52_LIMITER_CTL2, 7, 1, 0),
425 SOC_DOUBLE_R("ALC SR Capture Switch", CS42L52_PGAA_CTL,
427 SOC_DOUBLE_R("ALC ZC Capture Switch", CS42L52_PGAA_CTL,
429 SOC_DOUBLE("ALC Capture Switch", CS42L52_ALC_CTL, 6, 7, 1, 0),
432 SOC_ENUM("NG Type Switch", ng_type_enum),
433 SOC_SINGLE("NG Enable Switch", CS42L52_NOISE_GATE_CTL, 6, 1, 0),
434 SOC_SINGLE("NG Boost Switch", CS42L52_NOISE_GATE_CTL, 5, 1, 1),
438 SOC_DOUBLE("HPF Switch", CS42L52_ANALOG_HPF_CTL, 5, 7, 1, 0),
440 SOC_DOUBLE("Analog SR Switch", CS42L52_ANALOG_HPF_CTL, 1, 3, 1, 1),
441 SOC_DOUBLE("Analog ZC Switch", CS42L52_ANALOG_HPF_CTL, 0, 2, 1, 1),
442 SOC_SINGLE("Digital SR Switch", CS42L52_MISC_CTL, 1, 1, 0),
443 SOC_SINGLE("Digital ZC Switch", CS42L52_MISC_CTL, 0, 1, 0),
444 SOC_SINGLE("Deemphasis Switch", CS42L52_MISC_CTL, 2, 1, 0),
446 SOC_SINGLE("Batt Compensation Switch", CS42L52_BATT_COMPEN, 7, 1, 0),
447 SOC_SINGLE("Batt VP Monitor Switch", CS42L52_BATT_COMPEN, 6, 1, 0),
450 SOC_SINGLE("PGA AIN1L Switch", CS42L52_ADC_PGA_A, 0, 1, 0),
451 SOC_SINGLE("PGA AIN1R Switch", CS42L52_ADC_PGA_B, 0, 1, 0),
452 SOC_SINGLE("PGA AIN2L Switch", CS42L52_ADC_PGA_A, 1, 1, 0),
453 SOC_SINGLE("PGA AIN2R Switch", CS42L52_ADC_PGA_B, 1, 1, 0),
455 SOC_SINGLE("PGA AIN3L Switch", CS42L52_ADC_PGA_A, 2, 1, 0),
456 SOC_SINGLE("PGA AIN3R Switch", CS42L52_ADC_PGA_B, 2, 1, 0),
458 SOC_SINGLE("PGA AIN4L Switch", CS42L52_ADC_PGA_A, 3, 1, 0),
459 SOC_SINGLE("PGA AIN4R Switch", CS42L52_ADC_PGA_B, 3, 1, 0),
461 SOC_SINGLE("PGA MICA Switch", CS42L52_ADC_PGA_A, 4, 1, 0),
462 SOC_SINGLE("PGA MICB Switch", CS42L52_ADC_PGA_B, 4, 1, 0),
467 SOC_ENUM("MICA Select", mica_enum),
471 SOC_ENUM("MICB Select", micb_enum),
477 struct cs42l52_platform_data *pdata = &cs42l52->pdata; in cs42l52_add_mic_controls()
479 if (!pdata->mica_diff_cfg) in cs42l52_add_mic_controls()
483 if (!pdata->micb_diff_cfg) in cs42l52_add_mic_controls()
590 {"PGA Left", "Switch", "AIN1L"},
591 {"PGA Right", "Switch", "AIN1R"},
592 {"PGA Left", "Switch", "AIN2L"},
593 {"PGA Right", "Switch", "AIN2R"},
594 {"PGA Left", "Switch", "AIN3L"},
595 {"PGA Right", "Switch", "AIN3R"},
596 {"PGA Left", "Switch", "AIN4L"},
597 {"PGA Right", "Switch", "AIN4R"},
599 {"PGA Left", "Switch", "PGA MICA"},
602 {"PGA Right", "Switch", "PGA MICB"},
609 {"Bypass Left", "Switch", "PGA Left"},
610 {"Bypass Right", "Switch", "PGA Right"},
611 {"HP Left Amp", "Switch", "DAC Left"},
612 {"HP Right Amp", "Switch", "DAC Right"},
619 {"SPK Left Amp", "Switch", "Playback"},
620 {"SPK Right Amp", "Switch", "Playback"},
699 int i, ret = -EINVAL; in cs42l52_get_clk()
705 if (abs(mclk - mclk1) < abs(mclk - mclk2)) { in cs42l52_get_clk()
715 int clk_id, unsigned int freq, int dir) in cs42l52_set_sysclk() argument
717 struct snd_soc_component *component = codec_dai->component; in cs42l52_set_sysclk()
720 if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) { in cs42l52_set_sysclk()
721 cs42l52->sysclk = freq; in cs42l52_set_sysclk()
723 dev_err(component->dev, "Invalid freq parameter\n"); in cs42l52_set_sysclk()
724 return -EINVAL; in cs42l52_set_sysclk()
731 struct snd_soc_component *component = codec_dai->component; in cs42l52_set_fmt()
735 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { in cs42l52_set_fmt()
743 return -EINVAL; in cs42l52_set_fmt()
747 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { in cs42l52_set_fmt()
765 return -EINVAL; in cs42l52_set_fmt()
769 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { in cs42l52_set_fmt()
781 return -EINVAL; in cs42l52_set_fmt()
783 cs42l52->config.format = iface; in cs42l52_set_fmt()
784 snd_soc_component_write(component, CS42L52_IFACE_CTL1, cs42l52->config.format); in cs42l52_set_fmt()
791 struct snd_soc_component *component = dai->component; in cs42l52_mute()
809 struct snd_soc_component *component = dai->component; in cs42l52_pcm_hw_params()
814 index = cs42l52_get_clk(cs42l52->sysclk, params_rate(params)); in cs42l52_pcm_hw_params()
816 cs42l52->sysclk = clk_map_table[index].mclk; in cs42l52_pcm_hw_params()
826 dev_err(component->dev, "can't get correct mclk\n"); in cs42l52_pcm_hw_params()
827 return -EINVAL; in cs42l52_pcm_hw_params()
838 switch (level) { in cs42l52_set_bias_level()
847 regcache_cache_only(cs42l52->regmap, false); in cs42l52_set_bias_level()
848 regcache_sync(cs42l52->regmap); in cs42l52_set_bias_level()
854 regcache_cache_only(cs42l52->regmap, true); in cs42l52_set_bias_level()
904 struct snd_soc_component *component = cs42l52->component; in cs42l52_beep_work()
910 if (cs42l52->beep_rate) { in cs42l52_beep_work()
912 if (abs(cs42l52->beep_rate - beep_rates[i]) < in cs42l52_beep_work()
913 abs(cs42l52->beep_rate - beep_rates[best])) in cs42l52_beep_work()
917 dev_dbg(component->dev, "Set beep rate %dHz for requested %dHz\n", in cs42l52_beep_work()
918 beep_rates[best], cs42l52->beep_rate); in cs42l52_beep_work()
924 dev_dbg(component->dev, "Disabling beep\n"); in cs42l52_beep_work()
934 /* For usability define a way of injecting beep events for the device -
943 dev_dbg(component->dev, "Beep event %x %x\n", code, hz); in cs42l52_beep_event()
945 switch (code) { in cs42l52_beep_event()
953 return -1; in cs42l52_beep_event()
957 cs42l52->beep_rate = hz; in cs42l52_beep_event()
958 schedule_work(&cs42l52->beep_work); in cs42l52_beep_event()
973 input_event(cs42l52->beep, EV_SND, SND_TONE, time); in beep_store()
985 cs42l52->beep = devm_input_allocate_device(component->dev); in cs42l52_init_beep()
986 if (!cs42l52->beep) { in cs42l52_init_beep()
987 dev_err(component->dev, "Failed to allocate beep device\n"); in cs42l52_init_beep()
991 INIT_WORK(&cs42l52->beep_work, cs42l52_beep_work); in cs42l52_init_beep()
992 cs42l52->beep_rate = 0; in cs42l52_init_beep()
994 cs42l52->beep->name = "CS42L52 Beep Generator"; in cs42l52_init_beep()
995 cs42l52->beep->phys = dev_name(component->dev); in cs42l52_init_beep()
996 cs42l52->beep->id.bustype = BUS_I2C; in cs42l52_init_beep()
998 cs42l52->beep->evbit[0] = BIT_MASK(EV_SND); in cs42l52_init_beep()
999 cs42l52->beep->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE); in cs42l52_init_beep()
1000 cs42l52->beep->event = cs42l52_beep_event; in cs42l52_init_beep()
1001 cs42l52->beep->dev.parent = component->dev; in cs42l52_init_beep()
1002 input_set_drvdata(cs42l52->beep, component); in cs42l52_init_beep()
1004 ret = input_register_device(cs42l52->beep); in cs42l52_init_beep()
1006 cs42l52->beep = NULL; in cs42l52_init_beep()
1007 dev_err(component->dev, "Failed to register beep device\n"); in cs42l52_init_beep()
1010 ret = device_create_file(component->dev, &dev_attr_beep); in cs42l52_init_beep()
1012 dev_err(component->dev, "Failed to create keyclick file: %d\n", in cs42l52_init_beep()
1021 device_remove_file(component->dev, &dev_attr_beep); in cs42l52_free_beep()
1022 cancel_work_sync(&cs42l52->beep_work); in cs42l52_free_beep()
1023 cs42l52->beep = NULL; in cs42l52_free_beep()
1033 regcache_cache_only(cs42l52->regmap, true); in cs42l52_probe()
1039 cs42l52->sysclk = CS42L52_DEFAULT_CLK; in cs42l52_probe()
1040 cs42l52->config.format = CS42L52_DEFAULT_FORMAT; in cs42l52_probe()
1093 struct cs42l52_platform_data *pdata = dev_get_platdata(&i2c_client->dev); in cs42l52_i2c_probe()
1099 cs42l52 = devm_kzalloc(&i2c_client->dev, sizeof(*cs42l52), GFP_KERNEL); in cs42l52_i2c_probe()
1101 return -ENOMEM; in cs42l52_i2c_probe()
1102 cs42l52->dev = &i2c_client->dev; in cs42l52_i2c_probe()
1104 cs42l52->regmap = devm_regmap_init_i2c(i2c_client, &cs42l52_regmap); in cs42l52_i2c_probe()
1105 if (IS_ERR(cs42l52->regmap)) { in cs42l52_i2c_probe()
1106 ret = PTR_ERR(cs42l52->regmap); in cs42l52_i2c_probe()
1107 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); in cs42l52_i2c_probe()
1111 cs42l52->pdata = *pdata; in cs42l52_i2c_probe()
1113 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata), in cs42l52_i2c_probe()
1116 return -ENOMEM; in cs42l52_i2c_probe()
1118 if (i2c_client->dev.of_node) { in cs42l52_i2c_probe()
1119 if (of_property_read_bool(i2c_client->dev.of_node, in cs42l52_i2c_probe()
1120 "cirrus,mica-differential-cfg")) in cs42l52_i2c_probe()
1121 pdata->mica_diff_cfg = true; in cs42l52_i2c_probe()
1123 if (of_property_read_bool(i2c_client->dev.of_node, in cs42l52_i2c_probe()
1124 "cirrus,micb-differential-cfg")) in cs42l52_i2c_probe()
1125 pdata->micb_diff_cfg = true; in cs42l52_i2c_probe()
1127 if (of_property_read_u32(i2c_client->dev.of_node, in cs42l52_i2c_probe()
1128 "cirrus,micbias-lvl", &val32) >= 0) in cs42l52_i2c_probe()
1129 pdata->micbias_lvl = val32; in cs42l52_i2c_probe()
1131 if (of_property_read_u32(i2c_client->dev.of_node, in cs42l52_i2c_probe()
1132 "cirrus,chgfreq-divisor", &val32) >= 0) in cs42l52_i2c_probe()
1133 pdata->chgfreq = val32; in cs42l52_i2c_probe()
1135 pdata->reset_gpio = in cs42l52_i2c_probe()
1136 of_get_named_gpio(i2c_client->dev.of_node, in cs42l52_i2c_probe()
1137 "cirrus,reset-gpio", 0); in cs42l52_i2c_probe()
1139 cs42l52->pdata = *pdata; in cs42l52_i2c_probe()
1142 if (cs42l52->pdata.reset_gpio) { in cs42l52_i2c_probe()
1143 ret = devm_gpio_request_one(&i2c_client->dev, in cs42l52_i2c_probe()
1144 cs42l52->pdata.reset_gpio, in cs42l52_i2c_probe()
1148 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", in cs42l52_i2c_probe()
1149 cs42l52->pdata.reset_gpio, ret); in cs42l52_i2c_probe()
1152 gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 0); in cs42l52_i2c_probe()
1153 gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 1); in cs42l52_i2c_probe()
1158 ret = regmap_register_patch(cs42l52->regmap, cs42l52_threshold_patch, in cs42l52_i2c_probe()
1161 dev_warn(cs42l52->dev, "Failed to apply regmap patch: %d\n", in cs42l52_i2c_probe()
1164 ret = regmap_read(cs42l52->regmap, CS42L52_CHIP, ®); in cs42l52_i2c_probe()
1166 dev_err(&i2c_client->dev, "Failed to read chip ID: %d\n", ret); in cs42l52_i2c_probe()
1172 ret = -ENODEV; in cs42l52_i2c_probe()
1173 dev_err(&i2c_client->dev, in cs42l52_i2c_probe()
1179 dev_info(&i2c_client->dev, "Cirrus Logic CS42L52, Revision: %02X\n", in cs42l52_i2c_probe()
1183 if (cs42l52->pdata.mica_diff_cfg) in cs42l52_i2c_probe()
1184 regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, in cs42l52_i2c_probe()
1186 cs42l52->pdata.mica_diff_cfg << in cs42l52_i2c_probe()
1189 if (cs42l52->pdata.micb_diff_cfg) in cs42l52_i2c_probe()
1190 regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, in cs42l52_i2c_probe()
1192 cs42l52->pdata.micb_diff_cfg << in cs42l52_i2c_probe()
1195 if (cs42l52->pdata.chgfreq) in cs42l52_i2c_probe()
1196 regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP, in cs42l52_i2c_probe()
1198 cs42l52->pdata.chgfreq << in cs42l52_i2c_probe()
1201 if (cs42l52->pdata.micbias_lvl) in cs42l52_i2c_probe()
1202 regmap_update_bits(cs42l52->regmap, CS42L52_IFACE_CTL2, in cs42l52_i2c_probe()
1204 cs42l52->pdata.micbias_lvl); in cs42l52_i2c_probe()
1206 return devm_snd_soc_register_component(&i2c_client->dev, in cs42l52_i2c_probe()