soc/codecs/cs42l52.c

152 	"Input1A", "Input2A", "Input3A", "Input4A", "PGA Input Left"};
155 	"Input1B", "Input2B", "Input3B", "Input4B", "PGA Input Right"};
376 	SOC_DOUBLE_R_SX_TLV("PGA Volume", CS42L52_PGAA_CTL,
450 	SOC_SINGLE("PGA AIN1L Switch", CS42L52_ADC_PGA_A, 0, 1, 0),
451 	SOC_SINGLE("PGA AIN1R Switch", CS42L52_ADC_PGA_B, 0, 1, 0),
452 	SOC_SINGLE("PGA AIN2L Switch", CS42L52_ADC_PGA_A, 1, 1, 0),
453 	SOC_SINGLE("PGA AIN2R Switch", CS42L52_ADC_PGA_B, 1, 1, 0),
455 	SOC_SINGLE("PGA AIN3L Switch", CS42L52_ADC_PGA_A, 2, 1, 0),
456 	SOC_SINGLE("PGA AIN3R Switch", CS42L52_ADC_PGA_B, 2, 1, 0),
458 	SOC_SINGLE("PGA AIN4L Switch", CS42L52_ADC_PGA_A, 3, 1, 0),
459 	SOC_SINGLE("PGA AIN4R Switch", CS42L52_ADC_PGA_B, 3, 1, 0),
461 	SOC_SINGLE("PGA MICA Switch", CS42L52_ADC_PGA_A, 4, 1, 0),
462 	SOC_SINGLE("PGA MICB Switch", CS42L52_ADC_PGA_B, 4, 1, 0),
511 	SND_SOC_DAPM_PGA("PGA Left", CS42L52_PWRCTL1, 3, 1, NULL, 0),
512 	SND_SOC_DAPM_PGA("PGA Right", CS42L52_PWRCTL1, 4, 1, NULL, 0),
525 	SND_SOC_DAPM_PGA("PGA MICA", CS42L52_PWRCTL2, 1, 1, NULL, 0),
526 	SND_SOC_DAPM_PGA("PGA MICB", CS42L52_PWRCTL2, 2, 1, NULL, 0),
587 	{"ADC Left Mux", "PGA Input Left", "PGA Left"},
588 	{"ADC Right Mux", "PGA Input Right" , "PGA Right"},
590 	{"PGA Left", "Switch", "AIN1L"},
591 	{"PGA Right", "Switch", "AIN1R"},
592 	{"PGA Left", "Switch", "AIN2L"},
593 	{"PGA Right", "Switch", "AIN2R"},
594 	{"PGA Left", "Switch", "AIN3L"},
595 	{"PGA Right", "Switch", "AIN3R"},
596 	{"PGA Left", "Switch", "AIN4L"},
597 	{"PGA Right", "Switch", "AIN4R"},
599 	{"PGA Left", "Switch", "PGA MICA"},
600 	{"PGA MICA", NULL, "MICA"},
602 	{"PGA Right", "Switch", "PGA MICB"},
603 	{"PGA MICB", NULL, "MICB"},
609 	{"Bypass Left", "Switch", "PGA Left"},
610 	{"Bypass Right", "Switch", "PGA Right"},