Lines Matching +full:0 +full:x000000
46 { CS42L42_FRZ_CTL, 0x00 },
47 { CS42L42_SRC_CTL, 0x10 },
48 { CS42L42_MCLK_CTL, 0x02 },
49 { CS42L42_SFTRAMP_RATE, 0xA4 },
50 { CS42L42_SLOW_START_ENABLE, 0x70 },
51 { CS42L42_I2C_DEBOUNCE, 0x88 },
52 { CS42L42_I2C_STRETCH, 0x03 },
53 { CS42L42_I2C_TIMEOUT, 0xB7 },
54 { CS42L42_PWR_CTL1, 0xFF },
55 { CS42L42_PWR_CTL2, 0x84 },
56 { CS42L42_PWR_CTL3, 0x20 },
57 { CS42L42_RSENSE_CTL1, 0x40 },
58 { CS42L42_RSENSE_CTL2, 0x00 },
59 { CS42L42_OSC_SWITCH, 0x00 },
60 { CS42L42_RSENSE_CTL3, 0x1B },
61 { CS42L42_TSENSE_CTL, 0x1B },
62 { CS42L42_TSRS_INT_DISABLE, 0x00 },
63 { CS42L42_HSDET_CTL1, 0x77 },
64 { CS42L42_HSDET_CTL2, 0x00 },
65 { CS42L42_HS_SWITCH_CTL, 0xF3 },
66 { CS42L42_HS_CLAMP_DISABLE, 0x00 },
67 { CS42L42_MCLK_SRC_SEL, 0x00 },
68 { CS42L42_SPDIF_CLK_CFG, 0x00 },
69 { CS42L42_FSYNC_PW_LOWER, 0x00 },
70 { CS42L42_FSYNC_PW_UPPER, 0x00 },
71 { CS42L42_FSYNC_P_LOWER, 0xF9 },
72 { CS42L42_FSYNC_P_UPPER, 0x00 },
73 { CS42L42_ASP_CLK_CFG, 0x00 },
74 { CS42L42_ASP_FRM_CFG, 0x10 },
75 { CS42L42_FS_RATE_EN, 0x00 },
76 { CS42L42_IN_ASRC_CLK, 0x00 },
77 { CS42L42_OUT_ASRC_CLK, 0x00 },
78 { CS42L42_PLL_DIV_CFG1, 0x00 },
79 { CS42L42_ADC_OVFL_INT_MASK, 0x01 },
80 { CS42L42_MIXER_INT_MASK, 0x0F },
81 { CS42L42_SRC_INT_MASK, 0x0F },
82 { CS42L42_ASP_RX_INT_MASK, 0x1F },
83 { CS42L42_ASP_TX_INT_MASK, 0x0F },
84 { CS42L42_CODEC_INT_MASK, 0x03 },
85 { CS42L42_SRCPL_INT_MASK, 0x7F },
86 { CS42L42_VPMON_INT_MASK, 0x01 },
87 { CS42L42_PLL_LOCK_INT_MASK, 0x01 },
88 { CS42L42_TSRS_PLUG_INT_MASK, 0x0F },
89 { CS42L42_PLL_CTL1, 0x00 },
90 { CS42L42_PLL_DIV_FRAC0, 0x00 },
91 { CS42L42_PLL_DIV_FRAC1, 0x00 },
92 { CS42L42_PLL_DIV_FRAC2, 0x00 },
93 { CS42L42_PLL_DIV_INT, 0x40 },
94 { CS42L42_PLL_CTL3, 0x10 },
95 { CS42L42_PLL_CAL_RATIO, 0x80 },
96 { CS42L42_PLL_CTL4, 0x03 },
97 { CS42L42_LOAD_DET_EN, 0x00 },
98 { CS42L42_HSBIAS_SC_AUTOCTL, 0x03 },
99 { CS42L42_WAKE_CTL, 0xC0 },
100 { CS42L42_ADC_DISABLE_MUTE, 0x00 },
101 { CS42L42_TIPSENSE_CTL, 0x02 },
102 { CS42L42_MISC_DET_CTL, 0x03 },
103 { CS42L42_MIC_DET_CTL1, 0x1F },
104 { CS42L42_MIC_DET_CTL2, 0x2F },
105 { CS42L42_DET_INT1_MASK, 0xE0 },
106 { CS42L42_DET_INT2_MASK, 0xFF },
107 { CS42L42_HS_BIAS_CTL, 0xC2 },
108 { CS42L42_ADC_CTL, 0x00 },
109 { CS42L42_ADC_VOLUME, 0x00 },
110 { CS42L42_ADC_WNF_HPF_CTL, 0x71 },
111 { CS42L42_DAC_CTL1, 0x00 },
112 { CS42L42_DAC_CTL2, 0x02 },
113 { CS42L42_HP_CTL, 0x0D },
114 { CS42L42_CLASSH_CTL, 0x07 },
115 { CS42L42_MIXER_CHA_VOL, 0x3F },
116 { CS42L42_MIXER_ADC_VOL, 0x3F },
117 { CS42L42_MIXER_CHB_VOL, 0x3F },
118 { CS42L42_EQ_COEF_IN0, 0x00 },
119 { CS42L42_EQ_COEF_IN1, 0x00 },
120 { CS42L42_EQ_COEF_IN2, 0x00 },
121 { CS42L42_EQ_COEF_IN3, 0x00 },
122 { CS42L42_EQ_COEF_RW, 0x00 },
123 { CS42L42_EQ_COEF_OUT0, 0x00 },
124 { CS42L42_EQ_COEF_OUT1, 0x00 },
125 { CS42L42_EQ_COEF_OUT2, 0x00 },
126 { CS42L42_EQ_COEF_OUT3, 0x00 },
127 { CS42L42_EQ_INIT_STAT, 0x00 },
128 { CS42L42_EQ_START_FILT, 0x00 },
129 { CS42L42_EQ_MUTE_CTL, 0x00 },
130 { CS42L42_SP_RX_CH_SEL, 0x04 },
131 { CS42L42_SP_RX_ISOC_CTL, 0x04 },
132 { CS42L42_SP_RX_FS, 0x8C },
133 { CS42l42_SPDIF_CH_SEL, 0x0E },
134 { CS42L42_SP_TX_ISOC_CTL, 0x04 },
135 { CS42L42_SP_TX_FS, 0xCC },
136 { CS42L42_SPDIF_SW_CTL1, 0x3F },
137 { CS42L42_SRC_SDIN_FS, 0x40 },
138 { CS42L42_SRC_SDOUT_FS, 0x40 },
139 { CS42L42_SPDIF_CTL1, 0x01 },
140 { CS42L42_SPDIF_CTL2, 0x00 },
141 { CS42L42_SPDIF_CTL3, 0x00 },
142 { CS42L42_SPDIF_CTL4, 0x42 },
143 { CS42L42_ASP_TX_SZ_EN, 0x00 },
144 { CS42L42_ASP_TX_CH_EN, 0x00 },
145 { CS42L42_ASP_TX_CH_AP_RES, 0x0F },
146 { CS42L42_ASP_TX_CH1_BIT_MSB, 0x00 },
147 { CS42L42_ASP_TX_CH1_BIT_LSB, 0x00 },
148 { CS42L42_ASP_TX_HIZ_DLY_CFG, 0x00 },
149 { CS42L42_ASP_TX_CH2_BIT_MSB, 0x00 },
150 { CS42L42_ASP_TX_CH2_BIT_LSB, 0x00 },
151 { CS42L42_ASP_RX_DAI0_EN, 0x00 },
152 { CS42L42_ASP_RX_DAI0_CH1_AP_RES, 0x03 },
153 { CS42L42_ASP_RX_DAI0_CH1_BIT_MSB, 0x00 },
154 { CS42L42_ASP_RX_DAI0_CH1_BIT_LSB, 0x00 },
155 { CS42L42_ASP_RX_DAI0_CH2_AP_RES, 0x03 },
156 { CS42L42_ASP_RX_DAI0_CH2_BIT_MSB, 0x00 },
157 { CS42L42_ASP_RX_DAI0_CH2_BIT_LSB, 0x00 },
158 { CS42L42_ASP_RX_DAI0_CH3_AP_RES, 0x03 },
159 { CS42L42_ASP_RX_DAI0_CH3_BIT_MSB, 0x00 },
160 { CS42L42_ASP_RX_DAI0_CH3_BIT_LSB, 0x00 },
161 { CS42L42_ASP_RX_DAI0_CH4_AP_RES, 0x03 },
162 { CS42L42_ASP_RX_DAI0_CH4_BIT_MSB, 0x00 },
163 { CS42L42_ASP_RX_DAI0_CH4_BIT_LSB, 0x00 },
164 { CS42L42_ASP_RX_DAI1_CH1_AP_RES, 0x03 },
165 { CS42L42_ASP_RX_DAI1_CH1_BIT_MSB, 0x00 },
166 { CS42L42_ASP_RX_DAI1_CH1_BIT_LSB, 0x00 },
167 { CS42L42_ASP_RX_DAI1_CH2_AP_RES, 0x03 },
168 { CS42L42_ASP_RX_DAI1_CH2_BIT_MSB, 0x00 },
169 { CS42L42_ASP_RX_DAI1_CH2_BIT_LSB, 0x00 },
370 .range_min = 0,
373 .selector_mask = 0xff,
374 .selector_shift = 0,
375 .window_start = 0,
410 switch (ucontrol->value.integer.value[0]) { in cs42l42_slow_start_put()
411 case 0: in cs42l42_slow_start_put()
412 val = 0; in cs42l42_slow_start_put()
469 0x3f, 1, mixer_tlv),
498 return 0; in cs42l42_hp_adc_ev()
506 SND_SOC_DAPM_MIXER("MIXER", CS42L42_PWR_CTL1, CS42L42_MIXER_PDN_SHIFT, 1, NULL, 0),
507 SND_SOC_DAPM_AIF_IN("SDIN1", NULL, 0, SND_SOC_NOPM, 0, 0),
508 SND_SOC_DAPM_AIF_IN("SDIN2", NULL, 1, SND_SOC_NOPM, 0, 0),
511 SND_SOC_DAPM_SUPPLY("ASP DAI0", CS42L42_PWR_CTL1, CS42L42_ASP_DAI_PDN_SHIFT, 1, NULL, 0),
517 SND_SOC_DAPM_AIF_OUT("SDOUT1", NULL, 0, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH1_SHIFT, 0),
518 SND_SOC_DAPM_AIF_OUT("SDOUT2", NULL, 1, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH2_SHIFT, 0),
521 SND_SOC_DAPM_SUPPLY("ASP DAO0", CS42L42_PWR_CTL1, CS42L42_ASP_DAO_PDN_SHIFT, 1, NULL, 0),
522 SND_SOC_DAPM_SUPPLY("ASP TX EN", CS42L42_ASP_TX_SZ_EN, CS42L42_ASP_TX_EN_SHIFT, 0, NULL, 0),
525 SND_SOC_DAPM_SUPPLY("SCLK", CS42L42_ASP_CLK_CFG, CS42L42_ASP_SCLK_EN_SHIFT, 0, NULL, 0),
528 SND_SOC_DAPM_PGA("DACSRC", CS42L42_PWR_CTL2, CS42L42_DAC_SRC_PDNB_SHIFT, 0, NULL, 0),
529 SND_SOC_DAPM_PGA("ADCSRC", CS42L42_PWR_CTL2, CS42L42_ADC_SRC_PDNB_SHIFT, 0, NULL, 0),
586 return 0; in cs42l42_set_jack()
614 .def = 0,
637 { 1411200, 1, 0x00, 0x80, 0x000000, 0x03, 0x10, 11289600, 128, 2},
638 { 1536000, 1, 0x00, 0x7D, 0x000000, 0x03, 0x10, 12000000, 125, 2},
639 { 2304000, 1, 0x00, 0x55, 0xC00000, 0x02, 0x10, 12288000, 85, 2},
640 { 2400000, 1, 0x00, 0x50, 0x000000, 0x03, 0x10, 12000000, 80, 2},
641 { 2822400, 1, 0x00, 0x40, 0x000000, 0x03, 0x10, 11289600, 128, 1},
642 { 3000000, 1, 0x00, 0x40, 0x000000, 0x03, 0x10, 12000000, 128, 1},
643 { 3072000, 1, 0x00, 0x3E, 0x800000, 0x03, 0x10, 12000000, 125, 1},
644 { 4000000, 1, 0x00, 0x30, 0x800000, 0x03, 0x10, 12000000, 96, 1},
645 { 4096000, 1, 0x00, 0x2E, 0xE00000, 0x03, 0x10, 12000000, 94, 1},
646 { 4800000, 1, 0x01, 0x50, 0x000000, 0x03, 0x10, 12000000, 80, 2},
647 { 4800000, 1, 0x01, 0x50, 0x000000, 0x01, 0x10, 12288000, 82, 2},
648 { 5644800, 1, 0x01, 0x40, 0x000000, 0x03, 0x10, 11289600, 128, 1},
649 { 6000000, 1, 0x01, 0x40, 0x000000, 0x03, 0x10, 12000000, 128, 1},
650 { 6144000, 1, 0x01, 0x3E, 0x800000, 0x03, 0x10, 12000000, 125, 1},
651 { 6144000, 1, 0x01, 0x40, 0x000000, 0x03, 0x10, 12288000, 128, 1},
652 { 9600000, 1, 0x02, 0x50, 0x000000, 0x03, 0x10, 12000000, 80, 2},
653 { 9600000, 1, 0x02, 0x50, 0x000000, 0x01, 0x10, 12288000, 82, 2},
654 { 11289600, 0, 0, 0, 0, 0, 0, 11289600, 0, 1},
655 { 12000000, 0, 0, 0, 0, 0, 0, 12000000, 0, 1},
656 { 12288000, 0, 0, 0, 0, 0, 0, 12288000, 0, 1},
657 { 19200000, 1, 0x03, 0x50, 0x000000, 0x03, 0x10, 12000000, 80, 2},
658 { 19200000, 1, 0x03, 0x50, 0x000000, 0x01, 0x10, 12288000, 82, 2},
659 { 22579200, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 11289600, 128, 1},
660 { 24000000, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 12000000, 128, 1},
661 { 24576000, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 12288000, 128, 1}
673 return 0; in cs42l42_pll_config()
678 for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) { in cs42l42_pll_config()
694 if (pll_ratio_table[i].mclk_src_sel == 0) { in cs42l42_pll_config()
698 CS42L42_PLL_START_MASK, 0); in cs42l42_pll_config()
745 return 0; in cs42l42_pll_config()
793 if (((fsync * sample_rate) != sclk) || ((fsync % 2) != 0)) { in cs42l42_asp_config()
824 return 0; in cs42l42_asp_config()
830 u32 asp_cfg_val = 0; in cs42l42_set_dai_fmt()
886 return 0; in cs42l42_set_dai_fmt()
900 return 0; in cs42l42_dai_startup()
917 unsigned int slot_width = 0; in cs42l42_pcm_hw_params()
918 unsigned int val = 0; in cs42l42_pcm_hw_params()
937 bclk = snd_soc_tdm_params_to_bclk(params, slot_width, 0, 2); in cs42l42_pcm_hw_params()
988 return 0; in cs42l42_pcm_hw_params()
998 if (freq == 0) { in cs42l42_set_sysclk()
999 cs42l42->sclk = 0; in cs42l42_set_sysclk()
1000 return 0; in cs42l42_set_sysclk()
1003 for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) { in cs42l42_set_sysclk()
1006 return 0; in cs42l42_set_sysclk()
1023 return 0; in cs42l42_set_bclk_ratio()
1056 0); in cs42l42_mute_stream()
1060 CS42L42_PLL_START_MASK, 0); in cs42l42_mute_stream()
1092 if (ret < 0) in cs42l42_mute_stream()
1113 0); in cs42l42_mute_stream()
1117 return 0; in cs42l42_mute_stream()
1171 (0 << CS42L42_HSDET_SET_SHIFT) | in cs42l42_manual_hs_type_detect()
1172 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_manual_hs_type_detect()
1173 (0 << CS42L42_HSDET_AUTO_TIME_SHIFT)); in cs42l42_manual_hs_type_detect()
1246 (0 << CS42L42_HSDET_CTRL_SHIFT) | in cs42l42_manual_hs_type_detect()
1247 (0 << CS42L42_HSDET_SET_SHIFT) | in cs42l42_manual_hs_type_detect()
1248 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_manual_hs_type_detect()
1249 (0 << CS42L42_HSDET_AUTO_TIME_SHIFT)); in cs42l42_manual_hs_type_detect()
1289 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_process_hs_type_detect()
1312 (0 << CS42L42_HSBIAS_SENSE_EN_SHIFT) | in cs42l42_process_hs_type_detect()
1313 (0 << CS42L42_AUTO_HSBIAS_HIZ_SHIFT) | in cs42l42_process_hs_type_detect()
1314 (0 << CS42L42_TIP_SENSE_EN_SHIFT) | in cs42l42_process_hs_type_detect()
1324 (0 << CS42L42_EVENT_STAT_SEL_SHIFT) | in cs42l42_process_hs_type_detect()
1325 (cs42l42->bias_thresholds[0] << in cs42l42_process_hs_type_detect()
1337 (0 << CS42L42_TIP_SENSE_EN_SHIFT) | in cs42l42_process_hs_type_detect()
1346 (0 << CS42L42_PDN_MIC_LVL_DET_SHIFT)); in cs42l42_process_hs_type_detect()
1362 (0 << CS42L42_M_DETECT_TF_SHIFT) | in cs42l42_process_hs_type_detect()
1363 (0 << CS42L42_M_DETECT_FT_SHIFT) | in cs42l42_process_hs_type_detect()
1364 (0 << CS42L42_M_HSBIAS_HIZ_SHIFT) | in cs42l42_process_hs_type_detect()
1384 (0 << CS42L42_HPOUT_PULLDOWN_SHIFT) | in cs42l42_process_hs_type_detect()
1385 (0 << CS42L42_HPOUT_LOAD_SHIFT) | in cs42l42_process_hs_type_detect()
1386 (0 << CS42L42_HPOUT_CLAMP_SHIFT) | in cs42l42_process_hs_type_detect()
1388 (0 << CS42L42_DAC_MON_EN_SHIFT)); in cs42l42_process_hs_type_detect()
1395 (0 << CS42L42_TS_PLUG_SHIFT) | in cs42l42_process_hs_type_detect()
1396 (0 << CS42L42_TS_UNPLUG_SHIFT)); in cs42l42_process_hs_type_detect()
1424 (0 << CS42L42_HSBIAS_SENSE_EN_SHIFT) | in cs42l42_init_hs_type_detect()
1425 (0 << CS42L42_AUTO_HSBIAS_HIZ_SHIFT) | in cs42l42_init_hs_type_detect()
1426 (0 << CS42L42_TIP_SENSE_EN_SHIFT) | in cs42l42_init_hs_type_detect()
1436 (0 << CS42L42_HSDET_CTRL_SHIFT) | in cs42l42_init_hs_type_detect()
1438 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_init_hs_type_detect()
1449 (0 << CS42L42_HPOUT_LOAD_SHIFT) | in cs42l42_init_hs_type_detect()
1471 (0 << CS42L42_HSDET_AUTO_DONE_SHIFT)); in cs42l42_init_hs_type_detect()
1482 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_init_hs_type_detect()
1517 (0 << CS42L42_HSBIAS_SENSE_EN_SHIFT) | in cs42l42_cancel_hs_type_detect()
1518 (0 << CS42L42_AUTO_HSBIAS_HIZ_SHIFT) | in cs42l42_cancel_hs_type_detect()
1519 (0 << CS42L42_TIP_SENSE_EN_SHIFT) | in cs42l42_cancel_hs_type_detect()
1529 (0 << CS42L42_HSDET_CTRL_SHIFT) | in cs42l42_cancel_hs_type_detect()
1531 (0 << CS42L42_HSBIAS_REF_SHIFT) | in cs42l42_cancel_hs_type_detect()
1567 (0 << CS42L42_EVENT_STAT_SEL_SHIFT) | in cs42l42_handle_button_press()
1594 bias_level = 0; in cs42l42_handle_button_press()
1605 (0 << CS42L42_EVENT_STAT_SEL_SHIFT) | in cs42l42_handle_button_press()
1606 (cs42l42->bias_thresholds[0] << CS42L42_HS_DET_LEVEL_SHIFT)); in cs42l42_handle_button_press()
1620 (0 << CS42L42_M_DETECT_TF_SHIFT) | in cs42l42_handle_button_press()
1621 (0 << CS42L42_M_DETECT_FT_SHIFT) | in cs42l42_handle_button_press()
1622 (0 << CS42L42_M_HSBIAS_HIZ_SHIFT) | in cs42l42_handle_button_press()
1680 for (i = 0; i < ARRAY_SIZE(stickies); i++) { in cs42l42_irq_thread()
1744 snd_soc_jack_report(cs42l42->jack, 0, in cs42l42_irq_thread()
1765 snd_soc_jack_report(cs42l42->jack, 0, in cs42l42_irq_thread()
1884 (0 << CS42L42_TS_PLUG_SHIFT) | in cs42l42_set_interrupt_masks()
1885 (0 << CS42L42_TS_UNPLUG_SHIFT)); in cs42l42_set_interrupt_masks()
1895 * DETECT_MODE must always be 0 with ADC and HP both off otherwise the in cs42l42_setup_hs_type_detect()
1899 CS42L42_DETECT_MODE_MASK, 0); in cs42l42_setup_hs_type_detect()
1907 (0 << CS42L42_EVENT_STAT_SEL_SHIFT) | in cs42l42_setup_hs_type_detect()
1908 (cs42l42->bias_thresholds[0] << in cs42l42_setup_hs_type_detect()
2060 for (i = 0; i < CS42L42_NUM_BIASES; i++) { in cs42l42_handle_device_data()
2071 for (i = 0; i < CS42L42_NUM_BIASES; i++) in cs42l42_handle_device_data()
2112 cs42l42->hs_bias_sense_en = 0; in cs42l42_handle_device_data()
2116 return 0; in cs42l42_handle_device_data()
2121 REG_SEQ0(CS42L42_MIC_DET_CTL1, 0x9F),
2122 REG_SEQ0(CS42L42_ADC_OVFL_INT_MASK, 0x01),
2123 REG_SEQ0(CS42L42_MIXER_INT_MASK, 0x0F),
2124 REG_SEQ0(CS42L42_SRC_INT_MASK, 0x0F),
2125 REG_SEQ0(CS42L42_ASP_RX_INT_MASK, 0x1F),
2126 REG_SEQ0(CS42L42_ASP_TX_INT_MASK, 0x0F),
2127 REG_SEQ0(CS42L42_CODEC_INT_MASK, 0x03),
2128 REG_SEQ0(CS42L42_SRCPL_INT_MASK, 0x7F),
2129 REG_SEQ0(CS42L42_VPMON_INT_MASK, 0x01),
2130 REG_SEQ0(CS42L42_PLL_LOCK_INT_MASK, 0x01),
2131 REG_SEQ0(CS42L42_TSRS_PLUG_INT_MASK, 0x0F),
2132 REG_SEQ0(CS42L42_WAKE_CTL, 0xE1),
2133 REG_SEQ0(CS42L42_DET_INT1_MASK, 0xE0),
2134 REG_SEQ0(CS42L42_DET_INT2_MASK, 0xFF),
2135 REG_SEQ0(CS42L42_MIXER_CHA_VOL, 0x3F),
2136 REG_SEQ0(CS42L42_MIXER_ADC_VOL, 0x3F),
2137 REG_SEQ0(CS42L42_MIXER_CHB_VOL, 0x3F),
2138 REG_SEQ0(CS42L42_HP_CTL, 0x0F),
2139 REG_SEQ0(CS42L42_ASP_RX_DAI0_EN, 0x00),
2140 REG_SEQ0(CS42L42_ASP_CLK_CFG, 0x00),
2141 REG_SEQ0(CS42L42_HSDET_CTL2, 0x00),
2142 REG_SEQ0(CS42L42_PWR_CTL1, 0xFE),
2143 REG_SEQ0(CS42L42_PWR_CTL2, 0x8C),
2144 REG_SEQ0(CS42L42_DAC_CTL2, 0x02),
2145 REG_SEQ0(CS42L42_HS_CLAMP_DISABLE, 0x00),
2146 REG_SEQ0(CS42L42_MISC_DET_CTL, 0x03),
2147 REG_SEQ0(CS42L42_TIPSENSE_CTL, 0x02),
2148 REG_SEQ0(CS42L42_HSBIAS_SC_AUTOCTL, 0x03),
2149 REG_SEQ0(CS42L42_PWR_CTL1, 0xFF)
2160 return 0; in cs42l42_suspend()
2171 for (i = 0; i < ARRAY_SIZE(cs42l42_shutdown_seq); ++i) { in cs42l42_suspend()
2199 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0); in cs42l42_suspend()
2203 for (i = 0; i < ARRAY_SIZE(cs42l42_shutdown_seq); ++i) in cs42l42_suspend()
2211 return 0; in cs42l42_suspend()
2222 return 0; in cs42l42_resume()
2233 if (ret != 0) { in cs42l42_resume()
2243 return 0; in cs42l42_resume()
2276 return 0; in cs42l42_i2c_resume()
2289 for (i = 0; i < ARRAY_SIZE(cs42l42->supplies); i++) in cs42l42_common_probe()
2295 if (ret != 0) { in cs42l42_common_probe()
2303 if (ret != 0) { in cs42l42_common_probe()
2324 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0); in cs42l42_common_probe()
2357 if (ret < 0) in cs42l42_common_probe()
2360 return 0; in cs42l42_common_probe()
2367 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0); in cs42l42_common_probe()
2382 if (devid < 0) { in cs42l42_init()
2392 cs42l42->devid & 0xff, devid, cs42l42->devid); in cs42l42_init()
2397 if (ret < 0) { in cs42l42_init()
2404 cs42l42->devid & 0xff, reg & 0xFF); in cs42l42_init()
2421 (0 << CS42L42_PDN_ALL_SHIFT)); in cs42l42_init()
2424 if (ret != 0) in cs42l42_init()
2451 return 0; in cs42l42_init()
2454 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff); in cs42l42_init()
2455 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff); in cs42l42_init()
2456 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff); in cs42l42_init()
2462 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0); in cs42l42_init()
2479 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff); in cs42l42_common_remove()
2480 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff); in cs42l42_common_remove()
2481 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff); in cs42l42_common_remove()
2484 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0); in cs42l42_common_remove()