Lines Matching +full:input +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2013 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
125 static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1);
126 static const DECLARE_TLV_DB_SCALE(adau1761_diff_in_tlv, -1200, 75, 0);
127 static const DECLARE_TLV_DB_SCALE(adau1761_out_tlv, -5700, 100, 0);
128 static const DECLARE_TLV_DB_SCALE(adau1761_sidetone_tlv, -1800, 300, 1);
129 static const DECLARE_TLV_DB_SCALE(adau1761_boost_tlv, -600, 600, 1);
130 static const DECLARE_TLV_DB_SCALE(adau1761_pga_boost_tlv, -2000, 2000, 1);
132 static const DECLARE_TLV_DB_SCALE(adau1761_alc_max_gain_tlv, -1200, 600, 0);
133 static const DECLARE_TLV_DB_SCALE(adau1761_alc_target_tlv, -2850, 150, 0);
134 static const DECLARE_TLV_DB_SCALE(adau1761_alc_ng_threshold_tlv, -7650, 150, 0);
260 SOC_SINGLE("Speaker Auto-mute Switch", ADAU1761_DIGMIC_JACKDETECT,
292 SOC_SINGLE_TLV("Input 1 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
294 SOC_SINGLE_TLV("Input 2 Capture Volume", ADAU1761_REC_MIXER_LEFT0,
296 SOC_SINGLE_TLV("Input 3 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
298 SOC_SINGLE_TLV("Input 4 Capture Volume", ADAU1761_REC_MIXER_RIGHT0,
377 SOC_DAPM_ENUM("Input Select", adau1761_input_mux_enum);
382 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in adau1761_dejitter_fixup()
387 regmap_write(adau->regmap, ADAU1761_DEJITTER, 0); in adau1761_dejitter_fixup()
388 if (!adau->master) in adau1761_dejitter_fixup()
389 regmap_write(adau->regmap, ADAU1761_DEJITTER, 3); in adau1761_dejitter_fixup()
395 SND_SOC_DAPM_MIXER("Left Input Mixer", ADAU1761_REC_MIXER_LEFT0, 0, 0,
397 SND_SOC_DAPM_MIXER("Right Input Mixer", ADAU1761_REC_MIXER_RIGHT0, 0, 0,
442 { "Left Input Mixer", NULL, "LINP" },
443 { "Left Input Mixer", NULL, "LINN" },
444 { "Left Input Mixer", NULL, "LAUX" },
446 { "Right Input Mixer", NULL, "RINP" },
447 { "Right Input Mixer", NULL, "RINN" },
448 { "Right Input Mixer", NULL, "RAUX" },
477 { "Left Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
478 { "Left Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
480 { "Right Playback Mixer", "Left Bypass Volume", "Left Input Mixer" },
481 { "Right Playback Mixer", "Right Bypass Volume", "Right Input Mixer" },
505 { "Left Decimator Mux", "ADC", "Left Input Mixer" },
507 { "Right Decimator Mux", "ADC", "Right Input Mixer" },
515 { "Left Decimator", NULL, "Left Input Mixer" },
516 { "Right Decimator", NULL, "Right Input Mixer" },
520 SND_SOC_DAPM_SUPPLY("Serial Port Clock", ADAU1761_CLK_ENABLE0,
522 SND_SOC_DAPM_SUPPLY("Serial Input Routing Clock", ADAU1761_CLK_ENABLE0,
524 SND_SOC_DAPM_SUPPLY("Serial Output Routing Clock", ADAU1761_CLK_ENABLE0,
527 SND_SOC_DAPM_SUPPLY("Decimator Resync Clock", ADAU1761_CLK_ENABLE0,
529 SND_SOC_DAPM_SUPPLY("Interpolator Resync Clock", ADAU1761_CLK_ENABLE0,
532 SND_SOC_DAPM_SUPPLY("Slew Clock", ADAU1761_CLK_ENABLE0, 6, 0, NULL, 0),
533 SND_SOC_DAPM_SUPPLY("ALC Clock", ADAU1761_CLK_ENABLE0, 5, 0, NULL, 0),
535 SND_SOC_DAPM_SUPPLY_S("Digital Clock 0", 1, ADAU1761_CLK_ENABLE1,
537 SND_SOC_DAPM_SUPPLY_S("Digital Clock 1", 1, ADAU1761_CLK_ENABLE1,
542 { "Left Decimator", NULL, "Digital Clock 0", },
543 { "Right Decimator", NULL, "Digital Clock 0", },
544 { "Left DAC", NULL, "Digital Clock 0", },
545 { "Right DAC", NULL, "Digital Clock 0", },
547 { "AIFCLK", NULL, "Digital Clock 1" },
549 { "Playback", NULL, "Serial Port Clock" },
550 { "Capture", NULL, "Serial Port Clock" },
551 { "Playback", NULL, "Serial Input Routing Clock" },
552 { "Capture", NULL, "Serial Output Routing Clock" },
554 { "Left Decimator", NULL, "Decimator Resync Clock" },
555 { "Right Decimator", NULL, "Decimator Resync Clock" },
556 { "Left DAC", NULL, "Interpolator Resync Clock" },
557 { "Right DAC", NULL, "Interpolator Resync Clock" },
559 { "Slew Clock", NULL, "Digital Clock 0" },
560 { "Right Playback Mixer", NULL, "Slew Clock" },
561 { "Left Playback Mixer", NULL, "Slew Clock" },
563 { "Left Input Mixer", NULL, "ALC Clock" },
564 { "Right Input Mixer", NULL, "ALC Clock" },
566 { "Digital Clock 0", NULL, "SYSCLK" },
567 { "Digital Clock 1", NULL, "SYSCLK" },
571 { "DSP", NULL, "Digital Clock 0" },
577 struct regmap *regmap = adau->regmap; in adau1761_compatibility_probe()
581 if (adau->type != ADAU1361) in adau1761_compatibility_probe()
587 * This will enable the core clock and bypass the PLL, in adau1761_compatibility_probe()
595 * ADAU17X1_SERIAL_SAMPLING_RATE doesn't exist in non-DSP chips; in adau1761_compatibility_probe()
596 * reading it results in zero at all times, and write is a no-op. in adau1761_compatibility_probe()
612 adau->type = ADAU1761_AS_1361; in adau1761_compatibility_probe()
614 /* Disable core clock after probing. */ in adau1761_compatibility_probe()
631 regcache_cache_only(adau->regmap, false); in adau1761_set_bias_level()
632 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, in adau1761_set_bias_level()
636 regcache_sync(adau->regmap); in adau1761_set_bias_level()
639 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, in adau1761_set_bias_level()
641 regcache_cache_only(adau->regmap, true); in adau1761_set_bias_level()
651 struct adau1761_platform_data *pdata = component->dev->platform_data; in adau1761_get_lineout_mode()
654 return pdata->lineout_mode; in adau1761_get_lineout_mode()
662 struct adau1761_platform_data *pdata = component->dev->platform_data; in adau1761_setup_digmic_jackdetect()
669 mode = pdata->digmic_jackdetect_pin_mode; in adau1761_setup_digmic_jackdetect()
675 switch (pdata->jackdetect_debounce_time) { in adau1761_setup_digmic_jackdetect()
680 val |= pdata->jackdetect_debounce_time << 6; in adau1761_setup_digmic_jackdetect()
683 return -EINVAL; in adau1761_setup_digmic_jackdetect()
685 if (pdata->jackdetect_active_low) in adau1761_setup_digmic_jackdetect()
714 return -EINVAL; in adau1761_setup_digmic_jackdetect()
717 regmap_write(adau->regmap, ADAU1761_DIGMIC_JACKDETECT, val); in adau1761_setup_digmic_jackdetect()
726 struct adau1761_platform_data *pdata = component->dev->platform_data; in adau1761_setup_headphone_mode()
731 mode = pdata->headphone_mode; in adau1761_setup_headphone_mode()
739 regmap_update_bits(adau->regmap, ADAU1761_PLAY_MONO_OUTPUT_VOL, in adau1761_setup_headphone_mode()
746 regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL, in adau1761_setup_headphone_mode()
751 return -EINVAL; in adau1761_setup_headphone_mode()
823 struct adau1761_platform_data *pdata = component->dev->platform_data; in adau1761_component_probe()
831 if (pdata && pdata->input_differential) { in adau1761_component_probe()
832 regmap_update_bits(adau->regmap, ADAU1761_LEFT_DIFF_INPUT_VOL, in adau1761_component_probe()
835 regmap_update_bits(adau->regmap, ADAU1761_RIGHT_DIFF_INPUT_VOL, in adau1761_component_probe()
855 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_LEFT_VOL, in adau1761_component_probe()
858 regmap_update_bits(adau->regmap, ADAU1761_PLAY_LINE_RIGHT_VOL, in adau1761_component_probe()
863 return -EINVAL; in adau1761_component_probe()
876 * ADAU1361, we need these non-DSP related DAPM widgets and routes. in adau1761_component_probe()
878 if (adau->type == ADAU1761 || adau->type == ADAU1761_AS_1361) { in adau1761_component_probe()
893 if (adau->type == ADAU1761) { in adau1761_component_probe()
908 if (adau->type == ADAU1761_AS_1361) { in adau1761_component_probe()
909 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE, 0x01); in adau1761_component_probe()
910 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE, 0x01); in adau1761_component_probe()
939 .name = "adau-hifi",
958 .name = "adau-hifi",
1000 * reaches standby and the core clock is enabled */ in adau1761_probe()
1022 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");