31 	struct clk *gclk;  member
111 	ret = clk_prepare_enable(dd->gclk);  in atmel_pdmic_cpu_dai_startup()
117 		clk_disable_unprepare(dd->gclk);  in atmel_pdmic_cpu_dai_startup()
141 	clk_disable_unprepare(dd->gclk);  in atmel_pdmic_cpu_dai_shutdown()
406 	gclk_rate = clk_get_rate(dd->gclk);  in atmel_pdmic_cpu_dai_hw_params()
527 	u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8);  in atmel_pdmic_get_sample_rate()
602 	dd->gclk = devm_clk_get(dev, "gclk");  in atmel_pdmic_probe()
603 	if (IS_ERR(dd->gclk)) {  in atmel_pdmic_probe()
604 		ret = PTR_ERR(dd->gclk);  in atmel_pdmic_probe()
609 	/* The gclk clock frequency must always be three times  in atmel_pdmic_probe()
612 	ret = clk_set_rate(dd->gclk, clk_get_rate(dd->pclk)/3);  in atmel_pdmic_probe()