Lines Matching +full:0 +full:x1240000
11 #define ACP_PHY_BASE_ADDRESS 0x1240000
12 #define ACP_REG_START 0x1240000
13 #define ACP_REG_END 0x1250200
15 #define ACP_DEVICE_ID 0x15E2
16 #define ACP_POWER_ON 0x00
17 #define ACP_POWER_ON_IN_PROGRESS 0x01
18 #define ACP_POWER_OFF 0x02
19 #define ACP_POWER_OFF_IN_PROGRESS 0x03
20 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
22 #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
23 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
24 #define ACP_PGFSM_STATUS_MASK 0x03
25 #define ACP_POWERED_ON 0x00
26 #define ACP_POWER_ON_IN_PROGRESS 0x01
27 #define ACP_POWERED_OFF 0x02
28 #define ACP_POWER_OFF_IN_PROGRESS 0x03
30 #define ACP_ERROR_MASK 0x20000000
31 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
32 #define PDM_DMA_STAT 0x10
33 #define PDM_DMA_INTR_MASK 0x10000
35 #define PDM_DECIMATION_FACTOR 0x2
36 #define ACP_PDM_CLK_FREQ_MASK 0x07
38 #define ACP_PDM_ENABLE 0x01
39 #define ACP_PDM_DISABLE 0x00
40 #define ACP_PDM_DMA_EN_STATUS 0x02
41 #define TWO_CH 0x02
47 #define ACP_SRAM_PTE_OFFSET 0x02050000
48 #define PAGE_SIZE_4K_ENABLE 0x2
49 #define MEM_WINDOW_START 0x4000000