Lines Matching +full:0 +full:x1a00
10 * Hardware interface for ACP7.0 block
28 #define CLK7_CLK0_DFS_CNTL_N1 0X0006C1A4
29 #define CLK0_DIVIDER 0X19
32 .offset = 0,
36 .irq_reg_offset = 0x1a00,
37 .scratch_reg_offset = 0x10000,
38 .sram_pte_offset = 0x03800000,
146 device_id = 0x1507; in acp70_i2s_master_clock_generate()
148 device_id = 0x1122; in acp70_i2s_master_clock_generate()
160 return 0; in acp70_i2s_master_clock_generate()
234 return 0; in acp_acp70_audio_probe()
272 return 0; in acp70_pcm_resume()