136 	u32 dma_ctrl;  in config_acp_dma_channel()  local
139 	dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in config_acp_dma_channel()
140 	dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRun_MASK;  in config_acp_dma_channel()
141 	acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in config_acp_dma_channel()
182 	u32 dma_ctrl;  in pre_config_reset()  local
186 	dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in pre_config_reset()
187 	dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRst_MASK;  in pre_config_reset()
188 	acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in pre_config_reset()
191 				 dma_ctrl,  in pre_config_reset()
192 				 !(dma_ctrl & ACP_DMA_CNTL_0__DMAChRst_MASK),  in pre_config_reset()
416 	u32 dma_ctrl;  in acp_dma_start()  local
419 	dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in acp_dma_start()
429 	dma_ctrl |= ACP_DMA_CNTL_0__DMAChRun_MASK;  in acp_dma_start()
437 		dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;  in acp_dma_start()
440 		dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChIOCEn_MASK;  in acp_dma_start()
446 		dma_ctrl |= ACP_DMA_CNTL_0__Circular_DMA_En_MASK;  in acp_dma_start()
448 		dma_ctrl &= ~ACP_DMA_CNTL_0__Circular_DMA_En_MASK;  in acp_dma_start()
450 	acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in acp_dma_start()
456 	u32 dma_ctrl;  in acp_dma_stop()  local
460 	dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in acp_dma_stop()
466 	dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRun_MASK;  in acp_dma_stop()
467 	dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChIOCEn_MASK;  in acp_dma_stop()
469 	acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in acp_dma_stop()
477 		dma_ctrl |= ACP_DMA_CNTL_0__DMAChRst_MASK;  in acp_dma_stop()
478 		acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);  in acp_dma_stop()
489 			dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRst_MASK;  in acp_dma_stop()
491 			acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0  in acp_dma_stop()