Lines Matching +full:4 +full:wire
39 * three wire serial
83 #define PS3_AUDIO_INTR_0_CHAN4 PS3_AUDIO_INTR_0_CHAN(4)
130 /* 3 Wire Audio Serial Output Channel Mutes (0..3) */
139 #define PS3_AUDIO_AX_MCTRL_SPO1MT (1 << 4) /* RWIVF */
142 /* All 3 Wire Serial Outputs Mute */
167 #define PS3_AUDIO_AX_ISBP_SPOBRN_MASK(n) (0x7 << 4 * (1 - (n))) /* R-IUF */
169 #define PS3_AUDIO_AX_ISBP_SPO0BRN_MASK (0x7 << 4) /* R-IUF */
175 #define PS3_AUDIO_AX_ISBP_SPOBWN_MASK(n) (0x7 << 4 * (5 - (n))) /* R-IUF */
180 3 Wire Audio Serial Outputs Buffer Read/Write
191 3 Wire Audio Serial Output Channel Buffer Read Numbers
193 Controller of 3 Wire Audio Serial Output Channels
195 #define PS3_AUDIO_AX_AOBP_ASOBRN_MASK(n) (0x7 << 4 * (3 - (n))) /* R-IUF */
198 #define PS3_AUDIO_AX_AOBP_ASO2BRN_MASK (0x7 << 4) /* R-IUF */
203 3 Wire Audio Serial Output Channel Buffer Write Numbers
206 #define PS3_AUDIO_AX_AOBP_ASOBWN_MASK(n) (0x7 << 4 * (7 - (n))) /* R-IUF */
220 2 = Interrupt is generated every 4 interrupt events.
230 All 3-Wire Audio Serial Outputs Interrupt Mode
232 condition of all 3-wire Audio Serial Outputs.
267 3 Wire Audio Serial Output Channel Buffer Underflow
270 3-Wire Audio Serial Output Channels
291 /* 3-Wire Audio Serial Output Channel Buffer Empty Interrupt Enables */
393 3-Wire Audio Output Master Control Register
394 Configures clock, 3-Wire Audio Serial Output Enable, and
395 other 3-Wire Audio Serial Output Master Settings
426 3-Wire Audio Serial Output Channel 0-3 Operational
427 Status. Each bit becomes 1 after each 3-Wire Audio
430 Each bit becomes 0 after each 3-Wire Audio Serial Output
464 from bclko) used by the 3-wire Audio Output Clock, which
484 Enables and disables 4ch 3-Wire Audio Serial Output
525 3-Wire Audio Serial output Channel 0-3 Control Register
526 Configures settings for 3-Wire Serial Audio Output Channel 0-3
561 corresponding 3-Wire Audio Output buffers(both L and R).
613 0 - 3-Wire Audio OUT Ch0 Buffer
866 * '4' = Word size (032)