Lines Matching refs:vx_inl
135 #undef vx_inl
136 #define vx_inl(chip,reg) vx2_inl((struct vx_core*)(chip), VX_##reg) macro
174 vx_inl(chip, ISR); in vx2_test_xilinx()
175 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
183 vx_inl(chip, ISR); in vx2_test_xilinx()
184 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
194 vx_inl(chip, ISR); in vx2_test_xilinx()
195 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
203 vx_inl(chip, ISR); in vx2_test_xilinx()
204 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
364 vx_inl(chip, CNTRL); in vx2_load_xilinx_binary()
367 vx_inl(chip, CNTRL); in vx2_load_xilinx_binary()
389 i = vx_inl(chip, GPIOC); in vx2_load_xilinx_binary()
444 if (! (vx_inl(chip, STATUS) & VX_STATUS_MEMIRQ_MASK)) in vx2_test_and_ack()
453 vx_inl(chip, STATUS); in vx2_test_and_ack()
458 vx_inl(chip, STATUS); in vx2_test_and_ack()
494 vx_inl(chip, HIFREQ); in vx2_write_codec_reg()
500 vx_inl(chip, RUER); in vx2_write_codec_reg()
707 vx_inl(chip, HIFREQ); in vx2_old_write_codec_bit()
713 vx_inl(chip, RUER); in vx2_old_write_codec_bit()
726 vx_inl(chip, CDSP); in vx2_reset_codec()
731 vx_inl(chip, CDSP); in vx2_reset_codec()
839 vx_inl(chip, DATA); /* Activate input level programming */ in vx2_set_input_level()
845 vx_inl(chip, RUER); /* Terminate input level programming */ in vx2_set_input_level()