218 	u32 areg;     /* cached additional register value */  member
476 			rme96->areg |= RME96_AR_CDATA;  in snd_rme96_write_SPI()
478 			rme96->areg &= ~RME96_AR_CDATA;  in snd_rme96_write_SPI()
480 		rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);  in snd_rme96_write_SPI()
481 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
483 		rme96->areg |= RME96_AR_CCLK;  in snd_rme96_write_SPI()
484 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
488 	rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);  in snd_rme96_write_SPI()
489 	rme96->areg |= RME96_AR_CLATCH;  in snd_rme96_write_SPI()
490 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
492 	rme96->areg &= ~RME96_AR_CLATCH;  in snd_rme96_write_SPI()
493 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
583 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_capture_getrate()
585 		n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +  in snd_rme96_capture_getrate()
586 			(((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);  in snd_rme96_capture_getrate()
600 		return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;  in snd_rme96_capture_getrate()
730 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
734 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
738 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
745 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
752 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
756 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
762 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_capture_analog_setrate()
774 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
779 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
784 		rme96->areg |= RME96_AR_WSEL;  in snd_rme96_setclockmode()
790 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setclockmode()
797 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_getclockmode()
839 		rme96->areg |= RME96_AR_ANALOG;  in snd_rme96_setinputtype()
840 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
858 		rme96->areg &= ~RME96_AR_ANALOG;  in snd_rme96_setinputtype()
859 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
868 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_getinputtype()
1541 		rme96->areg &= ~RME96_AR_DAC_EN;  in snd_rme96_free()
1542 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_free()
1644 	rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */  in snd_rme96_create()
1647 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1650 	writel(rme96->areg | RME96_AR_PD2,  in snd_rme96_create()
1652 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);	  in snd_rme96_create()
1656 	rme96->areg |= RME96_AR_DAC_EN;  in snd_rme96_create()
1657 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1752 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_proc_read()
2348 	rme96->areg &= ~RME96_AR_DAC_EN;  in rme96_suspend()
2349 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_suspend()
2371 	writel(rme96->areg | RME96_AR_PD2,  in rme96_resume()
2373 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()
2377 	rme96->areg |= RME96_AR_DAC_EN;  in rme96_resume()
2378 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()