Lines Matching +full:0 +full:x000001ff
26 #define PCXHR_DSP_TIME_MASK 0x00ffffff
27 #define PCXHR_DSP_TIME_INVALID 0x10000000
47 CMD_SEND_IRQA, /* cmd_len = 1 stat_len = 0 */
51 CMD_MODIFY_CLOCK, /* cmd_len = 3 stat_len = 0 */
52 CMD_RESYNC_AUDIO_INPUTS, /* cmd_len = 1 stat_len = 0 */
54 CMD_SET_TIMER_INTERRUPT, /* cmd_len = 1 stat_len = 0 */
55 CMD_RES_PIPE, /* cmd_len >=2 stat_len = 0 */
56 CMD_FREE_PIPE, /* cmd_len = 1 stat_len = 0 */
57 CMD_CONF_PIPE, /* cmd_len = 2 stat_len = 0 */
58 CMD_STOP_PIPE, /* cmd_len = 1 stat_len = 0 */
61 CMD_START_STREAM, /* cmd_len = 2 stat_len = 0 */
62 CMD_STREAM_OUT_LEVEL_ADJUST, /* cmd_len >= 1 stat_len = 0 */
63 CMD_STOP_STREAM, /* cmd_len = 2 stat_len = 0 */
64 CMD_UPDATE_R_BUFFERS, /* cmd_len = 4 stat_len = 0 */
65 CMD_FORMAT_STREAM_OUT, /* cmd_len >= 2 stat_len = 0 */
66 CMD_FORMAT_STREAM_IN, /* cmd_len >= 4 stat_len = 0 */
68 CMD_AUDIO_LEVEL_ADJUST, /* cmd_len = 3 stat_len = 0 */
70 CMD_MANAGE_SIGNAL, /* cmd_len = 1 stat_len = 0 */
74 #define MASK_DSP_WORD 0x00ffffff
75 #define MASK_ALL_STREAM 0x00ffffff
76 #define MASK_DSP_WORD_LEVEL 0x000001ff
77 #define MASK_FIRST_FIELD 0x0000001f
88 #define DSP_EXT_CMD_SET(x) (x->dsp_version > 0x012800)
97 #define IO_NUM_REG_CONT 0
108 #define REG_CONT_VALSMPTE 0x000800
109 #define REG_CONT_UNMUTE_INPUTS 0x020000
112 #define REG_STATUS_OPTIONS 0
120 #define REG_STATUS_CURRENT 0x80
122 #define REG_STATUS_OPT_NO_VIDEO_SIGNAL 0x01
123 #define REG_STATUS_OPT_DAUGHTER_MASK 0x1c
124 #define REG_STATUS_OPT_ANALOG_BOARD 0x00
125 #define REG_STATUS_OPT_NO_DAUGHTER 0x1c
126 #define REG_STATUS_OPT_COMPANION_MASK 0xe0
127 #define REG_STATUS_OPT_NO_COMPANION 0xe0
128 #define REG_STATUS_SYNC_32000 0x00
129 #define REG_STATUS_SYNC_44100 0x01
130 #define REG_STATUS_SYNC_48000 0x02
131 #define REG_STATUS_SYNC_64000 0x03
132 #define REG_STATUS_SYNC_88200 0x04
133 #define REG_STATUS_SYNC_96000 0x05
134 #define REG_STATUS_SYNC_128000 0x06
135 #define REG_STATUS_SYNC_176400 0x07
136 #define REG_STATUS_SYNC_192000 0x08
144 #define CS8416_RUN 0x200401
145 #define CS8416_FORMAT_DETECT 0x200b00
146 #define CS8416_CSB0 0x201900
147 #define CS8416_CSB1 0x201a00
148 #define CS8416_CSB2 0x201b00
149 #define CS8416_CSB3 0x201c00
150 #define CS8416_CSB4 0x201d00
151 #define CS8416_VERSION 0x207f00
153 #define CS8420_DATA_FLOW_CTL 0x200301
154 #define CS8420_CLOCK_SRC_CTL 0x200401
155 #define CS8420_RECEIVER_ERRORS 0x201000
156 #define CS8420_SRC_RATIO 0x201e00
157 #define CS8420_CSB0 0x202000
158 #define CS8420_CSB1 0x202100
159 #define CS8420_CSB2 0x202200
160 #define CS8420_CSB3 0x202300
161 #define CS8420_CSB4 0x202400
162 #define CS8420_VERSION 0x207f00
164 #define CS4271_MODE_CTL_1 0x200101
165 #define CS4271_DAC_CTL 0x200201
166 #define CS4271_VOLMIX 0x200301
167 #define CS4271_VOLMUTE_LEFT 0x200401
168 #define CS4271_VOLMUTE_RIGHT 0x200501
169 #define CS4271_ADC_CTL 0x200601
170 #define CS4271_MODE_CTL_2 0x200701
172 #define CHIP_SIG_AND_MAP_SPI 0xff7f00
175 #define CS4271_01_CS 0x160018
176 #define CS4271_23_CS 0x160019
177 #define CS4271_45_CS 0x16001a
178 #define CS4271_67_CS 0x16001b
179 #define CS4271_89_CS 0x16001c
180 #define CS4271_AB_CS 0x16001d
181 #define CS8420_01_CS 0x080090
182 #define CS8420_23_CS 0x080092
183 #define CS8420_45_CS 0x080094
184 #define CS8420_67_CS 0x080096
185 #define CS8416_01_CS 0x080098