Lines Matching +full:bit +full:- +full:per +full:- +full:mux
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
4 * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
11 * Support interrupts per period.
48 * Added GPIO info for SB Live 24bit.
50 * Implement support for Line-in capture on SB Live 24bit.
52 * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
107 #define INTE_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
108 #define INTE_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
113 /* 0x1000 causes AC3 to fails. It adds a dither bit. */
121 #define HCFG_PLAYBACK_DITHER 0x00001000 /* 1 = Add dither bit to all playback channels. */
124 #define HCFG_8_CHANNEL_PLAY 0x00000200 /* 1 = 8 channels, 0 = 2 channels per substream.*/
125 #define HCFG_8_CHANNEL_CAPTURE 0x00000100 /* 1 = 8 channels, 0 = 2 channels per substream.*/
133 #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
136 #define CA0106_GPIO 0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */
138 /* For the Audigy LS, pin 0 (or bit 8) controls the SPDIF/Analog jack. */
139 /* SB Live 24bit:
140 * bit 8 0 = SPDIF in and out / 1 = Analog (Mic or Line)-in.
141 * bit 9 0 = Mute / 1 = Analog out.
142 * bit 10 0 = Line-in / 1 = Mic-in.
143 * bit 11 0 = ? / 1 = ?
144 * bit 12 0 = 48 Khz / 1 = 96 Khz Analog out on SB Live 24bit.
145 * bit 13 0 = ? / 1 = ?
146 * bit 14 0 = Mute / 1 = Analog out
147 * bit 15 0 = ? / 1 = ?
148 * Both bit 9 and bit 14 have to be set for analog sound to work on the SB Live 24bit.
153 * GPO Enable [23:16] Default 0x0f. Setting a bit to 1, causes the pin to be an output pin.
155 #define CA0106_AC97DATA 0x1c /* AC97 register set data register (16 bit) */
157 #define CA0106_AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
160 /* CA0106 pointer-offset register set, accessed through the PTR and DATA registers …
171 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
196 /* 0x21 - 0x3f unused */
201 /* Start Playback [3:0] (one bit per channel)
202 * Start Capture [11:8] (one bit per channel)
203 * Playback rate [23:16] (2 bits per channel) (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
204 * Playback mixer in enable [27:24] (one bit per channel)
205 * Playback mixer out enable [31:28] (one bit per channel)
208 * The jack has 4 poles. I will call 1 - Tip, 2 - Next to 1, 3 - Next to 2, 4 - Next to 3
209 * For Analogue: 1 -> Center Speaker, 2 -> Sub Woofer, 3 -> Ground, 4 -> Ground
210 * For Digital: 1 -> Front SPDIF, 2 -> Rear SPDIF, 3 -> Center/Subwoofer SPDIF, 4 -> Ground.
211 …andard 4 pole Video A/V cable with RCA outputs: 1 -> White, 2 -> Yellow, 3 -> Shield on all three,…
219 /* A standard 2 pole mono mini-jack to RCA plug can be used for SPDIF Stereo PCM output from the Fr…
220 …* A standard 3 pole stereo mini-jack to 2 RCA plugs can be used for SPDIF AC3/DTS and Stereo PCM o…
222 #define SPCS0 0x41 /* SPDIF output Channel Status 0 register. For Rear. default=0x02108004, non-…
228 #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
229 #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
241 #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
242 #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
243 #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
247 #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
249 #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
253 #define SPCS_WORD_LENGTH_16 0x00000008 /* Word Length 16 bit */
254 #define SPCS_WORD_LENGTH_17 0x00000006 /* Word Length 17 bit */
255 #define SPCS_WORD_LENGTH_18 0x00000004 /* Word Length 18 bit */
256 #define SPCS_WORD_LENGTH_19 0x00000002 /* Word Length 19 bit */
257 #define SPCS_WORD_LENGTH_20A 0x0000000a /* Word Length 20 bit */
258 #define SPCS_WORD_LENGTH_20 0x00000009 /* Word Length 20 bit (both 0xa and 0x9 are 20 bit) */
259 #define SPCS_WORD_LENGTH_21 0x00000007 /* Word Length 21 bit */
260 #define SPCS_WORD_LENGTH_22 0x00000005 /* Word Length 22 bit */
261 #define SPCS_WORD_LENGTH_23 0x00000003 /* Word Length 23 bit */
262 #define SPCS_WORD_LENGTH_24 0x0000000b /* Word Length 24 bit */
281 #define SPDIF_SELECT1 0x45 /* Enables SPDIF or Analogue outputs 0-SPDIF, 0xf00-Analogue */
282 /* 0x100 - Front, 0x800 - Rear, 0x200 - Center/LFE.
293 * Wide SPDIF format [3:0] (one bit for each channel) (0=20bit, 1=24bit)
294 * Tristate SPDIF Output [11:8] (one bit for each channel) (0=Not tristate, 1=Tristate)
295 * SPDIF Bypass enable [19:16] (one bit for each channel) (0=Not bypass, 1=Bypass)
302 …* User data can be sent by using the SPDIF output frame pending and SPDIF output user bit interrup…
304 #define WATERMARK 0x46 /* Test bit to indicate cache usage level */
312 #define CAPTURE_CACHE_DATA 0x50 /* 0x50-0x5f Recorded samples. */
315 #define CAPTURE_SOURCE_CHANNEL1 0x0f000000 /* 0 - SPDIF mixer output. */
316 #define CAPTURE_SOURCE_CHANNEL2 0x00f00000 /* 1 - What you hear or . 2 - ?? */
317 #define CAPTURE_SOURCE_CHANNEL3 0x000f0000 /* 3 - Mic in, Line in, TAD in, Aux in. */
319 …/* Record Map [7:0] (2 bits per channel) 0=mapped to channel 0, 1=mapped to channel 1, 2=mapped to…
324 * 0 - SPDIF mixer output.
325 * 1 - i2s mixer output.
326 * 2 - SPDIF input.
327 * 3 - i2s input.
328 * 4 - AC97 capture.
329 * 5 - SRC output.
331 #define CAPTURE_VOLUME1 0x61 /* Capture volume per channel 0-3 */
332 #define CAPTURE_VOLUME2 0x62 /* Capture volume per channel 4-7 */
334 #define PLAYBACK_ROUTING1 0x63 /* Playback routing of channels 0-7. Effects AC3 ou…
341 /* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
342 * Host channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
343 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
344 * Host channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
345 * Host channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
346 * Host channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
347 * Host channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
348 * Host channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
353 /* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
354 * SRC channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
355 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
356 * SRC channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
357 * SRC channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
358 * SRC channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
359 * SRC channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
360 * SRC channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
365 * Invert SRC to SPDIF Mixer [7-0] (One bit per channel)
366 * Invert Host to SPDIF Mixer [15:8] (One bit per channel)
367 * SRC to SPDIF Mixer disable [23:16] (One bit per channel)
368 * Host to SPDIF Mixer disable [31:24] (One bit per channel)
370 #define PLAYBACK_VOLUME1 0x66 /* Playback SPDIF volume per channel. Set to the sa…
372 /* SPDIF mixer input volume. 0=12dB, 0x30=0dB, 0xFE=-51.5dB, 0xff=Mute */
385 #define PLAYBACK_VOLUME2 0x6a /* Playback Analog volume per channel. Does not eff…
393 /* unique channel identifier for midi->channel */
473 /* Same bit layout as EXTENDED_INT_MASK */
474 #define COUNTER77 0x77 /* Counter range 0 to 0x3fffff, 192000 counts per second. */
475 #define COUNTER78 0x78 /* Counter range 0 to 0x3fffff, 44100 counts per second. */
479 #define I2C_A 0x7b /* I2C Address. 32 bit */
480 #define I2C_D0 0x7c /* I2C Data Port 0. 32 bit */
481 #define I2C_D1 0x7d /* I2C Data Port 1. 32 bit */
483 #define I2C_A_ADC_ADD_MASK 0x000000fe //The address is a 7 bit address
484 #define I2C_A_ADC_RW_MASK 0x00000001 //bit mask for R/W
485 #define I2C_A_ADC_TRANS_MASK 0x00000010 //Bit mask for I2c address DAC value
486 #define I2C_A_ADC_ABORT_MASK 0x00000020 //Bit mask for I2C transaction abort flag
487 #define I2C_A_ADC_LAST_MASK 0x00000040 //Bit mask for Last word transaction
488 #define I2C_A_ADC_BYTE_MASK 0x00000080 //Bit mask for Byte Mode
511 #define ADC_MUX 0x00000015 //ADC Mux offset
525 #define ADC_MUX_MASK 0x0000000f //Mask for ADC Mux
526 #define ADC_MUX_PHONE 0x00000001 //Value to select TAD at ADC Mux (Not used)
527 #define ADC_MUX_MIC 0x00000002 //Value to select Mic at ADC Mux
528 #define ADC_MUX_LINEIN 0x00000004 //Value to select LineIn at ADC Mux
529 #define ADC_MUX_AUX 0x00000008 //Value to select Aux at ADC Mux
543 #define SPI_REG_MASK 0x1ff /* 16-bit SPI writes have a 7-bit address */
582 #define SPI_IWL_BIT_16 (0<<4) /* 16-bit world length */
583 #define SPI_IWL_BIT_20 (1<<4) /* 20-bit world length */
584 #define SPI_IWL_BIT_24 (2<<4) /* 24-bit world length */
585 #define SPI_IWL_BIT_32 (3<<4) /* 32-bit world length */
597 /* They really do label the bit for the 4th channel "4" and not "3" */
652 int ac97; /* ac97 = 0 -> Select MIC, Line in, TAD in, AUX in.
653 ac97 = 1 -> Default to AC97 in. */
654 int gpio_type; /* gpio_type = 1 -> shared mic-in/line-in
655 gpio_type = 2 -> shared side-out/line-in. */
657 controls, phone, mic, line-in and aux. */
658 u16 spi_dac; /* spi_dac = 0 -> no spi interface for DACs
659 spi_dac = 0x<front><rear><center-lfe><side>
660 -> specifies DAC id for each channel pair. */
663 // definition of the chip-specific record
683 u32 spdif_str_bits[4]; /* s/pdif out per-stream setup */