pci/ca0106/ca0106.h

75 #define IPR_SPDIF_IN_USER	0x00004000      /* SPDIF input user data has 16 more bits	*/
76 #define IPR_SPDIF_OUT_USER	0x00002000      /* SPDIF output user data needs 16 more bits	*/
77 #define IPR_SPDIF_OUT_FRAME	0x00001000      /* SPDIF frame about to start			*/
84 #define IPR_SPDIF_STATUS        0x00000020      /* SPDIF status changed				*/
95 #define INTE_SPDIF_IN_USER	0x00004000      /* SPDIF input user data has 16 more bits	*/
96 #define INTE_SPDIF_OUT_USER	0x00002000      /* SPDIF output user data needs 16 more bits	*/
97 #define INTE_SPDIF_OUT_FRAME	0x00001000      /* SPDIF frame about to start			*/
104 #define INTE_SPDIF_STATUS       0x00000020      /* SPDIF status changed				*/
117 #define HCFG_CAPTURE_SPDIF_BYPASS 0x04000000	/* 1 = bypass SPDIF input async SRC. */
136 #define CA0106_GPIO		0x18		/* Defaults: 005f03a3-Analog, 005f02a2-SPDIF.   */
138 						/* For the Audigy LS, pin 0 (or bit 8) controls the SPDIF/Analog jack. */
140 						 * bit 8 0 = SPDIF in and out / 1 = Analog (Mic or Line)-in.
152 						 * GPO [15:8] Default 0x9. (Default to SPDIF jack enabled for SPDIF)
210  * For Digital: 1 -> Front SPDIF, 2 -> Rear SPDIF, 3 -> Center/Subwoofer SPDIF, 4 -> Ground.
214 /* The Front SPDIF PCM gets mixed with samples from the AC97 codec, so can only work for Stereo PCM…
215  * The Rear SPDIF can be used for Stereo PCM and also AC3/DTS
216  * The Center/LFE SPDIF cannot be used for AC3/DTS, but can be used for Stereo PCM.
217  * Summary: For ALSA we use the Rear channel for SPDIF Digital AC3/DTS output
219 /* A standard 2 pole mono mini-jack to RCA plug can be used for SPDIF Stereo PCM output from the Fr…
220 …* A standard 3 pole stereo mini-jack to 2 RCA plugs can be used for SPDIF AC3/DTS and Stereo PCM o…
222 #define SPCS0			0x41		/* SPDIF output Channel Status 0 register. For Rear. default=0x02108004, non-…
223 #define SPCS1			0x42		/* SPDIF output Channel Status 1 register. For Front */
224 #define SPCS2			0x43		/* SPDIF output Channel Status 2 register. For Center/LFE */
225 #define SPCS3			0x44		/* SPDIF output Channel Status 3 register. Unknown */
281 #define SPDIF_SELECT1		0x45		/* Enables SPDIF or Analogue outputs 0-SPDIF, 0xf00-Analogue */
290 						 * Use register SPDIF_SELECT2(0x72) to switch between SPDIF and Analog.
293 						 * Wide SPDIF format [3:0] (one bit for each channel) (0=20bit, 1=24bit)
294 						 * Tristate SPDIF Output [11:8] (one bit for each channel) (0=Not tristate, 1=Tristate)
295 						 * SPDIF Bypass enable [19:16] (one bit for each channel) (0=Not bypass, 1=Bypass)
298 						 * SPDIF 0 User data [7:0]
299 						 * SPDIF 1 User data [15:8]
300 						 * SPDIF 0 User data [23:16]
301 						 * SPDIF 0 User data [31:24]
302 …* User data can be sent by using the SPDIF output frame pending and SPDIF output user bit interrup…
305 #define SPDIF_INPUT_STATUS	0x49		/* SPDIF Input status register. Bits the same as SPCS.
309 						 * SPDIF Input User data [16:0]
310 						 * SPDIF Input Frame count [21:16]
315 #define CAPTURE_SOURCE_CHANNEL1 0x0f000000	/* 0 - SPDIF mixer output. */
324 						 * 0 - SPDIF mixer output.
326 						 * 2 - SPDIF input.
341 						/* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
342 						 * Host channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
343 						 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
344 						 * Host channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
345 						 * Host channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
346 						 * Host channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
347 						 * Host channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
348 						 * Host channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
353 						/* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
354 						 * SRC channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
355 						 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
356 						 * SRC channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
357 						 * SRC channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
358 						 * SRC channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
359 						 * SRC channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
360 						 * SRC channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
364 						/* SPDIF Mixer input control:
365 						 * Invert SRC to SPDIF Mixer [7-0] (One bit per channel)
366 						 * Invert Host to SPDIF Mixer [15:8] (One bit per channel)
367 						 * SRC to SPDIF Mixer disable [23:16] (One bit per channel)
368 						 * Host to SPDIF Mixer disable [31:24] (One bit per channel)
370 #define PLAYBACK_VOLUME1        0x66            /* Playback SPDIF volume per channel. Set to the sa…
371 						/* PLAYBACK_VOLUME1 must be set to 30303030 for SPDIF AC3 Playback */
372 						/* SPDIF mixer input volume. 0=12dB, 0x30=0dB, 0xFE=-51.5dB, 0xff=Mute */
380 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
382 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
384 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
386 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
409 						 * SPDIF Locked [21] For SPDIF channel only.
410 						 * Valid Audio [22] For SPDIF channel only.
413 						/* Channel_id 0: 0x40c81000 must be changed to 0x40c80000 for SPDIF AC3 input or output. */
428 						 * SPDIF output rate [25:24] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
429 						 * SPDIF output source select [26] (0=host, 1=SRC)
431 						 * Record Source 0 input [29:28] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
432 						 * Record Source 1 input [31:30] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
441 						 * SPDIF Input volume Right [23:16]
442 						 * SPDIF Input volume Left [31:24]
454 						 * SPDIF output enable [27:24]