sound/pci/azt3328.h

1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
6  * "WRITE_ONLY"  == register does not indicate actual bit values */
25      /* able to reactivate output after output muting due to 8/16bit
27       * 0x0001 is the only bit that's able to start the DMA counter */
31      /* able to reactivate output after output muting due to 8/16bit
42    * (bit 1 of port 0x64 indicates interrupt for one of these three types)
47   #define IRQ_FINISHED_DMABUF_1		0x0002 /* 1st dmabuf finished & ACK */
52   /* start address of 1st DMA transfer area, PU:0x00000000 */
85 …REQ_SUSPECTED_66200	0x06 | SOUNDFORMAT_XTAL2 /* 66200 (13240 * 5); 64000 may have been nicer :-\ */
111 #define IDX_IO_TIMER_VALUE	0x60 /* found this timer area by pure luck :-) */
118   /* being set in IRQ handler in case port 0x00 (hmm, not port 0x64!?!?)
121 #define IDX_IO_IRQSTATUS        0x64
122   /* some IRQ bit in here might also be used to signal a power-management timer
150    * in case playback is active? Or is this driver-induced?
156   /* bit 5: enabling this will activate permanent counting of bytes 2/3
162   /* bit 8; sure, this _pauses_ playback (later resumes at same spot!),
165   /* bit 9; sure, this _pauses_ playback (later resumes at same spot!),
170 	 * However OTOH there seems to be no bit anywhere around here
172   /* bit 10: enabling this actually changes values at legacy gameport
179 	 * --> FIFO/timing settings???) */
183 	 * that some other bit in this same register might be responsible
186 #define IDX_IO_6CH		0x6C	/* unknown; fully read-writable */
216   /* enables axis 1 (X axis) measurement: */
226    * 00 = axis 1, 01 = axis 2, 10 = axis 3, 11 = axis 4: */
253 	 * --> reserved bits? */
259    * 00 --> standard frequency
260    * 10 --> 1/2
261    * 01 --> 1/20
262    * 11 --> 1/200: */
267   #define GAME_HWCFG_ADC_COUNTER_FREQ_1_2	1
285  * (especially since register 0x04 has a "non-empty" value 0xfe) */
325 …ASK	0x0300 /* yup, this is missing the high bit that official AC97 contains, plus it doesn't have …
328 …#define MIXER_ADVCTL2_LPBK		0x0080 /* Loopback mode -- Win driver: "WaveOut3DBypass"? mutes WaveOu…
329   #define MIXER_ADVCTL2_MS		0x0100 /* Mic Select 0=Mic1, 1=Mic2 -- Win driver: "ModemOutSelect"?? */
330 …#define MIXER_ADVCTL2_MIX		0x0200 /* Mono output select 0=Mix, 1=Mic; Win driver: "MonoSelectSourc…
331   #define MIXER_ADVCTL2_3D		0x2000 /* 3D Enhancement 1=on */
332   #define MIXER_ADVCTL2_POP		0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D */
337 #define SET_CHAN_LEFT	1
340 /* helper macro to align I/O port ranges to 32bit I/O width */