Lines Matching full:wave

9 #define AD_DS_WSMC	0x00 /* wave/synthesis channel mixer control */
12 #define  AD_DS_WSMC_WA16 0x0100 /* wave channel 16bit select */
13 #define  AD_DS_WSMC_WAST 0x0200 /* wave channel stereo select */
14 #define  AD_DS_WSMC_WAEN 0x0400 /* wave channel enable */
15 #define  AD_DS_WSMC_WARQ 0x3000 /* wave fifo request point */
25 #define AD_DS_WADA	0x04 /* wave channel mix attenuation */
26 #define  AD_DS_WADA_RWAM 0x0080 /* right wave mute */
27 #define  AD_DS_WADA_RWAA 0x001f /* right wave attenuation */
28 #define  AD_DS_WADA_LWAM 0x8000 /* left wave mute */
29 #define  AD_DS_WADA_LWAA 0x3e00 /* left wave attenuation */
37 #define AD_DS_WAS	0x08 /* wave channel sample rate */
47 #define  AD_DS_CCS_WAU   0x0008 /* wave channel underflow */
68 #define AD_DMA_WAVBA	0x70 /* wave base address */
69 #define AD_DMA_WAVCA	0x74 /* wave current address */
70 #define AD_DMA_WAVBC	0x78 /* wave base count */
71 #define AD_DMA_WAVCC	0x7c /* wave current count */
82 #define AD_DMA_WAVIC	0x98 /* wave dma interrupt current byte count */
83 #define AD_DMA_WAVIB	0x9c /* wave dma interrupt base byte count */
92 #define AD_DMA_WAV	0xb8	/* wave     dma control and status */
111 #define  AD_DMA_DISR_WAVI 0x000008 /* wave channel interrupt */
130 #define  AD_DMA_CHSS_WAVS 0x000008 /* wave channel stopped */