Lines Matching full:48000
170 case 48000: bits = 0; break; in set_spdif_rate()
179 if (ac97->id == AC97_ID_CM9739 && rate != 48000) { in set_spdif_rate()
185 case 48000: bits = AC97_SC_SPSR_48K; break; in set_spdif_rate()
206 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break; in set_spdif_rate()
213 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break; in set_spdif_rate()
231 * If the codec doesn't support VAR, the rate must be 48000 (except
248 dbl = rate > 48000; in snd_ac97_set_rate()
260 if (rate != 48000) in snd_ac97_set_rate()
266 if (rate != 48000 && rate != 96000) in snd_ac97_set_rate()
285 tmp = (rate * ac97->bus->clock) / 48000; in snd_ac97_set_rate()
547 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
564 r = rate > 48000; in snd_ac97_pcm_open()
690 .max = 48000, in double_rate_hw_constraint_rate()
702 if (rate->min > 48000) { in double_rate_hw_constraint_channels()