97 	rmh->Cmd[0] |= DSP_DIFFERED_COMMAND_MASK;  in vx_set_differed_time()
100 	vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]);  in vx_set_differed_time()
104 		rmh->Cmd[1] |= NOTIFY_MASK_TIME_HIGH ;  in vx_set_differed_time()
108 		rmh->Cmd[1] |= MULTIPLE_MASK_TIME_HIGH;  in vx_set_differed_time()
112 		rmh->Cmd[1] |= STREAM_MASK_TIME_HIGH;  in vx_set_differed_time()
130 	rmh.Cmd[0] |= pipe->number << FIELD_SIZE;  in vx_set_stream_format()
135 	rmh.Cmd[rmh.LgCmd] = (data & 0xFFFFFF00) >> 8;  in vx_set_stream_format()
136 	rmh.Cmd[rmh.LgCmd + 1] = (data & 0xFF) << 16 /*| (datal & 0xFFFF00) >> 8*/;  in vx_set_stream_format()
185 	rmh.Cmd[0] |= info->size & 0x03ffff;  in vx_set_ibl()
244 		rmh.Cmd[0] |= 0x00000001;  in vx_query_hbuffer_size()
267 	rmh.Cmd[0] |= 1;  in vx_pipe_can_start()
287 		rmh.Cmd[0] |= COMMAND_RECORD_MASK;  in vx_conf_pipe()
288 	rmh.Cmd[1] = 1 << pipe->number;  in vx_conf_pipe()
407 		rmh.Cmd[0] |= BIT_SKIP_SOUND;  in vx_alloc_pipe()
411 		rmh.Cmd[0] |= BIT_DATA_MODE;  in vx_alloc_pipe()
810 			rmh.Cmd[0] |= BIT_DATA_MODE;  in vx_pcm_prepare()
1093 			chip->irq_rmh.Cmd[0] |= 0x00000001;	/* SEL_ASYNC_EVENTS */  in vx_pcm_update_intr()
1095 			chip->irq_rmh.Cmd[0] |= 0x00000002;	/* SEL_END_OF_BUF_EVENTS */  in vx_pcm_update_intr()