Lines Matching +full:mclk +full:- +full:div
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2sbus driver -- interface register definitions
61 * - clock source
62 * - MClk divisor
63 * - SClk divisor
64 * - SClk master flag
65 * - serial format (sony, i2s 64x, i2s 32x, dav, silabs)
66 * - external sample frequency interrupt (don't understand)
67 * - external sample frequency
80 /* MClk is the clock that drives the codec, usually called its 'system clock'.
89 # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK) argument
90 static inline int i2s_sf_mclkdiv(int div, int *out) in i2s_sf_mclkdiv() argument
94 switch(div) { in i2s_sf_mclkdiv()
100 if (div%2) return -1; in i2s_sf_mclkdiv()
101 d = div/2-1; in i2s_sf_mclkdiv()
103 return -1; in i2s_sf_mclkdiv()
104 *out |= I2S_SF_MCLKDIV_OTHER(div); in i2s_sf_mclkdiv()
109 * derived from the MClk above by taking only every 'divisor' tick
110 * of MClk.
116 # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK) argument
117 static inline int i2s_sf_sclkdiv(int div, int *out) in i2s_sf_sclkdiv() argument
121 switch(div) { in i2s_sf_sclkdiv()
125 if (div%2) return -1; in i2s_sf_sclkdiv()
126 d = div/2-1; in i2s_sf_sclkdiv()
127 if (d == 8 || d == 9) return -1; in i2s_sf_sclkdiv()
128 *out |= I2S_SF_SCLKDIV_OTHER(div); in i2s_sf_sclkdiv()