net/phy/reg.rs

1 // SPDX-License-Identifier: GPL-2.0
5 //! PHY register interfaces.
7 //! This module provides support for accessing PHY registers in the
21 /// Accesses PHY registers.
24 /// C22 and C45 PHY registers.
32 ///     // read C45 PMA/PMD control 1 register
37 ///     dev.genphy_read_status::<phy::C22>();
40 ///     dev.genphy_read_status::<phy::C45>();
44     /// Reads a PHY register.
45     fn read(&self, dev: &mut Device) -> Result<u16>;  in read()
47     /// Writes a PHY register.
48     fn write(&self, dev: &mut Device, val: u16) -> Result;  in write()
51     fn read_status(dev: &mut Device) -> Result<u16>;  in read_status()
63     /// PHY identifier 1.
65     /// PHY identifier 2.
67     /// Auto-negotiation advertisement.
69     /// Auto-negotiation link partner base page ability.
71     /// Auto-negotiation expansion.
73     /// Auto-negotiation next page transmit.
75     /// Auto-negotiation link partner received next page.
77     /// Master-slave control.
79     /// Master-slave status.
93     pub const fn vendor_specific<const N: u8>() -> Self {  in vendor_specific()
96             "Vendor-specific register address must be between 16 and 31"  in vendor_specific()
105     fn read(&self, dev: &mut Device) -> Result<u16> {  in read()
117     fn write(&self, dev: &mut Device, val: u16) -> Result {  in write()
127     fn read_status(dev: &mut Device) -> Result<u16> {  in read_status()
148     /// PHY Extender sublayer.
156     /// Separated PMA (1).
158     /// Separated PMA (2).
160     /// Separated PMA (3).
162     /// Separated PMA (4).
164     /// OFDM PMA/PMD.
178 /// Clause 45 uses a 5-bit device address to access a specific MMD within
179 /// a port, then a 16-bit register address to access a location within
189     pub fn new(devad: Mmd, regnum: u16) -> Self {  in new()
197     fn read(&self, dev: &mut Device) -> Result<u16> {  in read()
207     fn write(&self, dev: &mut Device, val: u16) -> Result {  in write()
216     fn read_status(dev: &mut Device) -> Result<u16> {  in read_status()