Lines Matching full:pme
240 #define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */
246 #define PCI_PM_CAP_PME 0x0800 /* PME pin supported */
247 #define PCI_PM_CAP_PME_MASK 0xF800 /* PME Mask of all supported states */
248 #define PCI_PM_CAP_PME_D0 0x0800 /* PME# from D0 */
249 #define PCI_PM_CAP_PME_D1 0x1000 /* PME# from D1 */
250 #define PCI_PM_CAP_PME_D2 0x2000 /* PME# from D2 */
251 #define PCI_PM_CAP_PME_D3hot 0x4000 /* PME# from D3 (hot) */
252 #define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */
253 #define PCI_PM_CAP_PME_SHIFT 11 /* Start of the PME Mask in PMC */
257 #define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
260 #define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */
636 #define PCI_EXP_RTCTL_PMEIE 0x0008 /* PME Interrupt Enable */
643 #define PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */
644 #define PCI_EXP_RTSTA_PME 0x00010000 /* PME status */
645 #define PCI_EXP_RTSTA_PENDING 0x00020000 /* PME pending */