Lines Matching +full:1000 +full:mbps

86 #define MDIO_PCS_1000BT1_CTRL	2304	/* 1000BASE-T1 PCS control register */
87 #define MDIO_PCS_1000BT1_STAT	2305	/* 1000BASE-T1 PCS status register */
139 #define MDIO_PMA_SPEED_1000		0x0010	/* 1000M capable */
176 #define MDIO_PMA_CTRL2_1000BT		0x000c	/* 1000BASE-T type */
177 #define MDIO_PMA_CTRL2_1000BKX		0x000d	/* 1000BASE-KX type */
232 #define MDIO_PMA_EXTABLE_1000BT		0x0020	/* 1000BASE-T ability */
233 #define MDIO_PMA_EXTABLE_1000BKX	0x0040	/* 1000BASE-KX ability */
341 #define MDIO_PMA_PMD_BT1_B1000_ABLE	0x0002	/* 1000BASE-T1 Ability */
354 #define MDIO_AN_T1_ADV_M_1000BT1	0x0080	/* advertise 1000BASE-T1 */
386 #define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000	0x0001 /* Select 1000BASE-T1 */
389 /* 1000BASE-T1 PCS control register */
394 /* 1000BASE-T1 PCS status register */
406 #define MDIO_AN_EEE_ADV_1000T	0x0004	/* Advertise 1000T EEE cap */
413 #define MDIO_EEE_1000T		MDIO_AN_EEE_ADV_1000T	/* 1000T EEE cap */
415 #define MDIO_EEE_1000KX		0x0010	/* 1000KX EEE cap */
472 #define MDIO_USXGMII_10			0x0000	/* 10Mbps */
473 #define MDIO_USXGMII_10HALF		0x0000	/* 10Mbps half-duplex */
474 #define MDIO_USXGMII_10FULL		0x1000	/* 10Mbps full-duplex */
475 #define MDIO_USXGMII_100		0x0200	/* 100Mbps */
476 #define MDIO_USXGMII_100HALF		0x0200	/* 100Mbps half-duplex */
477 #define MDIO_USXGMII_100FULL		0x1200	/* 100Mbps full-duplex */
478 #define MDIO_USXGMII_1000		0x0400	/* 1000Mbps */
479 #define MDIO_USXGMII_1000HALF		0x0400	/* 1000Mbps half-duplex */
480 #define MDIO_USXGMII_1000FULL		0x1400	/* 1000Mbps full-duplex */
484 #define MDIO_USXGMII_2500		0x0800	/* 2500Mbps */
485 #define MDIO_USXGMII_2500HALF		0x0800	/* 2500Mbps half-duplex */
486 #define MDIO_USXGMII_2500FULL		0x1800	/* 2500Mbps full-duplex */
487 #define MDIO_USXGMII_5000		0x0a00	/* 5000Mbps */
488 #define MDIO_USXGMII_5000HALF		0x0a00	/* 5000Mbps half-duplex */
489 #define MDIO_USXGMII_5000FULL		0x1a00	/* 5000Mbps full-duplex */