Lines Matching +full:fpga +full:- +full:2
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Header File for FPGA DFL User API
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
23 * The IOCTL interface for DFL based FPGA is designed for extensibility by
38 * DFL_FPGA_GET_API_VERSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 0)
47 * DFL_FPGA_CHECK_EXTENSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 1)
58 * DFL_FPGA_PORT_RESET - _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 0)
60 * Reset the FPGA Port and its AFU. No parameters are supported.
64 * Return: 0 on success, -errno of failure
70 * DFL_FPGA_PORT_GET_INFO - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 1,
73 * Retrieve information about the fpga port.
75 * Return: 0 on success, -errno on failure.
89 * FPGA_PORT_GET_REGION_INFO - _IOWR(FPGA_MAGIC, PORT_BASE + 2,
95 * Return: 0 on success, -errno on failure.
104 #define DFL_PORT_REGION_MMAP (1 << 2) /* Can be mmaped to userspace */
115 #define DFL_FPGA_PORT_GET_REGION_INFO _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 2)
118 * DFL_FPGA_PORT_DMA_MAP - _IOWR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 3,
123 * This interface only accepts page-size aligned user memory for dma mapping.
124 * Return: 0 on success, -errno on failure.
139 * DFL_FPGA_PORT_DMA_UNMAP - _IOW(FPGA_MAGIC, PORT_BASE + 4,
143 * Return: 0 on success, -errno on failure.
155 * struct dfl_fpga_irq_set - the argument for DFL_FPGA_XXX_SET_IRQ ioctl.
168 * DFL_FPGA_PORT_ERR_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 5,
171 * Get the number of irqs supported by the fpga port error reporting private
173 * Return: 0 on success, -errno on failure.
179 * DFL_FPGA_PORT_ERR_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 6,
182 * Set fpga port error reporting interrupt trigger if evtfds[n] is valid.
184 * Return: 0 on success, -errno on failure.
191 * DFL_FPGA_PORT_UINT_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7,
194 * Get the number of irqs supported by the fpga AFU interrupt private
196 * Return: 0 on success, -errno on failure.
202 * DFL_FPGA_PORT_UINT_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8,
205 * Set fpga AFU interrupt trigger if evtfds[n] is valid.
207 * Return: 0 on success, -errno on failure.
216 * DFL_FPGA_FME_PORT_PR - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 0,
221 * Return: 0 on success, -errno on failure.
222 * If DFL_FPGA_FME_PORT_PR returns -EIO, that indicates the HW has detected
224 * from the status of FME's fpga manager.
239 * DFL_FPGA_FME_PORT_RELEASE - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 1,
243 * Return: 0 on success, -errno on failure.
248 * DFL_FPGA_FME_PORT_ASSIGN - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2,
252 * Return: 0 on success, -errno on failure.
254 #define DFL_FPGA_FME_PORT_ASSIGN _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2, int)
257 * DFL_FPGA_FME_ERR_GET_IRQ_NUM - _IOR(DFL_FPGA_MAGIC, DFL_FME_BASE + 3,
260 * Get the number of irqs supported by the fpga fme error reporting private
262 * Return: 0 on success, -errno on failure.
268 * DFL_FPGA_FME_ERR_SET_IRQ - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 4,
271 * Set fpga fme error reporting interrupt trigger if evtfds[n] is valid.
273 * Return: 0 on success, -errno on failure.