Lines Matching +full:dma +full:- +full:write
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
26 * struct dma_buf_sync - Synchronize with CPU access.
28 * When a DMA buffer is accessed from the CPU via mmap, it is not always
29 * possible to guarantee coherency between the CPU-visible map and underlying
35 * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
37 * DMA_BUF_SYNC_END and the same read/write flags.
45 * follow-up work is not submitted to GPU or other device driver until
50 * poll() on the DMA buffer file descriptor. If the driver or API requires
52 * other synchronization primitive outside the scope of the DMA buffer API.
65 * Indicates that the mapped DMA buffer will be read by the
69 * Indicates that the mapped DMA buffer will be written by the
89 * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
92 * current set of fences on a dma-buf file descriptor as a sync_file. CPU
93 * waits via poll() or other driver-specific mechanisms typically wait on
94 * whatever fences are on the dma-buf at the time the wait begins. This
96 * dma-buf for waiting later instead of waiting immediately. This is
98 * synchronization model but still need to inter-operate with dma-buf.
105 * 2. Submit rendering work which uses the dma-buf. The work should wait on
109 * 3. Import the rendering-complete sync_file into the dma-buf with flags
120 * @flags: Read/write flags
125 * the returned sync file waits on any writers of the dma-buf to
130 * any users of the dma-buf (read or write) to complete. Waiting
141 * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
144 * sync_file into a dma-buf for the purposes of implicit synchronization
145 * with other dma-buf consumers. This allows clients using explicitly
146 * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
152 * @flags: Read/write flags
157 * this inserts the sync_file as a read-only fence. Any subsequent
158 * implicitly synchronized writes to this dma-buf will wait on this
162 * write fence. All subsequent implicitly synchronized access to
163 * this dma-buf will wait on this fence.