uapi/drm/tegra_drm.h

1 /* SPDX-License-Identifier: MIT */
2 /* Copyright (c) 2012-2020 NVIDIA Corporation */
19  * struct drm_tegra_gem_create - parameters for the GEM object creation IOCTL
38 	 *   The buffer has a bottom-up layout.
52  * struct drm_tegra_gem_mmap - parameters for the GEM mmap IOCTL
79  * struct drm_tegra_syncpt_read - parameters for the read syncpoint IOCTL
99  * struct drm_tegra_syncpt_incr - parameters for the increment syncpoint IOCTL
118  * struct drm_tegra_syncpt_wait - parameters for the wait syncpoint IOCTL
154  * struct drm_tegra_open_channel - parameters for the open channel IOCTL
182  * struct drm_tegra_close_channel - parameters for the close channel IOCTL
195  * struct drm_tegra_get_syncpt - parameters for the get syncpoint IOCTL
223  * struct drm_tegra_get_syncpt_base - parameters for the get wait base IOCTL
251  * struct drm_tegra_syncpt - syncpoint increment operation
270  * struct drm_tegra_cmdbuf - structure describing a command buffer
291 	 * Number of 32-bit words in this command buffer.
304  * struct drm_tegra_reloc - GEM object relocation structure
357  * struct drm_tegra_waitchk - wait check structure
392  * struct drm_tegra_submit - job submission structure
512  * struct drm_tegra_gem_set_tiling - parameters for the set tiling IOCTL
554  * struct drm_tegra_gem_get_tiling - parameters for the get tiling IOCTL
592  * struct drm_tegra_gem_set_flags - parameters for the set flags IOCTL
611  * struct drm_tegra_gem_get_flags - parameters for the get flags IOCTL
674 	 * Host1x class of the engine that will be programmed using this
781  * Specify that bit 39 of the patched-in address should be set to switch
782  * swizzling between Tegra and non-Tegra sector layout on systems that store
783  * surfaces in system memory in non-Tegra sector layout.
833  * Execute `words` words of Host1x opcodes specified in the `gather_data_ptr`
944 	 * Number of 32-bit words in the `gather_data_ptr` array.
965 	 * Pointer to an array of Host1x opcodes to be used by GATHER_UPTR