Lines Matching +full:range +full:- +full:double
1 /* SPDX-License-Identifier: GPL-2.0+
33 /* range 0x28-0x3a - AUDIO AC'97 2.0 extensions */
44 /* range 0x3c-0x58 - MODEM */
59 /* range 0x5a-0x7b - Vendor Specific */
62 /* range 0x60-0x6f (page 1) - extended codec registers */
85 #define AC97_SLOT_PCM_LEFT_0 7 /* double rate operation */
88 #define AC97_SLOT_PCM_RIGHT_0 8 /* double rate operation */
93 #define AC97_SLOT_PCM_LEFT_1 10 /* double rate operation */
96 #define AC97_SLOT_PCM_RIGHT_1 11 /* double rate operation */
99 #define AC97_SLOT_PCM_CENTER_1 12 /* double rate operation */
108 #define AC97_BC_16BIT_DAC 0x0000 /* 16-bit DAC resolution */
109 #define AC97_BC_18BIT_DAC 0x0040 /* 18-bit DAC resolution */
110 #define AC97_BC_20BIT_DAC 0x0080 /* 20-bit DAC resolution */
112 #define AC97_BC_16BIT_ADC 0x0000 /* 16-bit ADC resolution */
113 #define AC97_BC_18BIT_ADC 0x0100 /* 18-bit ADC resolution */
114 #define AC97_BC_20BIT_ADC 0x0200 /* 20-bit ADC resolution */
116 #define AC97_BC_3D_TECH_ID_MASK 0x7c00 /* Per-vendor ID of 3D enhancement */
119 #define AC97_GP_DRSS_MASK 0x0c00 /* double rate slot select */
132 #define AC97_PD_PR4 0x1000 /* Power down AC-Link */
139 #define AC97_EI_DRA 0x0002 /* Double rate supported */
157 #define AC97_EA_DRA 0x0002 /* Double-rate audio enable bit */
189 #define AC97_SC_DRS 0x4000 /* Double Rate S/PDIF */
194 #define AC97_PAGE_VENDOR 0 /* Vendor-specific registers */