Lines Matching +full:power +full:- +full:down
1 /* SPDX-License-Identifier: GPL-2.0+
33 /* range 0x28-0x3a - AUDIO AC'97 2.0 extensions */
44 /* range 0x3c-0x58 - MODEM */
59 /* range 0x5a-0x7b - Vendor Specific */
62 /* range 0x60-0x6f (page 1) - extended codec registers */
108 #define AC97_BC_16BIT_DAC 0x0000 /* 16-bit DAC resolution */
109 #define AC97_BC_18BIT_DAC 0x0040 /* 18-bit DAC resolution */
110 #define AC97_BC_20BIT_DAC 0x0080 /* 20-bit DAC resolution */
112 #define AC97_BC_16BIT_ADC 0x0000 /* 16-bit ADC resolution */
113 #define AC97_BC_18BIT_ADC 0x0100 /* 18-bit ADC resolution */
114 #define AC97_BC_20BIT_ADC 0x0200 /* 20-bit ADC resolution */
116 #define AC97_BC_3D_TECH_ID_MASK 0x7c00 /* Per-vendor ID of 3D enhancement */
128 #define AC97_PD_PR0 0x0100 /* Power down PCM ADCs and input MUX */
129 #define AC97_PD_PR1 0x0200 /* Power down PCM front DAC */
130 #define AC97_PD_PR2 0x0400 /* Power down Mixer (Vref still on) */
131 #define AC97_PD_PR3 0x0800 /* Power down Mixer (Vref off) */
132 #define AC97_PD_PR4 0x1000 /* Power down AC-Link */
135 #define AC97_PD_EAPD 0x8000 /* External Amplifer Power Down (EAPD) */
157 #define AC97_EA_DRA 0x0002 /* Double-rate audio enable bit */
194 #define AC97_PAGE_VENDOR 0 /* Vendor-specific registers */
220 #define AC97_MEA_PRA 0x0100 /* GPIO power down (high) */
222 #define AC97_MEA_PRC 0x0400 /* ADC1 power down (high) */
223 #define AC97_MEA_PRD 0x0800 /* DAC1 power down (high) */
224 #define AC97_MEA_PRE 0x1000 /* ADC2 power down (high) */
225 #define AC97_MEA_PRF 0x2000 /* DAC2 power down (high) */
226 #define AC97_MEA_PRG 0x4000 /* HADC power down (high) */
227 #define AC97_MEA_PRH 0x8000 /* HDAC power down (high) */