Lines Matching +full:spi +full:- +full:controller
1 /* SPDX-License-Identifier: GPL-2.0-or-later
21 #include <uapi/linux/spi/spi.h>
23 /* Max no. of CS supported per spi device */
36 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
37 * and SPI infrastructure.
42 * struct spi_statistics - statistics for spi transfers
43 * @syncp: seqcount to protect members in this struct for per-cpu update
44 * on 32-bit systems
46 * @messages: number of spi-messages handled
95 u64_stats_update_begin(&__lstats->syncp); \
96 u64_stats_add(&__lstats->field, count); \
97 u64_stats_update_end(&__lstats->syncp); \
106 u64_stats_update_begin(&__lstats->syncp); \
107 u64_stats_inc(&__lstats->field); \
108 u64_stats_update_end(&__lstats->syncp); \
113 * struct spi_delay - SPI delay information
131 * struct spi_device - Controller side proxy for an SPI slave device
133 * @controller: SPI controller used with the device.
137 * @chip_select: Array of physical chipselect, spi->chipselect[i] gives
139 * @mode: The spi mode defines how data is clocked out and in.
145 * like eight or 12 bits are common. In-memory wordsizes are
153 * @controller_state: Controller's runtime state
154 * @controller_data: Board-specific definitions for controller, such as
167 * @cs_setup: delay to be introduced by the controller after CS is asserted
168 * @cs_hold: delay to be introduced by the controller before CS is deasserted
169 * @cs_inactive: delay to be introduced by the controller after CS is
175 * A @spi_device is used to interchange data between an SPI slave
180 * to its controller. One example might be an identifier for a chip
186 struct spi_controller *controller; member
194 * TPM specification defines flow control over SPI. Client device
196 * controller on MOSI. Detecting the wait state in software is only
198 * only half-duplex, the wait state detection needs to be implemented
200 * control is expected from SPI controller.
206 * which is defined in 'include/uapi/linux/spi/spi.h'.
212 #define SPI_MODE_KERNEL_MASK (~(BIT(29) - 1))
220 struct spi_delay word_delay; /* Inter-word delay */
230 * the chipselect array.When the controller is capable to handle
238 * the controller talks to each chip, like:
239 * - memory packing (12 bit samples into low bits, others zeroed)
240 * - priority
241 * - chipselect delays
242 * - ...
256 static inline struct spi_device *spi_dev_get(struct spi_device *spi) in spi_dev_get() argument
258 return (spi && get_device(&spi->dev)) ? spi : NULL; in spi_dev_get()
261 static inline void spi_dev_put(struct spi_device *spi) in spi_dev_put() argument
263 if (spi) in spi_dev_put()
264 put_device(&spi->dev); in spi_dev_put()
268 static inline void *spi_get_ctldata(const struct spi_device *spi) in spi_get_ctldata() argument
270 return spi->controller_state; in spi_get_ctldata()
273 static inline void spi_set_ctldata(struct spi_device *spi, void *state) in spi_set_ctldata() argument
275 spi->controller_state = state; in spi_set_ctldata()
280 static inline void spi_set_drvdata(struct spi_device *spi, void *data) in spi_set_drvdata() argument
282 dev_set_drvdata(&spi->dev, data); in spi_set_drvdata()
285 static inline void *spi_get_drvdata(const struct spi_device *spi) in spi_get_drvdata() argument
287 return dev_get_drvdata(&spi->dev); in spi_get_drvdata()
290 static inline u8 spi_get_chipselect(const struct spi_device *spi, u8 idx) in spi_get_chipselect() argument
292 return spi->chip_select[idx]; in spi_get_chipselect()
295 static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect) in spi_set_chipselect() argument
297 spi->chip_select[idx] = chipselect; in spi_set_chipselect()
300 static inline struct gpio_desc *spi_get_csgpiod(const struct spi_device *spi, u8 idx) in spi_get_csgpiod() argument
302 return spi->cs_gpiod[idx]; in spi_get_csgpiod()
305 static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod) in spi_set_csgpiod() argument
307 spi->cs_gpiod[idx] = csgpiod; in spi_set_csgpiod()
310 static inline bool spi_is_csgpiod(struct spi_device *spi) in spi_is_csgpiod() argument
315 if (spi_get_csgpiod(spi, idx)) in spi_is_csgpiod()
322 * struct spi_driver - Host side "protocol" driver
323 * @id_table: List of SPI devices supported by this driver
324 * @probe: Binds this driver to the SPI device. Drivers can verify
328 * @remove: Unbinds this driver from the SPI device
331 * @driver: SPI device drivers should initialize the name and owner
334 * This represents the kind of device driver that uses SPI messages to
335 * interact with the hardware at the other end of a SPI link. It's called
337 * directly to SPI hardware (which is what the underlying SPI controller
348 int (*probe)(struct spi_device *spi);
349 void (*remove)(struct spi_device *spi);
350 void (*shutdown)(struct spi_device *spi);
360 * spi_unregister_driver - reverse effect of spi_register_driver
367 driver_unregister(&sdrv->driver); in spi_unregister_driver()
370 extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select);
377 * module_spi_driver() - Helper macro for registering a SPI driver
380 * Helper macro for SPI drivers which do not do anything special in module
389 * struct spi_controller - interface to SPI master or slave controller
392 * @bus_num: board-specific (and often SOC-specific) identifier for a
393 * given SPI controller.
395 * SPI slaves, and are numbered from zero to num_chipselects.
398 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
399 * @mode_bits: flags understood by this controller driver
400 * @buswidth_override_bits: flags to override for this controller driver
403 * supported. If set, the SPI core will reject any transfer with an
409 * @slave: indicates that this is an SPI slave controller
410 * @target: indicates that this is an SPI target controller
411 * @devm_allocated: whether the allocation of this struct is devres-managed
418 * @bus_lock_spinlock: spinlock for SPI bus locking
420 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
422 * device's SPI controller; protocol code may call this. This
426 * @set_cs_timing: optional hook for SPI devices to request SPI master
427 * controller for configuring specific CS setup time, hold time and inactive
429 * @transfer: adds a message to the controller's transfer queue.
430 * @cleanup: frees controller-specific state
431 * @can_dma: determine whether this controller supports DMA
435 * @queued: whether this controller is providing an internal message queue
440 * @cur_msg: the currently in-flight message
441 * @cur_msg_completion: a completion for the current in-flight message
451 * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip
478 * @prepare_message: set up the controller to transfer a single message,
483 * - return 0 if the transfer is finished,
484 * - return 1 if the transfer is still in progress. When
489 * spi_transfer->error first, before calling
496 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
498 * controller has native support for memory like operations.
499 * @mem_caps: controller capabilities for the handling of memory operations.
501 * @target_abort: abort the ongoing transfer request on an SPI target controller
504 * are not GPIOs (driven by the SPI controller itself).
505 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
506 * GPIO descriptors. This will fill in @cs_gpiods and SPI devices will have
509 * fill in this field with the first unused native CS, to be used by SPI
510 * controller drivers that need to drive a native CS when using GPIO CS.
517 * @dummy_rx: dummy receive buffer for full-duplex devices
518 * @dummy_tx: dummy transmit buffer for full-duplex devices
523 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
524 * moment in time when @spi_transfer->ptp_sts_word_pre and
525 * @spi_transfer->ptp_sts_word_post were transmitted.
526 * If the driver does not set this, the SPI core takes the snapshot as
527 * close to the driver hand-over as possible.
532 * @defer_optimize_message: set to true if controller cannot pre-optimize messages
536 * Each SPI controller can communicate with one or more @spi_device
542 * The driver for an SPI controller manages access to those devices through
544 * an SPI slave device. For each such message it queues, it calls the
554 * board-specific. Usually that simplifies to being SoC-specific.
555 * example: one SoC has three SPI controllers, numbered 0..2,
556 * and one board's schematics might show it using SPI-2. Software
557 * would normally use bus_num=2 for that controller.
563 * might use board-specific GPIOs.
567 /* Some SPI controllers pose alignment requirements on DMAable
572 /* spi_device.mode flags understood by this controller driver */
575 /* spi_device.mode flags override flags for this controller */
580 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
581 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
597 * The spi-controller has multi chip select capability and can
598 * assert/de-assert more than one chip select at once.
602 /* Flag indicating if the allocation of this struct is devres-managed */
606 /* Flag indicating this is an SPI slave controller */
608 /* Flag indicating this is an SPI target controller */
616 size_t (*max_transfer_size)(struct spi_device *spi);
617 size_t (*max_message_size)(struct spi_device *spi);
625 /* Lock and mutex for SPI bus locking */
629 /* Flag indicating that the SPI bus is locked for exclusive use */
633 * Setup mode and clock, etc (SPI driver may call many times).
639 int (*setup)(struct spi_device *spi);
642 * set_cs_timing() method is for SPI controllers that supports
645 * This hook allows SPI client drivers to request SPI controllers
649 int (*set_cs_timing)(struct spi_device *spi);
656 * + For now there's no remove-from-queue operation, or
660 * + The controller's main job is to process its message queue,
668 * + The message transfers use clock and SPI mode parameters
671 int (*transfer)(struct spi_device *spi,
675 void (*cleanup)(struct spi_device *spi);
685 struct spi_device *spi,
693 * controller transfer queueing mechanism. If these are used, the
695 * Over time we expect SPI drivers to be phased over to this API.
733 void (*set_cs)(struct spi_device *spi, bool enable);
734 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
739 /* Optimized handlers for SPI memory-like operations. */
763 * Driver sets this field to indicate it is able to snapshot SPI
779 return dev_get_drvdata(&ctlr->dev); in spi_controller_get_devdata()
785 dev_set_drvdata(&ctlr->dev, data); in spi_controller_set_devdata()
790 if (!ctlr || !get_device(&ctlr->dev)) in spi_controller_get()
798 put_device(&ctlr->dev); in spi_controller_put()
803 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->target; in spi_controller_is_target()
823 /* The SPI driver core manages memory for the spi_controller classdev */
912 return ERR_PTR(-ENODEV); in acpi_spi_device_alloc()
922 * SPI resource management while processing a SPI message
930 * struct spi_res - SPI resource management structure
933 * @data: extra data allocated for the specific use-case
935 * This is based on ideas from devres, but focused on life-cycle
944 /*---------------------------------------------------------------------------*/
947 * I/O INTERFACE between SPI controller and protocol drivers
950 * between the controller and memory buffers.
955 * pointer. (This is unlike most types of I/O API, because SPI hardware
964 * struct spi_transfer - a read/write buffer pair
965 * @tx_buf: data to be written (DMA-safe memory), or NULL
966 * @rx_buf: data to be read (DMA-safe memory), or NULL
988 * @effective_speed_hz: the effective SCK-speed that was used to
989 * transfer this transfer. Set to 0 if the SPI bus driver does
997 * within @tx_buf for which the SPI device is requesting that the time
998 * snapshot for this transfer begins. Upon completing the SPI transfer,
1005 * for this controller), it will set @ptp_sts_word_pre to 0, and
1007 * purposefully (instead of setting to spi_transfer->len - 1) to denote
1008 * that a transfer-level snapshot taken from within the driver may still
1010 * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
1015 * The timestamp must represent the time at which the SPI slave device has
1018 * transmit confirmation from the controller for the "post" word.
1020 * @error: Error status logged by SPI controller driver.
1022 * SPI transfers always write the same number of bytes as they read.
1035 * In-memory data values are always in native CPU byte order, translated
1036 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
1040 * When the word size of the SPI transfer is not a power-of-two multiple
1041 * of eight bits, those in-memory words include extra bits. In-memory
1042 * words are always seen by protocol drivers as right-justified, so the
1045 * All SPI transfers start with the relevant chipselect active. Normally
1056 * stay selected until the next transfer. On multi-device SPI busses
1065 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
1066 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
1072 * Zero-initialize every field you don't set up explicitly, to
1104 #define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */
1105 #define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */
1106 #define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */
1107 #define SPI_NBITS_OCTAL 0x08 /* 8-bit transfer */
1125 * struct spi_message - one multi-segment SPI transaction
1127 * @spi: SPI device to which the transaction is queued
1128 * @pre_optimized: peripheral driver pre-optimized the message
1140 * @resources: for resource management when the SPI message is processed
1144 * in the sense that no other spi_message may use that SPI bus until that
1152 * Zero-initialize every field you don't set up explicitly, to
1159 struct spi_device *spi; member
1175 * Some controller drivers (message-at-a-time queue processing)
1177 * others (with multi-message pipelines) could need a flag to
1191 * complete(), that's the spi_controller controller driver.
1196 * Optional state for use by controller driver between calls to
1201 /* List of spi_res resources when the SPI message is processed */
1207 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1208 INIT_LIST_HEAD(&m->resources); in spi_message_init_no_memset()
1220 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1226 list_del(&t->transfer_list); in spi_transfer_del()
1232 return spi_delay_exec(&t->delay, t); in spi_transfer_delay_exec()
1236 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1238 * @xfers: An array of SPI transfers
1271 spi_message_init_no_memset(&mwt->m); in spi_message_alloc()
1273 spi_message_add_tail(&mwt->t[i], &mwt->m); in spi_message_alloc()
1275 return &mwt->m; in spi_message_alloc()
1283 extern int spi_optimize_message(struct spi_device *spi, struct spi_message *msg);
1285 extern int devm_spi_optimize_message(struct device *dev, struct spi_device *spi,
1288 extern int spi_setup(struct spi_device *spi);
1289 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1290 extern int spi_target_abort(struct spi_device *spi);
1293 spi_max_message_size(struct spi_device *spi) in spi_max_message_size() argument
1295 struct spi_controller *ctlr = spi->controller; in spi_max_message_size()
1297 if (!ctlr->max_message_size) in spi_max_message_size()
1299 return ctlr->max_message_size(spi); in spi_max_message_size()
1303 spi_max_transfer_size(struct spi_device *spi) in spi_max_transfer_size() argument
1305 struct spi_controller *ctlr = spi->controller; in spi_max_transfer_size()
1307 size_t msg_max = spi_max_message_size(spi); in spi_max_transfer_size()
1309 if (ctlr->max_transfer_size) in spi_max_transfer_size()
1310 tr_max = ctlr->max_transfer_size(spi); in spi_max_transfer_size()
1317 * spi_is_bpw_supported - Check if bits per word is supported
1318 * @spi: SPI device
1321 * This function checks to see if the SPI controller supports @bpw.
1326 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw) in spi_is_bpw_supported() argument
1328 u32 bpw_mask = spi->controller->bits_per_word_mask; in spi_is_bpw_supported()
1337 * spi_controller_xfer_timeout - Compute a suitable timeout value
1338 * @ctlr: SPI device
1350 return max(xfer->len * 8 * 2 / (xfer->speed_hz / 1000), 500U); in spi_controller_xfer_timeout()
1353 /*---------------------------------------------------------------------------*/
1355 /* SPI transfer replacement methods which make use of spi_res */
1362 * struct spi_replaced_transfers - structure describing the spi_transfer
1371 * are to get re-inserted
1373 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1389 /*---------------------------------------------------------------------------*/
1391 /* SPI transfer transformation methods */
1400 /*---------------------------------------------------------------------------*/
1403 * All these synchronous SPI transfer routines are utilities layered
1408 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1409 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1414 * spi_sync_transfer - synchronous SPI data transfer
1415 * @spi: device with which data will be exchanged
1420 * Does a synchronous SPI data transfer of the given spi_transfer array.
1427 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, in spi_sync_transfer() argument
1434 return spi_sync(spi, &msg); in spi_sync_transfer()
1438 * spi_write - SPI synchronous write
1439 * @spi: device to which data will be written
1450 spi_write(struct spi_device *spi, const void *buf, size_t len) in spi_write() argument
1457 return spi_sync_transfer(spi, &t, 1); in spi_write()
1461 * spi_read - SPI synchronous read
1462 * @spi: device from which data will be read
1473 spi_read(struct spi_device *spi, void *buf, size_t len) in spi_read() argument
1480 return spi_sync_transfer(spi, &t, 1); in spi_read()
1484 extern int spi_write_then_read(struct spi_device *spi,
1489 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1490 * @spi: device with which data will be exchanged
1499 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) in spi_w8r8() argument
1504 status = spi_write_then_read(spi, &cmd, 1, &result, 1); in spi_w8r8()
1511 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1512 * @spi: device with which data will be exchanged
1516 * The number is returned in wire-order, which is at least sometimes
1517 * big-endian.
1524 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) in spi_w8r16() argument
1529 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16()
1536 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1537 * @spi: device with which data will be exchanged
1542 * convert the read 16 bit data word from big-endian to native endianness.
1549 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) in spi_w8r16be() argument
1555 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16be()
1562 /*---------------------------------------------------------------------------*/
1565 * INTERFACE between board init code and SPI infrastructure.
1567 * No SPI driver ever sees these SPI device table segments, but
1568 * it's how the SPI core (or adapters that get hotplugged) grows
1571 * As a rule, SPI devices can't be probed. Instead, board init code
1574 * support for non-static configurations too; enough to handle adding
1575 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1579 * struct spi_board_info - board-specific template for a SPI device
1582 * data stored there is driver-specific.
1588 * from the chip datasheet and board-specific signal quality issues.
1597 * When adding new SPI devices to the device tree, these structures serve
1603 * be stored in tables of board-specific device descriptors, which are
1605 * populate a controller's device tree after the that controller's driver
1607 * spi_new_device() call, which happens after those controller drivers
1649 * - quirks like clock rate mattering when not selected
1657 /* Board init code may ignore whether SPI is configured or not */
1679 spi_add_device(struct spi_device *spi);
1684 extern void spi_unregister_device(struct spi_device *spi);
1695 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()