linux/soundwire/sdw_intel.h

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
42 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24		(24000 / SDW_CADENCE_GSYNC_KHZ - 1)
43 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24_576	(24576 / SDW_CADENCE_GSYNC_KHZ - 1)
44 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4		(38400 / SDW_CADENCE_GSYNC_KHZ - 1)
45 #define SDW_SHIM_SYNC_SYNCPRD_VAL_96		(96000 / SDW_CADENCE_GSYNC_KHZ - 1)
116  * ACE2.x definitions for SHIM registers - only accessible when the
125 /* Read-only capabilities */
127 #define SDW_SHIM2_LECAP_HDS		BIT(0)		/* unset -> Host mode */
132 #define SDW_SHIM2_PCMSCAP_ISS		GENMASK(3, 0)	/* Input-only streams */
133 #define SDW_SHIM2_PCMSCAP_OSS		GENMASK(7, 4)	/* Output-only streams */
136 /* Read-only PCM Stream Channel Count, y variable is stream */
147 /* SHIM2 vendor-specific registers */
228  * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
230  * @count: link count found with "sdw-master-count" or "sdw-manager-list" property
231  * @link_mask: bit-wise mask listing links enabled by BIOS menu
245 /* Intel clock-stop/pm_runtime quirk definitions */
256  * reset and re-enumeration will be performed when the bus
258  * in-band wakes.
264  * (e.g. speaker amplifiers). The clock-stop mode is typically
265  * slightly higher power than when the IP is completely powered-off.
270  * Require a bus reset (and complete re-enumeration) when exiting
282  * struct sdw_intel_ctx - context allocated by the controller
286  * hardware capabilities after all power dependencies are settled.
287  * @link_mask: bit-wise mask listing SoundWire links reported by the
291  * @ldev: information for each link (controller-specific and kept
317  * struct sdw_intel_res - Soundwire Intel global resource structure,
328  * @link_mask: bit-wise mask listing links selected by the DSP driver
330  * machine-specific quirks are handled in the DSP driver.
337  * @eml_lock: mutex protecting shared registers in the HDaudio multi-link
362  * in DSDT tables, then an allocation step (with no hardware
364  * the actual hardware configuration. The final stage is a global
388 /* struct intel_sdw_hw_ops - SoundWire ops for Intel platforms.
391  * @get_link_count: fetch link count from hardware registers
398  * @link_power_up: power-up using chip-specific helpers
399  * @link_power_down: power-down with chip-specific helpers
401  * @shim_wake: enable/disable in-band wake management
404  * @sync_arm: helper for multi-link synchronization
405  * @sync_go_unlocked: helper for multi-link synchronization -
407  * @sync_go: helper for multi-link synchronization
408  * @sync_check_cmdsync_unlocked: helper for multi-link synchronization
409  * and bank switch - shim_lock is assumed to be locked at higher level
448  * and 6 system-unique Device Numbers for wake-capable devices.
454  * Max number of links supported in hardware