Lines Matching +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
75 * enum sdw_slave_status - Slave status
89 * enum sdw_clk_stop_type: clock stop operations
91 * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
92 * @SDW_CLK_POST_PREPARE: post clock stop prepare
93 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
94 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
104 * enum sdw_command_response - Command response as defined by SDW spec
152 * enum sdw_data_direction: Data direction
155 * @SDW_DATA_DIR_TX: Data out of Port
190 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
201 * enum sdw_dpn_type - Data port types
216 * enum sdw_clk_stop_mode - Clock Stop modes
217 * @SDW_CLK_STOP_MODE0: Slave can continue operation seamlessly on clock
219 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
220 * not capable of continuing operation seamlessly when the clock restarts
228 * struct sdw_dp0_prop - DP0 properties
238 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
240 * implementation-defined interrupts
258 * struct sdw_dpn_audio_mode - Audio mode properties for DPn
268 * sequence and bus clock configuration
269 * If 0, Channel Prepare can happen at any Bus clock rate
270 * If 1, Channel Prepare sequence shall happen only after Bus clock is
290 * struct sdw_dpn_prop - Data Port DPn properties
303 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
305 * implementation-defined interrupts
346 * struct sdw_slave_prop - SoundWire Slave properties
348 * @wake_capable: Wake-up events are supported
350 * @clk_stop_mode1: Clock-Stop Mode 1 is supported
351 * @simple_clk_stop_capable: Simple clock mode is supported
352 * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
354 * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
357 * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
374 * @clock_reg_supported: the Peripheral implements the clock base and scale
408 * struct sdw_master_prop - Master properties
410 * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
411 * @max_clk_freq: Maximum Bus clock frequency, in Hz
412 * @num_clk_gears: Number of clock gears supported
413 * @clk_gears: Clock gears supported
414 * @num_clk_freq: Number of clock frequencies supported, in Hz
415 * @clk_freq: Clock frequencies supported, in Hz
422 * @mclk_freq: clock reference passed to SoundWire Master, in Hz.
423 * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
474 * struct sdw_slave_id - Slave ID
497 * Helper macros to extract the MIPI-defined IDs
526 * struct sdw_slave_intr_status - Slave interrupt status
538 * sdw_reg_bank - SoundWire register banks
548 * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
552 * @prepare: Prepare (true) /de-prepare (false) channel
586 * @max_dr_freq: Maximum double rate clock frequency supported, in Hz
587 * @curr_dr_freq: Current double rate clock frequency, in Hz
617 * @clk_stop: handle imp-def sequences before and after prepare and de-prepare
637 * struct sdw_slave - SoundWire Slave
649 * @dev_num_sticky: one-time static Device Number assigned by Bus
656 * @unattach_request: mask field to keep track why the Slave re-attached and
657 * was re-initialized. This is useful to deal with potential race conditions
694 * struct sdw_master_device - SoundWire 'Master Device' representation
823 * struct sdw_defer - SDW deffered message
835 * struct sdw_master_ops - Master driver ops
846 * @get_device_num: Callback for vendor-specific device_number allocation
847 * @put_device_num: Callback for vendor-specific device_number release
871 * struct sdw_bus - SoundWire bus
872 * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
874 * @controller_id: system-unique controller ID. If set to -1, the bus @id will be used.
876 * @id: bus system-wide unique id
887 * @vendor_specific_prop: pointer to non-standard properties
889 * is used to compute and program bus bandwidth, clock, frame shape,
894 * @clk_stop_timeout: Clock stop timeout computed
900 * hardware-based synchronization is required. This value is only
901 * meaningful if multi_link is set. If set to 1, hardware-based
961 * @direction: Data direction
968 enum sdw_data_direction direction; member
980 * @SDW_STREAM_DEPREPARED: Stream de-prepared
1083 return -EINVAL; in sdw_stream_add_slave()
1090 return -EINVAL; in sdw_stream_remove_slave()
1097 return -EINVAL; in sdw_read()
1103 return -EINVAL; in sdw_write()
1109 return -EINVAL; in sdw_write_no_pm()
1115 return -EINVAL; in sdw_read_no_pm()
1121 return -EINVAL; in sdw_nread()
1127 return -EINVAL; in sdw_nread_no_pm()
1133 return -EINVAL; in sdw_nwrite()
1139 return -EINVAL; in sdw_nwrite_no_pm()
1145 return -EINVAL; in sdw_update()
1151 return -EINVAL; in sdw_update_no_pm()