Lines Matching +full:0 +full:x3a
18 #define MAX17042_DEFAULT_TEMP_MIN (0) /* For sys without temp sensor */
27 MAX17042_STATUS = 0x00,
28 MAX17042_VALRT_Th = 0x01,
29 MAX17042_TALRT_Th = 0x02,
30 MAX17042_SALRT_Th = 0x03,
31 MAX17042_AtRate = 0x04,
32 MAX17042_RepCap = 0x05,
33 MAX17042_RepSOC = 0x06,
34 MAX17042_Age = 0x07,
35 MAX17042_TEMP = 0x08,
36 MAX17042_VCELL = 0x09,
37 MAX17042_Current = 0x0A,
38 MAX17042_AvgCurrent = 0x0B,
40 MAX17042_SOC = 0x0D,
41 MAX17042_AvSOC = 0x0E,
42 MAX17042_RemCap = 0x0F,
43 MAX17042_FullCAP = 0x10,
44 MAX17042_TTE = 0x11,
45 MAX17042_V_empty = 0x12,
47 MAX17042_RSLOW = 0x14,
49 MAX17042_AvgTA = 0x16,
50 MAX17042_Cycles = 0x17,
51 MAX17042_DesignCap = 0x18,
52 MAX17042_AvgVCELL = 0x19,
53 MAX17042_MinMaxTemp = 0x1A,
54 MAX17042_MinMaxVolt = 0x1B,
55 MAX17042_MinMaxCurr = 0x1C,
56 MAX17042_CONFIG = 0x1D,
57 MAX17042_ICHGTerm = 0x1E,
58 MAX17042_AvCap = 0x1F,
59 MAX17042_ManName = 0x20,
60 MAX17042_DevName = 0x21,
62 MAX17042_FullCAPNom = 0x23,
63 MAX17042_TempNom = 0x24,
64 MAX17042_TempLim = 0x25,
65 MAX17042_TempHot = 0x26,
66 MAX17042_AIN = 0x27,
67 MAX17042_LearnCFG = 0x28,
68 MAX17042_FilterCFG = 0x29,
69 MAX17042_RelaxCFG = 0x2A,
70 MAX17042_MiscCFG = 0x2B,
71 MAX17042_TGAIN = 0x2C,
72 MAX17042_TOFF = 0x2D,
73 MAX17042_CGAIN = 0x2E,
74 MAX17042_COFF = 0x2F,
76 MAX17042_MaskSOC = 0x32,
77 MAX17042_SOC_empty = 0x33,
78 MAX17042_T_empty = 0x34,
80 MAX17042_FullCAP0 = 0x35,
81 MAX17042_IAvg_empty = 0x36,
82 MAX17042_FCTC = 0x37,
83 MAX17042_RCOMP0 = 0x38,
84 MAX17042_TempCo = 0x39,
85 MAX17042_EmptyTempCo = 0x3A,
86 MAX17042_K_empty0 = 0x3B,
87 MAX17042_TaskPeriod = 0x3C,
88 MAX17042_FSTAT = 0x3D,
90 MAX17042_SHDNTIMER = 0x3F,
92 MAX17042_dQacc = 0x45,
93 MAX17042_dPacc = 0x46,
95 MAX17042_VFSOC0 = 0x48,
97 MAX17042_QH = 0x4D,
98 MAX17042_QL = 0x4E,
100 MAX17042_VFSOC0Enable = 0x60,
101 MAX17042_MLOCKReg1 = 0x62,
102 MAX17042_MLOCKReg2 = 0x63,
104 MAX17042_MODELChrTbl = 0x80,
106 MAX17042_OCV = 0xEE,
108 MAX17042_OCVInternal = 0xFB, /* MAX17055 VFOCV */
110 MAX17042_VFSOC = 0xFF,
115 MAX17055_QRes = 0x0C,
116 MAX17055_RCell = 0x14,
117 MAX17055_TTF = 0x20,
118 MAX17055_DieTemp = 0x34,
119 MAX17055_USER_MEM = 0x40,
120 MAX17055_RGAIN = 0x43,
122 MAX17055_ConvgCfg = 0x49,
123 MAX17055_VFRemCap = 0x4A,
125 MAX17055_STATUS2 = 0xB0,
126 MAX17055_POWER = 0xB1,
127 MAX17055_ID = 0xB2,
128 MAX17055_AvgPower = 0xB3,
129 MAX17055_IAlrtTh = 0xB4,
130 MAX17055_TTFCfg = 0xB5,
131 MAX17055_CVMixCap = 0xB6,
132 MAX17055_CVHalfTime = 0xB7,
133 MAX17055_CGTempCo = 0xB8,
134 MAX17055_Curve = 0xB9,
135 MAX17055_HibCfg = 0xBA,
136 MAX17055_Config2 = 0xBB,
137 MAX17055_VRipple = 0xBC,
138 MAX17055_RippleCfg = 0xBD,
139 MAX17055_TimerH = 0xBE,
141 MAX17055_RSense = 0xD0,
142 MAX17055_ScOcvLim = 0xD1,
144 MAX17055_SOCHold = 0xD3,
145 MAX17055_MaxPeakPwr = 0xD4,
146 MAX17055_SusPeakPwr = 0xD5,
147 MAX17055_PackResistance = 0xD6,
148 MAX17055_SysResistance = 0xD7,
149 MAX17055_MinSysV = 0xD8,
150 MAX17055_MPPCurrent = 0xD9,
151 MAX17055_SPPCurrent = 0xDA,
152 MAX17055_ModelCfg = 0xDB,
153 MAX17055_AtQResidual = 0xDC,
154 MAX17055_AtTTE = 0xDD,
155 MAX17055_AtAvSOC = 0xDE,
156 MAX17055_AtAvCap = 0xDF,
161 MAX17047_QRTbl00 = 0x12,
162 MAX17047_FullSOCThr = 0x13,
163 MAX17047_QRTbl10 = 0x22,
164 MAX17047_QRTbl20 = 0x32,
165 MAX17047_V_empty = 0x3A,
166 MAX17047_TIMER = 0x3E,
167 MAX17047_QRTbl30 = 0x42,
171 MAXIM_DEVICE_TYPE_UNKNOWN = 0,
195 u16 tgain; /* 0x2C */
196 u16 toff; /* 0x2D */
197 u16 cgain; /* 0x2E */
198 u16 coff; /* 0x2F */
201 u16 valrt_thresh; /* 0x01 */
202 u16 talrt_thresh; /* 0x02 */
203 u16 soc_alrt_thresh; /* 0x03 */
204 u16 config; /* 0x01D */
205 u16 shdntimer; /* 0x03F */
208 u16 full_soc_thresh; /* 0x13 */
209 u16 design_cap; /* 0x18 */
210 u16 ichgt_term; /* 0x1E */
213 u16 at_rate; /* 0x04 */
214 u16 learn_cfg; /* 0x28 */
215 u16 filter_cfg; /* 0x29 */
216 u16 relax_cfg; /* 0x2A */
217 u16 misc_cfg; /* 0x2B */
218 u16 masksoc; /* 0x32 */
221 u16 fullcap; /* 0x10 */
222 u16 fullcapnom; /* 0x23 */
223 u16 socempty; /* 0x33 */
224 u16 iavg_empty; /* 0x36 */
225 u16 dqacc; /* 0x45 */
226 u16 dpacc; /* 0x46 */
227 u16 qrtbl00; /* 0x12 */
228 u16 qrtbl10; /* 0x22 */
229 u16 qrtbl20; /* 0x32 */
230 u16 qrtbl30; /* 0x42 */
236 u16 vempty; /* 0x12 */
237 u16 temp_nom; /* 0x24 */
238 u16 temp_lim; /* 0x25 */
239 u16 fctc; /* 0x37 */
240 u16 rcomp0; /* 0x38 */
241 u16 tcompc0; /* 0x39 */
242 u16 empty_tempco; /* 0x3A */
243 u16 kempty0; /* 0x3B */
256 * default 10000 (if r_sns = 0) as it is the recommended value by