Lines Matching +full:0 +full:x8ff
28 #define EC_PROTO_VERSION 0x00000002
34 #define EC_LPC_ADDR_ACPI_DATA 0x62
35 #define EC_LPC_ADDR_ACPI_CMD 0x66
38 #define EC_LPC_ADDR_HOST_DATA 0x200
39 #define EC_LPC_ADDR_HOST_CMD 0x204
43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
58 #define EC_HOST_CMD_REGION0 0x800
59 #define EC_HOST_CMD_REGION1 0x880
60 #define EC_HOST_CMD_REGION_SIZE 0x80
61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
64 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
72 #define EC_LPC_ADDR_MEMMAP 0x900
77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
80 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
85 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
86 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
87 /* Unused 0x28 - 0x2f */
88 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
89 /* Unused 0x31 - 0x33 */
90 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
92 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
93 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
94 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
95 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
96 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
97 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
98 /* Unused 0x4f */
99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
109 /* Unused 0x84 - 0x8f */
110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
111 /* Unused 0x91 */
112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
114 /* 0x94 - 0x99: 1st Accelerometer */
115 /* 0x9a - 0x9f: 2nd Accelerometer */
116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
117 /* Unused 0xa6 - 0xdf */
121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
124 #define EC_MEMMAP_NO_ACPI 0xe0
127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
142 #define EC_TEMP_SENSOR_ERROR 0xfe
143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
168 #define EC_BATT_FLAG_AC_PRESENT 0x01
169 #define EC_BATT_FLAG_BATT_PRESENT 0x02
170 #define EC_BATT_FLAG_DISCHARGING 0x04
171 #define EC_BATT_FLAG_CHARGING 0x08
172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
174 #define EC_BATT_FLAG_INVALID_DATA 0x20
177 #define EC_SWITCH_LID_OPEN 0x01
178 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
181 #define EC_SWITCH_IGNORE1 0x08
183 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
185 #define EC_SWITCH_IGNORE0 0x20
189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
191 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
194 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
195 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
196 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
197 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
220 #define EC_CMD_ACPI_READ 0x0080
235 #define EC_CMD_ACPI_WRITE 0x0081
244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
259 * event 0x80000000 = 32), or 0 if no event was pending.
261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
266 #define EC_ACPI_MEM_VERSION 0x00
268 * Test location; writing value here updates test compliment byte to (0xff -
271 #define EC_ACPI_MEM_TEST 0x01
273 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
275 /* Keyboard backlight brightness percent (0 - 100) */
276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
278 #define EC_ACPI_MEM_FAN_DUTY 0x04
291 * direction) since the last read. A value of 0xFF means "no new thresholds
295 #define EC_ACPI_MEM_TEMP_ID 0x05
296 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
297 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
300 * bit 0 selects the threshold index for the chosen sensor (0/1)
301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
310 * write 2 to [0x05] -- select temp sensor 2
311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
312 * write 0x2 to [0x07] -- enable threshold 0 with this value
313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
314 * write 0x3 to [0x07] -- enable threshold 1 with this value
317 * write 2 to [0x05] -- select temp sensor 2
318 * write 0x1 to [0x07] -- disable threshold 1
322 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
333 * 0 = Reserved for backward compatibility (indicates no valid
337 * 0 Tablet Mode Device Indicator (TBMD)
339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
340 #define EC_ACPI_MEM_TBMD_SHIFT 0
341 #define EC_ACPI_MEM_TBMD_MASK 0x1
343 #define EC_ACPI_MEM_DDPN_MASK 0x7
348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
351 * these are supported, it defaults to 0.
353 * the EC codebase would simply return 0xff to that unknown address. Check
354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
366 #define EC_ACPI_MEM_BATTERY_INDEX 0x12
370 * is enabled (1) or disabled (0).
371 * bit 0 USB port ID 0
375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13
378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
381 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20
382 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0
439 #define EC_LPC_STATUS_TO_HOST 0x01
441 #define EC_LPC_STATUS_FROM_HOST 0x02
443 #define EC_LPC_STATUS_PROCESSING 0x04
445 #define EC_LPC_STATUS_LAST_CMD 0x08
447 #define EC_LPC_STATUS_BURST_MODE 0x10
449 #define EC_LPC_STATUS_SCI_PENDING 0x20
451 #define EC_LPC_STATUS_SMI_PENDING 0x40
453 #define EC_LPC_STATUS_RESERVED 0x80
467 EC_RES_SUCCESS = 0,
491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
492 * EC command uses code 0 to mean "no event pending". We explicitly specify
599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
608 * response. Command version is 0 and response data from EC is at
611 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
653 #define EC_SPI_FRAME_START 0xec
658 #define EC_SPI_PAST_END 0xed
665 #define EC_SPI_RX_READY 0xf8
671 #define EC_SPI_RECEIVING 0xf9
674 #define EC_SPI_PROCESSING 0xfa
680 #define EC_SPI_RX_BAD_DATA 0xfb
687 #define EC_SPI_NOT_READY 0xfc
694 #define EC_SPI_OLD_READY 0xfd
701 * 0 EC_CMD_VERSION0 + (command version)
705 * N+3 8-bit checksum of bytes 0..N+2
709 * 0 Result code (EC_RES_*)
712 * M+2 8-bit checksum of bytes 0..M+1
725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
739 #define EC_COMMAND_PROTOCOL_3 0xda
749 * should total to 0.
752 * @reserved: Unused byte in current protocol version; set to 0.
770 * checksum should total to 0.
773 * @reserved: Unused bytes in current protocol version; set to 0.
797 * 103) q.seq_dup=0
810 * 301) If --tries_left <= 0, return error.
825 * 104) If q.seq_dup == 0, go to 201.
833 * 205) If r.data_len > 0 and data is no longer available, set e.result =
846 * bits 0-3: struct_version: Structure version (=4)
847 * bit 4: is_response: Is response (=0)
854 * bits 0-4: command_version: Command version
855 * bits 5-6: Reserved (set 0, ignore on read)
866 /* Reserved (set 0, ignore on read) */
876 * bits 0-3: struct_version: Structure version (=4)
884 * bits 0-6: Reserved (set 0, ignore on read)
895 /* Reserved (set 0, ignore on read) */
903 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
904 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
906 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60
907 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80
910 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */
911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
935 #define EC_CMD_PROTO_VERSION 0x0000
949 #define EC_CMD_HELLO 0x0001
961 * @out_data: Output will be in_data + 0x01020304.
968 #define EC_CMD_GET_VERSION 0x0002
971 EC_IMAGE_UNKNOWN = 0,
991 #define EC_CMD_READ_TEST 0x0003
1016 #define EC_CMD_GET_BUILD_INFO 0x0004
1019 #define EC_CMD_GET_CHIP_INFO 0x0005
1034 #define EC_CMD_GET_BOARD_VERSION 0x0006
1052 #define EC_CMD_READ_MEMMAP 0x0007
1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008
1100 #define EC_CMD_GET_COMMS_STATUS 0x0009
1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */
1117 #define EC_CMD_TEST_PROTOCOL 0x000A
1132 #define EC_CMD_GET_PROTOCOL_INFO 0x000B
1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1159 #define EC_GSV_SET 0x80000000
1165 #define EC_GSV_PARAM_MASK 0x00ffffff
1178 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1182 #define EC_CMD_GET_FEATURES 0x000D
1190 EC_FEATURE_LIMITED = 0,
1326 #define EC_CMD_GET_SKU_ID 0x000E
1329 #define EC_CMD_SET_SKU_ID 0x000F
1339 #define EC_CMD_FLASH_INFO 0x0010
1352 * Version 0 returns these fields.
1363 * EC flash erases bits to 0 instead of 1.
1365 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1392 * Version 1 returns the same initial fields as version 0, with additional
1396 * if they did we'd define the version 0 structure as a sub-structure of this
1406 /* Version 0 fields; see above for description */
1420 /* Reserved; set 0; ignore on read */
1435 /* Reserved; set 0; ignore on read */
1458 #define EC_CMD_FLASH_READ 0x0011
1471 #define EC_CMD_FLASH_WRITE 0x0012
1474 /* Version 0 of the flash command supported only 64 bytes of data */
1489 #define EC_CMD_FLASH_ERASE 0x0013
1527 * @reserved: Pad byte; currently always contains 0.
1528 * @flag: No flags defined yet; set to 0.
1541 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1546 * If mask=0, simply returns the current flags state.
1548 #define EC_CMD_FLASH_PROTECT 0x0015
1553 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1609 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1610 * write protect. These commands may be reused with version > 0.
1614 #define EC_CMD_FLASH_REGION_INFO 0x0016
1619 EC_FLASH_REGION_RO = 0,
1661 #define EC_CMD_VBNV_CONTEXT 0x0017
1681 #define EC_CMD_FLASH_SPI_INFO 0x0018
1684 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1687 /* Pad byte; currently always contains 0 */
1690 /* Manufacturer / device ID from command 0x90 */
1693 /* Status registers from command 0x05 and 0x35 */
1699 #define EC_CMD_FLASH_SELECT 0x0019
1703 * @select: 1 to select flash, 0 to deselect flash
1714 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1721 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1723 /* Version 0 of input params */
1736 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1745 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1752 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1754 /* Version 0 of input params */
1765 #define EC_CMD_PWM_SET_DUTY 0x0025
1766 /* 16 bit duty cycle, 0xffff = 100% */
1767 #define EC_PWM_MAX_DUTY 0xffff
1771 EC_PWM_TYPE_GENERIC = 0,
1782 uint8_t index; /* Type-specific index, or 0 if unique */
1785 #define EC_CMD_PWM_GET_DUTY 0x0026
1789 uint8_t index; /* Type-specific index, or 0 if unique */
1803 #define EC_CMD_LIGHTBAR_CMD 0x0028
1820 int32_t s0_tick_delay[2]; /* AC=0/1 */
1821 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1829 uint8_t osc_min[2]; /* AC=0/1 */
1830 uint8_t osc_max[2]; /* AC=0/1 */
1831 uint8_t w_ofs[2]; /* AC=0/1 */
1834 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1835 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1836 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1846 struct rgb_s color[8]; /* 0-3 are Google colors */
1854 int32_t s0_tick_delay[2]; /* AC=0/1 */
1855 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1875 uint8_t osc_min[2]; /* AC=0/1 */
1876 uint8_t osc_max[2]; /* AC=0/1 */
1877 uint8_t w_ofs[2]; /* AC=0/1 */
1880 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1881 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1882 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1895 struct rgb_s color[8]; /* 0-3 are Google colors */
1912 int32_t s0_tick_delay[2]; /* AC=0/1 */
1913 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1937 uint8_t osc_min[2]; /* AC=0/1 */
1938 uint8_t osc_max[2]; /* AC=0/1 */
1939 uint8_t w_ofs[2]; /* AC=0/1 */
1944 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1945 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1946 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1963 struct rgb_s color[8]; /* 0-3 are Google colors */
2070 LIGHTBAR_CMD_DUMP = 0,
2110 #define EC_CMD_LED_CONTROL 0x0029
2114 EC_LED_ID_BATTERY_LED = 0,
2135 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2139 EC_LED_COLOR_RED = 0,
2160 * Range 0 means color channel not present.
2171 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2172 * reused for other purposes with version > 0.
2176 #define EC_CMD_VBOOT_HASH 0x002A
2181 uint8_t nonce_size; /* Nonce size; may be 0 */
2182 uint8_t reserved0; /* Reserved; set 0 */
2185 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
2192 uint8_t reserved0; /* Ignore; will be 0 */
2199 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
2206 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
2210 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
2220 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2221 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2222 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2235 #define EC_CMD_MOTION_SENSE_CMD 0x002B
2243 MOTIONSENSE_CMD_DUMP = 0,
2365 MOTIONSENSE_TYPE_ACCEL = 0,
2378 MOTIONSENSE_LOC_BASE = 0,
2386 MOTIONSENSE_CHIP_KXCJ9 = 0,
2411 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2461 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2470 uint8_t enable; /* 1: enable, 0: disable */
2476 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2479 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2485 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2498 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2502 #define MOTION_SENSE_SET_OFFSET BIT(0)
2511 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2530 * 0 means the host is only interested in the number
2576 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2584 * 0x8000: invalid / unknown.
2585 * 0x0: 0C
2586 * 0x7fff: +327.67C
2605 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2613 * 0x8000: invalid / unknown.
2614 * 0x0: 0C
2615 * 0x7fff: +327.67C
2623 * ~2 = 0xFFFF
2624 * ~0 = 0.
2637 * EC may return less or 0 if none available.
2650 * 1: enable, 0 disable fifo,
2786 * Angle between 0 and 360 degree if available,
2811 #define EC_CMD_FORCE_LID_OPEN 0x002C
2819 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2823 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2835 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2850 #define EC_CMD_PSTORE_INFO 0x0040
2864 #define EC_CMD_PSTORE_READ 0x0041
2872 #define EC_CMD_PSTORE_WRITE 0x0042
2893 #define EC_CMD_RTC_GET_VALUE 0x0044
2894 #define EC_CMD_RTC_GET_ALARM 0x0045
2897 #define EC_CMD_RTC_SET_VALUE 0x0046
2898 #define EC_CMD_RTC_SET_ALARM 0x0047
2901 #define EC_RTC_ALARM_CLEAR 0
2910 #define EC_CMD_PORT80_LAST_BOOT 0x0048
2911 #define EC_CMD_PORT80_READ 0x0048
2914 EC_PORT80_GET_INFO = 0,
2955 #define EC_CMD_VSTORE_INFO 0x0049
2968 #define EC_CMD_VSTORE_READ 0x004A
2981 #define EC_CMD_VSTORE_WRITE 0x004B
2991 * Version 0 is what originally shipped on Link.
2995 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2996 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2998 /* The version 0 structs are opaque. You have to know what they are for
3002 /* Version 0 - set */
3009 /* Version 0 - get */
3022 EC_TEMP_THRESH_WARN = 0,
3037 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3077 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3085 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3086 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3102 /* Version 0 */
3137 #define EC_CMD_TMP006_GET_RAW 0x0055
3161 #define EC_CMD_MKBP_STATE 0x0060
3166 #define EC_CMD_MKBP_INFO 0x0061
3171 /* Formerly "switches", which was 0. */
3186 EC_MKBP_INFO_KBD = 0,
3220 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3228 #define EC_CMD_GET_KEYBOARD_ID 0x0063
3235 KEYBOARD_ID_UNSUPPORTED = 0,
3236 KEYBOARD_ID_UNREADABLE = 0xffffffff,
3240 #define EC_CMD_MKBP_SET_CONFIG 0x0064
3241 #define EC_CMD_MKBP_GET_CONFIG 0x0065
3249 EC_MKBP_VALID_SCAN_PERIOD = BIT(0),
3281 /* maximum depth to allow for fifo (0 = no keyscan output) */
3294 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3297 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
3309 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),
3331 uint8_t scan[0]; /* keyscan data */
3345 struct ec_collect_item item[0];
3355 #define EC_CMD_GET_NEXT_EVENT 0x0067
3370 EC_MKBP_EVENT_KEY_MATRIX = 0,
3514 #define EC_MKBP_POWER_BUTTON 0
3523 #define EC_MKBP_LID_OPEN 0
3529 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3536 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3537 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
3539 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3542 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3551 #define EC_MKBP_FP_ERR_ENROLL_OK 0
3559 #define EC_MKBP_FP_ERR_MATCH_NO 0
3573 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3587 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3610 #define EC_CMD_HOST_EVENT_GET_B 0x0087
3611 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3612 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3613 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3616 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3617 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3618 #define EC_CMD_HOST_EVENT_CLEAR 0x008C
3619 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3620 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3638 /* Set to 0, ignore on read */
3647 * Update the value on a GET request. Set to 0 on GET/CLEAR
3700 #define EC_CMD_HOST_EVENT 0x00A4
3706 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3713 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3716 /* Version 0 params; no response */
3753 #define EC_CMD_GPIO_SET 0x0092
3761 #define EC_CMD_GPIO_GET 0x0093
3763 /* Version 0 of input params and response */
3799 EC_GPIO_GET_BY_NAME = 0,
3809 * builds >= 8398.0.0 (see crosbug.com/p/23570).
3815 #define EC_CMD_I2C_READ 0x0094
3829 #define EC_CMD_I2C_WRITE 0x0095
3845 #define EC_CMD_CHARGE_CONTROL 0x0096
3849 CHARGE_CONTROL_NORMAL = 0,
3864 EC_CHARGE_CONTROL_CMD_SET = 0,
3869 EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0),
3906 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3920 #define EC_CMD_CONSOLE_READ 0x0098
3923 CONSOLE_READ_NEXT = 0,
3940 #define EC_CMD_BATTERY_CUT_OFF 0x0099
3942 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
3954 #define EC_CMD_USB_MUX 0x009A
3964 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
3971 #define EC_CMD_LDO_SET 0x009B
3981 #define EC_CMD_LDO_GET 0x009C
3997 #define EC_CMD_POWER_INFO 0x009D
4010 #define EC_CMD_I2C_PASSTHRU 0x009E
4016 #define EC_I2C_ADDR_MASK 0x3ff
4018 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */
4044 #define EC_CMD_HANG_DETECT 0x009F
4052 EC_HANG_DETECT_CMD_RELOAD = 0x0,
4055 EC_HANG_DETECT_CMD_CANCEL = 0x1,
4060 EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2,
4063 EC_HANG_DETECT_CMD_GET_STATUS = 0x3,
4068 EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4
4081 EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0,
4082 EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1,
4096 #define EC_CMD_CHARGE_STATE 0x00A0
4125 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4126 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4129 CS_PARAM_DEBUG_MIN = 0x20000,
4130 CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4137 CS_PARAM_DEBUG_MAX = 0x2ffff,
4180 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4189 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4197 #define EC_POWER_LIMIT_NONE 0xffff
4202 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4213 #define EC_CMD_HIBERNATION_DELAY 0x00A8
4217 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
4244 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4263 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4266 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4291 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4298 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4318 #define EC_CMD_DEVICE_EVENT 0x00AA
4351 #define EC_CMD_SB_READ_WORD 0x00B0
4352 #define EC_CMD_SB_WRITE_WORD 0x00B1
4357 #define EC_CMD_SB_READ_BLOCK 0x00B2
4358 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
4391 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4394 BATTERY_VENDOR_PARAM_MODE_GET = 0,
4412 #define EC_CMD_SB_FW_UPDATE 0x00B5
4415 EC_SB_FW_UPDATE_PREPARE = 0x0,
4416 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */
4417 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */
4418 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */
4419 EC_SB_FW_UPDATE_END = 0x4,
4420 EC_SB_FW_UPDATE_STATUS = 0x5,
4421 EC_SB_FW_UPDATE_PROTECT = 0x6,
4422 EC_SB_FW_UPDATE_MAX = 0x7,
4437 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
4438 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4439 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
4440 /* EC_SB_FW_UPDATE_END = 0x4 */
4441 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4442 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
4445 /* EC_SB_FW_UPDATE_WRITE = 0x3 */
4454 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4459 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4471 #define EC_CMD_ENTERING_MODE 0x00B6
4477 #define VBOOT_MODE_NORMAL 0
4486 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4489 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4490 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4499 uint8_t status; /* Status flags (0: unlocked, 1: locked) */
4516 * bits[27:0] : bitmask of events from enum mkbp_cec_event
4520 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28))
4521 #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0))
4522 #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf)
4525 #define EC_CMD_CEC_WRITE_MSG 0x00B8
4548 #define EC_CMD_CEC_READ_MSG 0x00B9
4569 #define EC_CMD_CEC_SET 0x00BA
4575 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
4578 * address between 0 and 15 or 0xff to unregister
4587 #define EC_CMD_CEC_GET 0x00BB
4601 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
4604 * configured logical address between 0 and 15 or 0xff if unregistered
4611 #define EC_CMD_CEC_PORT_COUNT 0x00C1
4632 EC_MKBP_CEC_SEND_OK = BIT(0),
4642 #define EC_CMD_EC_CODEC 0x00BC
4645 EC_CODEC_GET_CAPABILITIES = 0x0,
4646 EC_CODEC_GET_SHM_ADDR = 0x1,
4647 EC_CODEC_SET_SHM_ADDR = 0x2,
4652 EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4658 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4659 EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4664 EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4665 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4706 #define EC_CMD_EC_CODEC_DMIC 0x00BD
4709 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4710 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4711 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4716 EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4717 EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4718 EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4719 EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4720 EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4721 EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4722 EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4723 EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4762 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4765 EC_CODEC_I2S_RX_ENABLE = 0x0,
4766 EC_CODEC_I2S_RX_DISABLE = 0x1,
4767 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4768 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4769 EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4770 EC_CODEC_I2S_RX_RESET = 0x5,
4775 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4776 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4781 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4782 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4783 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4824 #define EC_CMD_EC_CODEC_WOV 0x00BF
4827 EC_CODEC_WOV_SET_LANG = 0x0,
4828 EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4829 EC_CODEC_WOV_GET_LANG = 0x2,
4830 EC_CODEC_WOV_ENABLE = 0x3,
4831 EC_CODEC_WOV_DISABLE = 0x4,
4832 EC_CODEC_WOV_READ_AUDIO = 0x5,
4833 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4890 #define EC_CMD_REBOOT_EC 0x00D2
4894 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
4906 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */
4921 #define EC_CMD_GET_PANIC_INFO 0x00D3
4940 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */
4949 #define EC_CMD_RESEND_RESPONSE 0x00DB
4952 * This header byte on a command indicate version 0. Any header byte less
4954 * versioning. In that case, we assume version 0.
4959 * The old EC interface must not use commands 0xdc or higher.
4961 #define EC_CMD_VERSION0 0x00DC
4971 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4975 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
4982 #define EC_STATUS_HIBERNATING BIT(0)
4991 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */
4994 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */
5008 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
5011 #define PD_EVENT_UPDATE_DEVICE BIT(0)
5020 #define EC_CMD_USB_PD_CONTROL 0x0101
5023 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
5033 USB_PD_CTRL_MUX_NO_CHANGE = 0,
5043 USB_PD_CTRL_SWAP_NONE = 0,
5057 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */
5061 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */
5062 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */
5084 #define USBC_PD_CC_NONE 0 /* No accessory connected */
5092 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
5113 #define EC_CMD_USB_PD_PORTS 0x0102
5122 #define EC_CMD_USB_PD_POWER_INFO 0x0103
5124 #define PD_POWER_CHARGING_PORT 0xff
5171 #define EC_CMD_CHARGE_PORT_COUNT 0x0105
5177 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
5195 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5210 #define EC_CMD_USB_PD_DEV_INFO 0x0112
5217 #define EC_CMD_USB_PD_DISCOVERY 0x0113
5225 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5231 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
5243 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5248 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
5250 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */
5256 #define PD_LOG_SIZE_MASK 0x1f
5257 #define PD_LOG_PORT_MASK 0xe0
5266 #define PD_EVENT_MCU_BASE 0x00
5267 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
5272 #define PD_EVENT_ACC_BASE 0x20
5273 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
5276 #define PD_EVENT_PS_BASE 0x40
5277 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
5279 #define PD_EVENT_VIDEO_BASE 0x60
5280 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5283 #define PD_EVENT_NO_ENTRY 0xff
5298 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5300 #define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5327 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5328 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5331 #define EC_CMD_USB_PD_GET_AMODE 0x0116
5343 #define EC_CMD_USB_PD_SET_AMODE 0x0117
5346 PD_EXIT_MODE = 0,
5360 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5364 uint8_t port; /* port#, or 0 for events unrelated to a given port */
5369 #define EC_CMD_PD_CONTROL 0x0119
5372 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */
5385 #define EC_CMD_USB_PD_MUX_INFO 0x011A
5392 #define USB_PD_MUX_NONE 0 /* Open switch */
5393 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
5406 #define EC_CMD_PD_CHIP_INFO 0x011B
5438 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C
5445 #define EC_CMD_RWSIG_ACTION 0x011D
5448 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */
5457 #define EC_CMD_EFS_VERIFY 0x011E
5468 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F
5473 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120
5476 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5491 #define CBI_GET_RELOAD BIT(0)
5506 #define CBI_SET_NO_SYNC BIT(0)
5519 #define EC_CMD_GET_UPTIME_INFO 0x0121
5572 #define EC_CMD_ADD_ENTROPY 0x0122
5576 ADD_ENTROPY_ASYNC = 0,
5594 #define EC_CMD_ADC_READ 0x0123
5607 #define EC_CMD_ROLLBACK_INFO 0x0124
5617 #define EC_CMD_AP_RESET 0x0125
5622 #define EC_CMD_PCHG_COUNT 0x0134
5633 #define EC_CMD_PCHG 0x0135
5652 PCHG_STATE_RESET = 0,
5688 #define EC_CMD_PCHG_UPDATE 0x0136
5693 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
5696 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
5698 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0)
5706 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0,
5738 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8));
5754 #define EC_CMD_REGULATOR_GET_INFO 0x012C
5775 #define EC_CMD_REGULATOR_ENABLE 0x012D
5785 * Returns 1 if the regulator is enabled, 0 if not.
5787 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5805 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5819 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5840 #define EC_CMD_TYPEC_DISCOVERY 0x0131
5843 TYPEC_PARTNER_SOP = 0,
5867 #define EC_CMD_TYPEC_CONTROL 0x0132
5932 #define EC_CMD_TYPEC_STATUS 0x0133
5942 PD_ROLE_SINK = 0,
5954 PD_ROLE_UFP = 0,
5960 PD_ROLE_VCONN_OFF = 0,
5965 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
5974 POLARITY_CC1 = 0,
5993 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
6032 * currently 0.
6033 * ex. PD 3.2 would map to 0x3200
6035 * PD major/minor will be 0 if no PD device is connected.
6049 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C
6077 /* The command range 0x200-0x2FF is reserved for Rotor. */
6083 #define EC_CMD_CR51_BASE 0x0300
6084 #define EC_CMD_CR51_LAST 0x03FF
6087 /* Fingerprint MCU commands: range 0x0400-0x040x */
6090 #define EC_CMD_FP_PASSTHRU 0x0400
6092 #define EC_FP_FLAG_NOT_COMPLETE 0x1
6101 #define EC_CMD_FP_MODE 0x0402
6104 #define FP_MODE_DEEPSLEEP BIT(0)
6134 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
6141 FP_CAPTURE_VENDOR_FORMAT = 0,
6167 #define EC_CMD_FP_INFO 0x0403
6170 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
6172 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
6219 #define EC_CMD_FP_FRAME 0x0404
6224 #define FP_FRAME_INDEX_RAW_IMAGE 0
6228 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
6245 /* Reserved bytes, set to 0. */
6267 #define EC_CMD_FP_TEMPLATE 0x0405
6270 #define FP_TEMPLATE_COMMIT 0x80000000
6279 #define EC_CMD_FP_CONTEXT 0x0406
6285 #define EC_CMD_FP_STATS 0x0407
6287 #define FPSTATS_CAPTURE_INV BIT(0)
6302 #define EC_CMD_FP_SEED 0x0408
6308 /* Reserved bytes, set to 0. */
6314 #define EC_CMD_FP_ENC_STATUS 0x0409
6317 #define FP_ENC_STATUS_SEED_SET BIT(0)
6327 /* Touchpad MCU commands: range 0x0500-0x05FF */
6330 #define EC_CMD_TP_SELF_TEST 0x0500
6333 #define EC_CMD_TP_FRAME_INFO 0x0501
6341 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
6344 #define EC_CMD_TP_FRAME_GET 0x0503
6353 /* EC-EC communication commands: range 0x0600-0x06FF */
6361 #define EC_CMD_BATTERY_GET_STATIC 0x0600
6396 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6429 #define EC_CMD_CHARGER_CONTROL 0x0602
6437 * >= 0.
6439 * max_current > 0).
6448 #define EC_CMD_USB_PD_MUX_ACK 0x0603
6463 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
6467 * #define EC_CMD_MAGIC_FOO 0x0000
6468 * #define EC_CMD_MAGIC_BAR 0x0001
6469 * #define EC_CMD_MAGIC_HEY 0x0002
6472 * EC_VER_MASK(0);
6475 * EC_VER_MASK(0);
6478 * EC_VER_MASK(0);
6480 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6481 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6499 * command is intended for. Device 0 is always the device receiving the
6503 * it on with the device number set back to 0. This allows the sub-processor
6507 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
6508 * AP sends command 0x4002 to the EC
6509 * EC sends command 0x0002 to the PD MCU
6514 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6515 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)