Lines Matching +full:hs +full:- +full:phy

1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
30 * send HS clock after the last associated Data Lane has
41 * Time, in UI, that the HS clock shall be driven by
43 * the transition from LP to HS mode.
53 * Lane LP-00 Line state immediately before the HS-0 Line
54 * state starting the HS transmission.
64 * Time interval, in picoseconds, during which the HS receiver
65 * should ignore any Clock Lane HS transitions, starting from
77 * the HS line termination.
86 * Time, in picoseconds, that the transmitter drives the HS-0
87 * state after the last payload clock bit of a HS transmission
97 * Time, in picoseconds, that the transmitter drives the HS-0
106 * the HS line termination.
116 * of @hs_trail or @clk_trail, to the start of the LP- 11
117 * state following a HS burst.
126 * Time, in picoseconds, that the transmitter drives LP-11
127 * following a HS burst.
137 * Lane LP-00 Line state immediately before the HS-0 Line
138 * state starting the HS transmission.
148 * Time interval, in picoseconds, during which the HS receiver
149 * shall ignore any Data Lane HS transitions, starting from
160 * Time interval, in picoseconds, during which the HS-RX
162 * HS burst. The end point of the interval is defined as the
163 * beginning of the LP-11 state following the HS burst.
175 * HS transmission burst
185 * Time, in picoseconds, that the transmitter drives the HS-0
203 * Transmitted length, in picoseconds, of any Low-Power state
214 * Bridge state (LP-00) after accepting control during a Link
225 * Bridge state (LP-00) before releasing control during a Link
236 * the LP-10 state before transmitting the Bridge state
237 * (LP-00) during a Link Turnaround.
247 * Time, in microseconds, that a transmitter drives a Mark-1
258 * Clock rate, in Hertz, of the high-speed clock.
265 * Clock rate, in Hertz, of the low-power clock.