linux/perf/arm_pmu.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
20  * The Armv7 and Armv8.8 or less CPU PMU supports up to 32 event counters.
21  * The Armv8.9/9.4 CPU PMU supports up to 33 event counters.
44 	[0 ... PERF_COUNT_HW_MAX - 1] = HW_OP_UNSUPPORTED
47 [0 ... C(MAX) - 1] = {							\
48 	[0 ... C(OP_MAX) - 1] = {					\
49 		[0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED,	\
68 	 * already have to allocate this struct per cpu.
104 	bool		secure_access; /* 32-bit ARM only */
113 	/* the attr_groups array must be NULL-terminated */
180 int armpmu_request_irq(int irq, int cpu);
181 void armpmu_free_irq(int irq, int cpu);
183 #define ARMV8_PMU_PDEV_NAME "armv8-pmu"
187 #define ARMV8_SPE_PDEV_NAME "arm,spe-v1"
191 #define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\  argument
192 	(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
194 #define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\  argument
195 	__GEN_PMU_FORMAT_ATTR(cfg, lo, hi)
203 #define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi)				\  argument
204 	((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0))