Lines Matching +full:msi +full:- +full:base +full:- +full:vec
1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
60 * The PCI interface treats multi-function devices as independent
68 * In the interest of not exposing interfaces to user-space unnecessarily,
69 * the following kernel-only defines are being added here.
80 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
86 return kobject_name(&slot->kobj); in pci_slot_name()
97 /* #0-5: standard PCI resources */
99 PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1,
104 /* Device-specific resources */
107 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
110 /* PCI-to-PCI (P2P) bridge windows */
127 PCI_BRIDGE_RESOURCE_NUM - 1,
137 * enum pci_interrupt_pin - PCI INTx interrupt values
179 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
224 /* INTX_DISABLE in PCI_COMMAND register disables MSI too */
230 /* Flag for quirk use to store if quirk-specific ACS is enabled */
232 /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */
236 /* Do not use PM reset even if device advertises NoSoftRst- */
240 /* A non-root bridge where translation occurs, stop alias search here */
246 /* Device does honor MSI masking despite saying otherwise */
323 struct list_head bus_list; /* Node in per-bus list */
327 void *sysdata; /* Hook for sys-specific extension */
336 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
349 u8 msi_cap; /* MSI capability offset */
350 u8 msix_cap; /* MSI-X capability offset */
362 or supports 64-bit transfers. */
367 this is D0-D3, D0 being fully
385 unsigned int skip_bus_pm:1; /* Internal: Skip bus-level PM */
392 unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
393 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
402 unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
410 * Instead of touching interrupt line and base address registers
422 unsigned int pref_64_window:1; /* Pref mem window is 64-bit */
423 unsigned int multifunction:1; /* Multi-function device */
426 unsigned int no_msi:1; /* May not use MSI */
427 unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
438 unsigned int is_msi_managed:1; /* MSI release via devres installed */
456 * device as "external-facing". An external-facing device is
500 struct pci_sriov *sriov; /* PF: SR-IOV info */
542 if (dev->is_virtfn) in pci_physfn()
543 dev = dev->physfn; in pci_physfn()
555 return (pdev->error_state != pci_channel_io_normal); in pci_channel_offline()
560 * Group number is limited to a 16-bit value, therefore (int)-1 is
562 * value indicating ->domain_nr is not set by the driver (and
566 #define PCI_DOMAIN_NR_NOT_SET (-1)
594 unsigned int msi_domain:1; /* Bridge wants MSI domain */
609 return (void *)bridge->private; in pci_host_bridge_priv()
639 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
665 void *sysdata; /* Hook for sys-specific extension */
692 return PCI_DEVID(dev->bus->number, dev->devfn); in pci_dev_id()
696 * Returns true if the PCI bus is root (behind host-PCI bridge),
699 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
700 * This is incorrect because "virtual" buses added for SR-IOV (via
701 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
705 return !(pbus->parent); in pci_is_root_bus()
709 * pci_is_bridge - check if the PCI device is a bridge
717 return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || in pci_is_bridge()
718 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; in pci_is_bridge()
722 * pci_is_vga - check if the PCI device is a VGA device
726 * VGA Base Class and Sub-Classes:
728 * 03 00 PCI_CLASS_DISPLAY_VGA VGA-compatible or 8514-compatible
729 * 00 01 PCI_CLASS_NOT_DEFINED_VGA VGA-compatible (before Class Code)
732 * resources ([mem 0xa0000-0xbffff], [io 0x3b0-0x3bb], [io 0x3c0-0x3df] and
737 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) in pci_is_vga()
740 if ((pdev->class >> 8) == PCI_CLASS_NOT_DEFINED_VGA) in pci_is_vga()
747 list_for_each_entry(dev, &bus->devices, bus_list) \
753 if (pci_is_root_bus(dev->bus)) in pci_upstream_bridge()
756 return dev->bus->self; in pci_upstream_bridge()
762 return pci_dev->msi_enabled || pci_dev->msix_enabled; in pci_dev_msi_enabled()
777 /* Translate above to generic errno for passing back through non-PCI code */
785 return -ENOENT; in pcibios_err_to_errno()
787 return -ENOTTY; in pcibios_err_to_errno()
789 return -ENODEV; in pcibios_err_to_errno()
791 return -EFAULT; in pcibios_err_to_errno()
793 return -EIO; in pcibios_err_to_errno()
795 return -ENOSPC; in pcibios_err_to_errno()
798 return -ERANGE; in pcibios_err_to_errno()
801 /* Low-level architecture-dependent routines */
838 * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
872 /* MMIO has been re-enabled, but not DMA */
893 * struct pci_driver - PCI driver structure
913 * pulled out of a hot-pluggable slot).
922 * Useful for enabling wake-on-lan (NIC) or changing
927 * @sriov_set_msix_vec_count: PF Driver callback to change number of MSI-X
929 * This will change MSI-X Table Size in the VF Message Control
932 * MSI-X vectors available for distribution to the VFs.
933 * @err_handler: See Documentation/PCI/pci-error-recovery.rst
949 const struct pci_device_id *id_table; /* Must be non-NULL for probe to be called */
951 void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
970 * PCI_DEVICE - macro used to describe a specific PCI device
983 * PCI_DEVICE_DRIVER_OVERRIDE - macro used to describe a PCI device with
998 * PCI_DRIVER_OVERRIDE_DEVICE_VFIO - macro used to describe a VFIO
1012 * PCI_DEVICE_SUB - macro used to describe a specific PCI device with subsystem
1026 * PCI_DEVICE_CLASS - macro used to describe a specific PCI device class
1027 * @dev_class: the class, subclass, prog-if triple for this device
1040 * PCI_VDEVICE - macro used to describe a specific PCI device in short form
1054 * PCI_DEVICE_DATA - macro used to describe a specific PCI device in very short form
1079 #define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
1080 #define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
1081 #define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
1098 PCIE_BUS_SAFE, /* Use largest MPS boot-time devices support */
1107 /* Do NOT directly access these two variables, unless you are arch-specific PCI
1119 /* Architecture-specific versions may override this (weak) */
1184 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
1185 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
1260 * pcie_capability_clear_and_set_word - RMW accessor for PCI Express Capability Registers
1266 * Perform a Read-Modify-Write (RMW) operation using @clear and @set
1310 /* User-space driven config access */
1330 return !pdev->broken_intx_masking; in pci_intx_mask_supported()
1335 return (atomic_read(&pdev->enable_cnt) > 0); in pci_is_enabled()
1340 return pdev->is_managed; in pci_is_managed()
1393 return max(ilog2(bytes), 20) - 20; in pci_rebar_bytes_to_size()
1456 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1485 return __request_region(&pdev->driver_exclusive_resource, offset, len, in pci_request_config_region_exclusive()
1493 __release_region(&pdev->driver_exclusive_resource, offset, len); in pci_release_config_region()
1523 * pci_bus_for_each_resource - iterate over PCI bus resources
1577 pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]); in pci_bus_address()
1581 /* Proper probing supporting hot-pluggable devices */
1592 * module_pci_driver() - Helper macro for registering a PCI driver
1603 * builtin_pci_driver() - Helper macro for registering a PCI driver
1643 * into the device's MSI-X table and must be handled by some
1688 const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec);
1691 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } in pci_msi_vec_count()
1693 static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } in pci_msix_vec_count()
1698 { return -ENOSYS; } in pci_enable_msi()
1701 { return -ENOSYS; } in pci_enable_msix_range()
1704 { return -ENOSYS; } in pci_enable_msix_exact()
1711 if ((flags & PCI_IRQ_INTX) && min_vecs == 1 && dev->irq) in pci_alloc_irq_vectors_affinity()
1713 return -ENOSPC; in pci_alloc_irq_vectors_affinity()
1728 struct msi_map map = { .index = -ENOSYS, }; in pci_msix_alloc_irq_at()
1744 return -EINVAL; in pci_irq_vector()
1745 return dev->irq; in pci_irq_vector()
1748 int vec) in pci_irq_get_affinity() argument
1755 * pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq
1763 * Translate a PCI INTx interrupt number from device tree in the range 1-4, as
1765 * 0-3 suitable for use in a 4 entry IRQ domain. That is, subtract one from the
1768 * Returns 0 on success, or -EINVAL if the interrupt specifier is out of range.
1780 return -EINVAL; in pci_irqd_intx_xlate()
1782 *out_hwirq = intx - PCI_INTERRUPT_INTA; in pci_irqd_intx_xlate()
1798 #define PCIE_LINK_STATE_L1_1_PCIPM BIT(5) /* PCI-PM L1.1 state */
1799 #define PCIE_LINK_STATE_L1_2_PCIPM BIT(6) /* PCI-PM L1.2 state */
1846 { return -EINVAL; } in pci_enable_ptm()
1882 return bus->domain_nr; in pci_domain_nr()
1977 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } in pci_enable_device()
1979 static inline int pcim_enable_device(struct pci_dev *pdev) { return -EIO; } in pcim_enable_device()
1981 { return -EBUSY; } in pci_assign_resource()
2019 { return -EIO; } in pci_request_regions()
2024 { return -EINVAL; } in pci_register_io_range()
2026 static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; } in pci_address_to_pio()
2050 { return -EINVAL; } in pci_irqd_intx_xlate()
2059 return -EINVAL; in pci_irq_vector()
2067 return -ENOSPC; in pci_alloc_irq_vectors_affinity()
2073 return -ENOSPC; in pci_alloc_irq_vectors()
2077 /* Include architecture-dependent settings and functions */
2082 * pci_mmap_resource_range() maps a specific BAR, and vm->vm_pgoff
2096 #define pci_iobar_pfn(pdev, bar, vma) (-EINVAL)
2109 #define pci_resource_n(dev, bar) (&(dev)->resource[(bar)])
2110 #define pci_resource_start(dev, bar) (pci_resource_n(dev, bar)->start)
2111 #define pci_resource_end(dev, bar) (pci_resource_n(dev, bar)->end)
2112 #define pci_resource_flags(dev, bar) (pci_resource_n(dev, bar)->flags)
2132 * Similar to the helpers above, these manipulate per-pci_dev
2133 * driver-specific data. They are really just a wrapper around
2138 return dev_get_drvdata(&pdev->dev); in pci_get_drvdata()
2143 dev_set_drvdata(&pdev->dev, data); in pci_set_drvdata()
2148 return dev_name(&pdev->dev); in pci_name()
2157 * For at least a part of these bugs we need a work-around, so both
2158 * generic (drivers/pci/quirks.c) and per-architecture code can define
2193 ".long " #hook " - . \n" \
2323 /* Architecture-specific versions may override these (weak) */
2383 return -ENOSYS; in pci_iov_virtfn_bus()
2387 return -ENOSYS; in pci_iov_virtfn_devfn()
2392 return -ENOSYS; in pci_iov_vf_id()
2398 return ERR_PTR(-EINVAL); in pci_iov_get_pf_drvdata()
2402 { return -ENODEV; } in pci_enable_sriov()
2407 return -ENODEV; in pci_iov_sysfs_link()
2411 return -ENOSYS; in pci_iov_add_virtfn()
2435 * pci_pcie_cap - get the saved PCIe capability offset
2447 return dev->pcie_cap; in pci_pcie_cap()
2451 * pci_is_pcie - check if the PCI device is PCI Express capable
2462 * pcie_caps_reg - get the PCIe Capabilities Register
2467 return dev->pcie_flags_reg; in pcie_caps_reg()
2471 * pci_pcie_type - get the PCIe device/port type
2480 * pcie_find_root_port - Get the PCIe root port device
2505 return READ_ONCE(dev->error_state) == pci_channel_io_perm_failure; in pci_dev_is_disconnected()
2519 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
2520 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
2533 * pci_vpd_alloc - Allocate buffer and read VPD into it
2542 * pci_vpd_find_id_string - Locate id string in VPD
2547 * Returns the index of the id string or -ENOENT if not found.
2552 * pci_vpd_find_ro_info_keyword - Locate info field keyword in VPD RO section
2558 * Returns the index of the information field keyword data or -ENOENT if
2565 * pci_vpd_check_csum - Check VPD checksum
2573 /* PCI <-> OF binding helpers */
2592 return pdev ? pdev->dev.of_node : NULL; in pci_device_to_OF_node()
2597 return bus ? bus->dev.of_node : NULL; in pci_bus_to_OF_node()
2615 return pdev->dev.archdata.edev; in pci_dev_to_eeh_dev()
2628 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; in pci_set_dev_assigned()
2632 pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; in pci_clear_dev_assigned()
2636 return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; in pci_is_dev_assigned()
2640 * pci_ari_enabled - query ARI forwarding status
2647 return bus->self && bus->self->ari_enabled; in pci_ari_enabled()
2651 * pci_is_thunderbolt_attached - whether device is on a Thunderbolt daisy chain
2656 * Thunderbolt-attached. (But rather soldered to the mainboard usually.)
2662 if (pdev->is_thunderbolt) in pci_is_thunderbolt_attached()
2666 if (parent->is_thunderbolt) in pci_is_thunderbolt_attached()
2676 #include <linux/dma-mapping.h>
2679 dev_printk(level, &(pdev)->dev, fmt, ##arg)
2681 #define pci_emerg(pdev, fmt, arg...) dev_emerg(&(pdev)->dev, fmt, ##arg)
2682 #define pci_alert(pdev, fmt, arg...) dev_alert(&(pdev)->dev, fmt, ##arg)
2683 #define pci_crit(pdev, fmt, arg...) dev_crit(&(pdev)->dev, fmt, ##arg)
2684 #define pci_err(pdev, fmt, arg...) dev_err(&(pdev)->dev, fmt, ##arg)
2685 #define pci_warn(pdev, fmt, arg...) dev_warn(&(pdev)->dev, fmt, ##arg)
2686 #define pci_warn_once(pdev, fmt, arg...) dev_warn_once(&(pdev)->dev, fmt, ##arg)
2687 #define pci_notice(pdev, fmt, arg...) dev_notice(&(pdev)->dev, fmt, ##arg)
2688 #define pci_info(pdev, fmt, arg...) dev_info(&(pdev)->dev, fmt, ##arg)
2689 #define pci_dbg(pdev, fmt, arg...) dev_dbg(&(pdev)->dev, fmt, ##arg)
2692 dev_notice_ratelimited(&(pdev)->dev, fmt, ##arg)
2695 dev_info_ratelimited(&(pdev)->dev, fmt, ##arg)
2699 dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg)
2703 dev_driver_string(&(pdev)->dev), pci_name(pdev), ##arg)