Lines Matching +full:quad +full:- +full:core

1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <linux/spi/spi-mem.h>
18 * requires a 4-byte (32-bit) address.
32 #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
33 #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
37 #define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */
38 #define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */
53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
58 #define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
59 #define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
63 #define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */
64 #define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */
71 /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
85 #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
86 #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */
121 #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */
207 * struct spi_nor_hwcaps - Structure for describing the hardware capabilies
219 * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly
249 * Like (Fast) Read capabilities, Octal/Quad SPI protocols are preferred to the
250 * legacy SPI 1-1-1 protocol.
291 * struct spi_nor_controller_ops - SPI NOR controller driver specific
319 * enum spi_nor_cmd_ext - describes the command opcode extension in DTR mode
325 * combine to form a 16-bit opcode.
335 * Forward declarations that are used internally by the core and manufacturer
343 * struct spi_nor - Structure for defining the SPI NOR layer
346 * @rww: Read-While-Write (RWW) sync lock
355 * layer is not DMA-able
375 * @params: [FLASH-SPECIFIC] SPI NOR flash parameters and settings.
428 mtd_set_of_node(&nor->mtd, np); in spi_nor_set_flash_node()
433 return mtd_get_of_node(&nor->mtd); in spi_nor_get_flash_node()
437 * spi_nor_scan() - scan the SPI NOR