linux/mtd/spi-nor.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <linux/spi/spi-mem.h>
18  * requires a 4-byte (32-bit) address.
30 #define SPINOR_OP_READ_1_1_2	0x3b	/* Read data bytes (Dual Output SPI) */
31 #define SPINOR_OP_READ_1_2_2	0xbb	/* Read data bytes (Dual I/O SPI) */
32 #define SPINOR_OP_READ_1_1_4	0x6b	/* Read data bytes (Quad Output SPI) */
33 #define SPINOR_OP_READ_1_4_4	0xeb	/* Read data bytes (Quad I/O SPI) */
34 #define SPINOR_OP_READ_1_1_8	0x8b	/* Read data bytes (Octal Output SPI) */
35 #define SPINOR_OP_READ_1_8_8	0xcb	/* Read data bytes (Octal I/O SPI) */
53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
56 #define SPINOR_OP_READ_1_1_2_4B	0x3c	/* Read data bytes (Dual Output SPI) */
57 #define SPINOR_OP_READ_1_2_2_4B	0xbc	/* Read data bytes (Dual I/O SPI) */
58 #define SPINOR_OP_READ_1_1_4_4B	0x6c	/* Read data bytes (Quad Output SPI) */
59 #define SPINOR_OP_READ_1_4_4_4B	0xec	/* Read data bytes (Quad I/O SPI) */
60 #define SPINOR_OP_READ_1_1_8_4B	0x7c	/* Read data bytes (Octal Output SPI) */
61 #define SPINOR_OP_READ_1_8_8_4B	0xcc	/* Read data bytes (Octal I/O SPI) */
71 /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
85 #define SPINOR_OP_EN4B		0xb7	/* Enter 4-byte mode */
86 #define SPINOR_OP_EX4B		0xe9	/* Exit 4-byte mode */
130 /* Supported SPI protocols */
207  * struct spi_nor_hwcaps - Structure for describing the hardware capabilies
208  * supported by the SPI controller (bus master).
218  * As a matter of performances, it is relevant to use Octal SPI protocols first,
219  * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly
249  * Like (Fast) Read capabilities, Octal/Quad SPI protocols are preferred to the
250  * legacy SPI 1-1-1 protocol.
252  * JEDEC/SFDP standard to define them. Also at this moment no SPI flash memory
291  * struct spi_nor_controller_ops - SPI NOR controller driver specific
299  * @read:		read data from the SPI NOR.
300  * @write:		write data to the SPI NOR.
301  * @erase:		erase a sector of the SPI NOR at the offset @offs; if
302  *			not provided by the driver, SPI NOR will send the erase
306 	int (*prepare)(struct spi_nor *nor);
307 	void (*unprepare)(struct spi_nor *nor);
308 	int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, size_t len);
309 	int (*write_reg)(struct spi_nor *nor, u8 opcode, const u8 *buf,
312 	ssize_t (*read)(struct spi_nor *nor, loff_t from, size_t len, u8 *buf);
313 	ssize_t (*write)(struct spi_nor *nor, loff_t to, size_t len,
315 	int (*erase)(struct spi_nor *nor, loff_t offs);
319  * enum spi_nor_cmd_ext - describes the command opcode extension in DTR mode
321  *		      SPI mode
325  *		     combine to form a 16-bit opcode.
343  * struct spi_nor - Structure for defining the SPI NOR layer
346  * @rww:		Read-While-Write (RWW) sync lock
352  * @dev:		pointer to an SPI device or an SPI NOR controller device
353  * @spimem:		pointer to the SPI memory device
355  *                      layer is not DMA-able
359  * @info:		SPI NOR part JEDEC MFR ID and other info
360  * @manufacturer:	SPI NOR manufacturer
367  * @flags:		flag options for the current SPI NOR (SNOR_F_*)
369  * @read_proto:		the SPI protocol for read operations
370  * @write_proto:	the SPI protocol for write operations
371  * @reg_proto:		the SPI protocol for read_reg/write_reg/erase operations
374  * @controller_ops:	SPI NOR controller driver specific operations.
375  * @params:		[FLASH-SPECIFIC] SPI NOR flash parameters and settings.
425 static inline void spi_nor_set_flash_node(struct spi_nor *nor,  in spi_nor_set_flash_node()  argument
428 	mtd_set_of_node(&nor->mtd, np);  in spi_nor_set_flash_node()
431 static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)  in spi_nor_get_flash_node()  argument
433 	return mtd_get_of_node(&nor->mtd);  in spi_nor_get_flash_node()
437  * spi_nor_scan() - scan the SPI NOR
438  * @nor:	the spi_nor structure
442  * The drivers can use this function to scan the SPI NOR.
450 int spi_nor_scan(struct spi_nor *nor, const char *name,