Lines Matching +full:1 +full:kib

25 #define SPINOR_OP_WRSR		0x01	/* Write status register 1 byte */
41 #define SPINOR_OP_BE_4K		0x20	/* Erase 4KiB block */
42 #define SPINOR_OP_BE_4K_PMC	0xd7	/* Erase 4KiB block on PMC chips */
43 #define SPINOR_OP_BE_32K	0x52	/* Erase 32KiB block */
45 #define SPINOR_OP_SE		0xd8	/* Sector erase (usually 64KiB) */
67 #define SPINOR_OP_BE_4K_4B	0x21	/* Erase 4KiB block */
68 #define SPINOR_OP_BE_32K_4B	0x5c	/* Erase 32KiB block */
69 #define SPINOR_OP_SE_4B		0xdc	/* Sector erase (usually 64KiB) */
102 #define SR_WEL			BIT(1)	/* Write enable latch */
105 #define SR_BP1			BIT(3)	/* Block protect 1 */
124 #define SR2_QUAD_EN_BIT1	BIT(1)
125 #define SR2_LB1			BIT(3)	/* Security Register Lock Bit 1 */
160 	SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1),
161 	SNOR_PROTO_1_1_2 = SNOR_PROTO_STR(1, 1, 2),
162 	SNOR_PROTO_1_1_4 = SNOR_PROTO_STR(1, 1, 4),
163 	SNOR_PROTO_1_1_8 = SNOR_PROTO_STR(1, 1, 8),
164 	SNOR_PROTO_1_2_2 = SNOR_PROTO_STR(1, 2, 2),
165 	SNOR_PROTO_1_4_4 = SNOR_PROTO_STR(1, 4, 4),
166 	SNOR_PROTO_1_8_8 = SNOR_PROTO_STR(1, 8, 8),
171 	SNOR_PROTO_1_1_1_DTR = SNOR_PROTO_DTR(1, 1, 1),
172 	SNOR_PROTO_1_2_2_DTR = SNOR_PROTO_DTR(1, 2, 2),
173 	SNOR_PROTO_1_4_4_DTR = SNOR_PROTO_DTR(1, 4, 4),
174 	SNOR_PROTO_1_8_8_DTR = SNOR_PROTO_DTR(1, 8, 8),
224 #define SNOR_HWCAPS_READ_FAST		BIT(1)
250  * legacy SPI 1-1-1 protocol.