Lines Matching +full:0 +full:x0020
14 * R2 (0x02) - Power Management (1)
16 #define WM8400_CODEC_ENA 0x8000 /* CODEC_ENA */
17 #define WM8400_CODEC_ENA_MASK 0x8000 /* CODEC_ENA */
20 #define WM8400_SYSCLK_ENA 0x4000 /* SYSCLK_ENA */
21 #define WM8400_SYSCLK_ENA_MASK 0x4000 /* SYSCLK_ENA */
24 #define WM8400_SPK_MIX_ENA 0x2000 /* SPK_MIX_ENA */
25 #define WM8400_SPK_MIX_ENA_MASK 0x2000 /* SPK_MIX_ENA */
28 #define WM8400_SPK_ENA 0x1000 /* SPK_ENA */
29 #define WM8400_SPK_ENA_MASK 0x1000 /* SPK_ENA */
32 #define WM8400_OUT3_ENA 0x0800 /* OUT3_ENA */
33 #define WM8400_OUT3_ENA_MASK 0x0800 /* OUT3_ENA */
36 #define WM8400_OUT4_ENA 0x0400 /* OUT4_ENA */
37 #define WM8400_OUT4_ENA_MASK 0x0400 /* OUT4_ENA */
40 #define WM8400_LOUT_ENA 0x0200 /* LOUT_ENA */
41 #define WM8400_LOUT_ENA_MASK 0x0200 /* LOUT_ENA */
44 #define WM8400_ROUT_ENA 0x0100 /* ROUT_ENA */
45 #define WM8400_ROUT_ENA_MASK 0x0100 /* ROUT_ENA */
48 #define WM8400_MIC1BIAS_ENA 0x0010 /* MIC1BIAS_ENA */
49 #define WM8400_MIC1BIAS_ENA_MASK 0x0010 /* MIC1BIAS_ENA */
52 #define WM8400_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */
55 #define WM8400_VREF_ENA 0x0001 /* VREF_ENA */
56 #define WM8400_VREF_ENA_MASK 0x0001 /* VREF_ENA */
57 #define WM8400_VREF_ENA_SHIFT 0 /* VREF_ENA */
61 * R3 (0x03) - Power Management (2)
63 #define WM8400_FLL_ENA 0x8000 /* FLL_ENA */
64 #define WM8400_FLL_ENA_MASK 0x8000 /* FLL_ENA */
67 #define WM8400_TSHUT_ENA 0x4000 /* TSHUT_ENA */
68 #define WM8400_TSHUT_ENA_MASK 0x4000 /* TSHUT_ENA */
71 #define WM8400_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */
72 #define WM8400_TSHUT_OPDIS_MASK 0x2000 /* TSHUT_OPDIS */
75 #define WM8400_OPCLK_ENA 0x0800 /* OPCLK_ENA */
76 #define WM8400_OPCLK_ENA_MASK 0x0800 /* OPCLK_ENA */
79 #define WM8400_AINL_ENA 0x0200 /* AINL_ENA */
80 #define WM8400_AINL_ENA_MASK 0x0200 /* AINL_ENA */
83 #define WM8400_AINR_ENA 0x0100 /* AINR_ENA */
84 #define WM8400_AINR_ENA_MASK 0x0100 /* AINR_ENA */
87 #define WM8400_LIN34_ENA 0x0080 /* LIN34_ENA */
88 #define WM8400_LIN34_ENA_MASK 0x0080 /* LIN34_ENA */
91 #define WM8400_LIN12_ENA 0x0040 /* LIN12_ENA */
92 #define WM8400_LIN12_ENA_MASK 0x0040 /* LIN12_ENA */
95 #define WM8400_RIN34_ENA 0x0020 /* RIN34_ENA */
96 #define WM8400_RIN34_ENA_MASK 0x0020 /* RIN34_ENA */
99 #define WM8400_RIN12_ENA 0x0010 /* RIN12_ENA */
100 #define WM8400_RIN12_ENA_MASK 0x0010 /* RIN12_ENA */
103 #define WM8400_ADCL_ENA 0x0002 /* ADCL_ENA */
104 #define WM8400_ADCL_ENA_MASK 0x0002 /* ADCL_ENA */
107 #define WM8400_ADCR_ENA 0x0001 /* ADCR_ENA */
108 #define WM8400_ADCR_ENA_MASK 0x0001 /* ADCR_ENA */
109 #define WM8400_ADCR_ENA_SHIFT 0 /* ADCR_ENA */
113 * R4 (0x04) - Power Management (3)
115 #define WM8400_LON_ENA 0x2000 /* LON_ENA */
116 #define WM8400_LON_ENA_MASK 0x2000 /* LON_ENA */
119 #define WM8400_LOP_ENA 0x1000 /* LOP_ENA */
120 #define WM8400_LOP_ENA_MASK 0x1000 /* LOP_ENA */
123 #define WM8400_RON_ENA 0x0800 /* RON_ENA */
124 #define WM8400_RON_ENA_MASK 0x0800 /* RON_ENA */
127 #define WM8400_ROP_ENA 0x0400 /* ROP_ENA */
128 #define WM8400_ROP_ENA_MASK 0x0400 /* ROP_ENA */
131 #define WM8400_LOPGA_ENA 0x0080 /* LOPGA_ENA */
132 #define WM8400_LOPGA_ENA_MASK 0x0080 /* LOPGA_ENA */
135 #define WM8400_ROPGA_ENA 0x0040 /* ROPGA_ENA */
136 #define WM8400_ROPGA_ENA_MASK 0x0040 /* ROPGA_ENA */
139 #define WM8400_LOMIX_ENA 0x0020 /* LOMIX_ENA */
140 #define WM8400_LOMIX_ENA_MASK 0x0020 /* LOMIX_ENA */
143 #define WM8400_ROMIX_ENA 0x0010 /* ROMIX_ENA */
144 #define WM8400_ROMIX_ENA_MASK 0x0010 /* ROMIX_ENA */
147 #define WM8400_DACL_ENA 0x0002 /* DACL_ENA */
148 #define WM8400_DACL_ENA_MASK 0x0002 /* DACL_ENA */
151 #define WM8400_DACR_ENA 0x0001 /* DACR_ENA */
152 #define WM8400_DACR_ENA_MASK 0x0001 /* DACR_ENA */
153 #define WM8400_DACR_ENA_SHIFT 0 /* DACR_ENA */
157 * R5 (0x05) - Audio Interface (1)
159 #define WM8400_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */
160 #define WM8400_AIFADCL_SRC_MASK 0x8000 /* AIFADCL_SRC */
163 #define WM8400_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */
164 #define WM8400_AIFADCR_SRC_MASK 0x4000 /* AIFADCR_SRC */
167 #define WM8400_AIFADC_TDM 0x2000 /* AIFADC_TDM */
168 #define WM8400_AIFADC_TDM_MASK 0x2000 /* AIFADC_TDM */
171 #define WM8400_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */
172 #define WM8400_AIFADC_TDM_CHAN_MASK 0x1000 /* AIFADC_TDM_CHAN */
175 #define WM8400_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */
176 #define WM8400_AIF_BCLK_INV_MASK 0x0100 /* AIF_BCLK_INV */
179 #define WM8400_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */
180 #define WM8400_AIF_LRCLK_INV_MASK 0x0080 /* AIF_LRCLK_INV */
183 #define WM8400_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */
186 #define WM8400_AIF_WL_16BITS (0 << 5)
190 #define WM8400_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */
193 #define WM8400_AIF_FMT_RIGHTJ (0 << 3)
199 * R6 (0x06) - Audio Interface (2)
201 #define WM8400_DACL_SRC 0x8000 /* DACL_SRC */
202 #define WM8400_DACL_SRC_MASK 0x8000 /* DACL_SRC */
205 #define WM8400_DACR_SRC 0x4000 /* DACR_SRC */
206 #define WM8400_DACR_SRC_MASK 0x4000 /* DACR_SRC */
209 #define WM8400_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */
210 #define WM8400_AIFDAC_TDM_MASK 0x2000 /* AIFDAC_TDM */
213 #define WM8400_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
214 #define WM8400_AIFDAC_TDM_CHAN_MASK 0x1000 /* AIFDAC_TDM_CHAN */
217 #define WM8400_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST - [11:10] */
220 #define WM8400_DAC_COMP 0x0010 /* DAC_COMP */
221 #define WM8400_DAC_COMP_MASK 0x0010 /* DAC_COMP */
224 #define WM8400_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */
225 #define WM8400_DAC_COMPMODE_MASK 0x0008 /* DAC_COMPMODE */
228 #define WM8400_ADC_COMP 0x0004 /* ADC_COMP */
229 #define WM8400_ADC_COMP_MASK 0x0004 /* ADC_COMP */
232 #define WM8400_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */
233 #define WM8400_ADC_COMPMODE_MASK 0x0002 /* ADC_COMPMODE */
236 #define WM8400_LOOPBACK 0x0001 /* LOOPBACK */
237 #define WM8400_LOOPBACK_MASK 0x0001 /* LOOPBACK */
238 #define WM8400_LOOPBACK_SHIFT 0 /* LOOPBACK */
242 * R7 (0x07) - Clocking (1)
244 #define WM8400_TOCLK_RATE 0x8000 /* TOCLK_RATE */
245 #define WM8400_TOCLK_RATE_MASK 0x8000 /* TOCLK_RATE */
248 #define WM8400_TOCLK_ENA 0x4000 /* TOCLK_ENA */
249 #define WM8400_TOCLK_ENA_MASK 0x4000 /* TOCLK_ENA */
252 #define WM8400_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */
255 #define WM8400_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */
258 #define WM8400_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */
263 * R8 (0x08) - Clocking (2)
265 #define WM8400_MCLK_SRC 0x8000 /* MCLK_SRC */
266 #define WM8400_MCLK_SRC_MASK 0x8000 /* MCLK_SRC */
269 #define WM8400_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */
270 #define WM8400_SYSCLK_SRC_MASK 0x4000 /* SYSCLK_SRC */
273 #define WM8400_CLK_FORCE 0x2000 /* CLK_FORCE */
274 #define WM8400_CLK_FORCE_MASK 0x2000 /* CLK_FORCE */
277 #define WM8400_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */
280 #define WM8400_MCLK_INV 0x0400 /* MCLK_INV */
281 #define WM8400_MCLK_INV_MASK 0x0400 /* MCLK_INV */
284 #define WM8400_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV - [7:5] */
287 #define WM8400_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */
292 * R9 (0x09) - Audio Interface (3)
294 #define WM8400_AIF_MSTR1 0x8000 /* AIF_MSTR1 */
295 #define WM8400_AIF_MSTR1_MASK 0x8000 /* AIF_MSTR1 */
298 #define WM8400_AIF_MSTR2 0x4000 /* AIF_MSTR2 */
299 #define WM8400_AIF_MSTR2_MASK 0x4000 /* AIF_MSTR2 */
302 #define WM8400_AIF_SEL 0x2000 /* AIF_SEL */
303 #define WM8400_AIF_SEL_MASK 0x2000 /* AIF_SEL */
306 #define WM8400_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */
307 #define WM8400_ADCLRC_DIR_MASK 0x0800 /* ADCLRC_DIR */
310 #define WM8400_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE - [10:0] */
311 #define WM8400_ADCLRC_RATE_SHIFT 0 /* ADCLRC_RATE - [10:0] */
312 #define WM8400_ADCLRC_RATE_WIDTH 11 /* ADCLRC_RATE - [10:0] */
315 * R10 (0x0A) - Audio Interface (4)
317 #define WM8400_ALRCGPIO1 0x8000 /* ALRCGPIO1 */
318 #define WM8400_ALRCGPIO1_MASK 0x8000 /* ALRCGPIO1 */
321 #define WM8400_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */
322 #define WM8400_ALRCBGPIO6_MASK 0x4000 /* ALRCBGPIO6 */
325 #define WM8400_AIF_TRIS 0x2000 /* AIF_TRIS */
326 #define WM8400_AIF_TRIS_MASK 0x2000 /* AIF_TRIS */
329 #define WM8400_DACLRC_DIR 0x0800 /* DACLRC_DIR */
330 #define WM8400_DACLRC_DIR_MASK 0x0800 /* DACLRC_DIR */
333 #define WM8400_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE - [10:0] */
334 #define WM8400_DACLRC_RATE_SHIFT 0 /* DACLRC_RATE - [10:0] */
335 #define WM8400_DACLRC_RATE_WIDTH 11 /* DACLRC_RATE - [10:0] */
338 * R11 (0x0B) - DAC CTRL
340 #define WM8400_DAC_SDMCLK_RATE 0x2000 /* DAC_SDMCLK_RATE */
341 #define WM8400_DAC_SDMCLK_RATE_MASK 0x2000 /* DAC_SDMCLK_RATE */
344 #define WM8400_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */
345 #define WM8400_AIF_LRCLKRATE_MASK 0x0400 /* AIF_LRCLKRATE */
348 #define WM8400_DAC_MONO 0x0200 /* DAC_MONO */
349 #define WM8400_DAC_MONO_MASK 0x0200 /* DAC_MONO */
352 #define WM8400_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */
353 #define WM8400_DAC_SB_FILT_MASK 0x0100 /* DAC_SB_FILT */
356 #define WM8400_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */
357 #define WM8400_DAC_MUTERATE_MASK 0x0080 /* DAC_MUTERATE */
360 #define WM8400_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */
361 #define WM8400_DAC_MUTEMODE_MASK 0x0040 /* DAC_MUTEMODE */
364 #define WM8400_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */
367 #define WM8400_DAC_MUTE 0x0004 /* DAC_MUTE */
368 #define WM8400_DAC_MUTE_MASK 0x0004 /* DAC_MUTE */
371 #define WM8400_DACL_DATINV 0x0002 /* DACL_DATINV */
372 #define WM8400_DACL_DATINV_MASK 0x0002 /* DACL_DATINV */
375 #define WM8400_DACR_DATINV 0x0001 /* DACR_DATINV */
376 #define WM8400_DACR_DATINV_MASK 0x0001 /* DACR_DATINV */
377 #define WM8400_DACR_DATINV_SHIFT 0 /* DACR_DATINV */
381 * R12 (0x0C) - Left DAC Digital Volume
383 #define WM8400_DAC_VU 0x0100 /* DAC_VU */
384 #define WM8400_DAC_VU_MASK 0x0100 /* DAC_VU */
387 #define WM8400_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */
388 #define WM8400_DACL_VOL_SHIFT 0 /* DACL_VOL - [7:0] */
389 #define WM8400_DACL_VOL_WIDTH 8 /* DACL_VOL - [7:0] */
392 * R13 (0x0D) - Right DAC Digital Volume
394 #define WM8400_DAC_VU 0x0100 /* DAC_VU */
395 #define WM8400_DAC_VU_MASK 0x0100 /* DAC_VU */
398 #define WM8400_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */
399 #define WM8400_DACR_VOL_SHIFT 0 /* DACR_VOL - [7:0] */
400 #define WM8400_DACR_VOL_WIDTH 8 /* DACR_VOL - [7:0] */
403 * R14 (0x0E) - Digital Side Tone
405 #define WM8400_ADCL_DAC_SVOL_MASK 0x1E00 /* ADCL_DAC_SVOL - [12:9] */
408 #define WM8400_ADCR_DAC_SVOL_MASK 0x01E0 /* ADCR_DAC_SVOL - [8:5] */
411 #define WM8400_ADC_TO_DACL_MASK 0x000C /* ADC_TO_DACL - [3:2] */
414 #define WM8400_ADC_TO_DACR_MASK 0x0003 /* ADC_TO_DACR - [1:0] */
415 #define WM8400_ADC_TO_DACR_SHIFT 0 /* ADC_TO_DACR - [1:0] */
416 #define WM8400_ADC_TO_DACR_WIDTH 2 /* ADC_TO_DACR - [1:0] */
419 * R15 (0x0F) - ADC CTRL
421 #define WM8400_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */
422 #define WM8400_ADC_HPF_ENA_MASK 0x0100 /* ADC_HPF_ENA */
425 #define WM8400_ADC_HPF_CUT_MASK 0x0060 /* ADC_HPF_CUT - [6:5] */
428 #define WM8400_ADCL_DATINV 0x0002 /* ADCL_DATINV */
429 #define WM8400_ADCL_DATINV_MASK 0x0002 /* ADCL_DATINV */
432 #define WM8400_ADCR_DATINV 0x0001 /* ADCR_DATINV */
433 #define WM8400_ADCR_DATINV_MASK 0x0001 /* ADCR_DATINV */
434 #define WM8400_ADCR_DATINV_SHIFT 0 /* ADCR_DATINV */
438 * R16 (0x10) - Left ADC Digital Volume
440 #define WM8400_ADC_VU 0x0100 /* ADC_VU */
441 #define WM8400_ADC_VU_MASK 0x0100 /* ADC_VU */
444 #define WM8400_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */
445 #define WM8400_ADCL_VOL_SHIFT 0 /* ADCL_VOL - [7:0] */
446 #define WM8400_ADCL_VOL_WIDTH 8 /* ADCL_VOL - [7:0] */
449 * R17 (0x11) - Right ADC Digital Volume
451 #define WM8400_ADC_VU 0x0100 /* ADC_VU */
452 #define WM8400_ADC_VU_MASK 0x0100 /* ADC_VU */
455 #define WM8400_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */
456 #define WM8400_ADCR_VOL_SHIFT 0 /* ADCR_VOL - [7:0] */
457 #define WM8400_ADCR_VOL_WIDTH 8 /* ADCR_VOL - [7:0] */
460 * R24 (0x18) - Left Line Input 1&2 Volume
462 #define WM8400_IPVU 0x0100 /* IPVU */
463 #define WM8400_IPVU_MASK 0x0100 /* IPVU */
466 #define WM8400_LI12MUTE 0x0080 /* LI12MUTE */
467 #define WM8400_LI12MUTE_MASK 0x0080 /* LI12MUTE */
470 #define WM8400_LI12ZC 0x0040 /* LI12ZC */
471 #define WM8400_LI12ZC_MASK 0x0040 /* LI12ZC */
474 #define WM8400_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */
475 #define WM8400_LIN12VOL_SHIFT 0 /* LIN12VOL - [4:0] */
476 #define WM8400_LIN12VOL_WIDTH 5 /* LIN12VOL - [4:0] */
479 * R25 (0x19) - Left Line Input 3&4 Volume
481 #define WM8400_IPVU 0x0100 /* IPVU */
482 #define WM8400_IPVU_MASK 0x0100 /* IPVU */
485 #define WM8400_LI34MUTE 0x0080 /* LI34MUTE */
486 #define WM8400_LI34MUTE_MASK 0x0080 /* LI34MUTE */
489 #define WM8400_LI34ZC 0x0040 /* LI34ZC */
490 #define WM8400_LI34ZC_MASK 0x0040 /* LI34ZC */
493 #define WM8400_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */
494 #define WM8400_LIN34VOL_SHIFT 0 /* LIN34VOL - [4:0] */
495 #define WM8400_LIN34VOL_WIDTH 5 /* LIN34VOL - [4:0] */
498 * R26 (0x1A) - Right Line Input 1&2 Volume
500 #define WM8400_IPVU 0x0100 /* IPVU */
501 #define WM8400_IPVU_MASK 0x0100 /* IPVU */
504 #define WM8400_RI12MUTE 0x0080 /* RI12MUTE */
505 #define WM8400_RI12MUTE_MASK 0x0080 /* RI12MUTE */
508 #define WM8400_RI12ZC 0x0040 /* RI12ZC */
509 #define WM8400_RI12ZC_MASK 0x0040 /* RI12ZC */
512 #define WM8400_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */
513 #define WM8400_RIN12VOL_SHIFT 0 /* RIN12VOL - [4:0] */
514 #define WM8400_RIN12VOL_WIDTH 5 /* RIN12VOL - [4:0] */
517 * R27 (0x1B) - Right Line Input 3&4 Volume
519 #define WM8400_IPVU 0x0100 /* IPVU */
520 #define WM8400_IPVU_MASK 0x0100 /* IPVU */
523 #define WM8400_RI34MUTE 0x0080 /* RI34MUTE */
524 #define WM8400_RI34MUTE_MASK 0x0080 /* RI34MUTE */
527 #define WM8400_RI34ZC 0x0040 /* RI34ZC */
528 #define WM8400_RI34ZC_MASK 0x0040 /* RI34ZC */
531 #define WM8400_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */
532 #define WM8400_RIN34VOL_SHIFT 0 /* RIN34VOL - [4:0] */
533 #define WM8400_RIN34VOL_WIDTH 5 /* RIN34VOL - [4:0] */
536 * R28 (0x1C) - Left Output Volume
538 #define WM8400_OPVU 0x0100 /* OPVU */
539 #define WM8400_OPVU_MASK 0x0100 /* OPVU */
542 #define WM8400_LOZC 0x0080 /* LOZC */
543 #define WM8400_LOZC_MASK 0x0080 /* LOZC */
546 #define WM8400_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
547 #define WM8400_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
548 #define WM8400_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
551 * R29 (0x1D) - Right Output Volume
553 #define WM8400_OPVU 0x0100 /* OPVU */
554 #define WM8400_OPVU_MASK 0x0100 /* OPVU */
557 #define WM8400_ROZC 0x0080 /* ROZC */
558 #define WM8400_ROZC_MASK 0x0080 /* ROZC */
561 #define WM8400_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
562 #define WM8400_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
563 #define WM8400_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
566 * R30 (0x1E) - Line Outputs Volume
568 #define WM8400_LONMUTE 0x0040 /* LONMUTE */
569 #define WM8400_LONMUTE_MASK 0x0040 /* LONMUTE */
572 #define WM8400_LOPMUTE 0x0020 /* LOPMUTE */
573 #define WM8400_LOPMUTE_MASK 0x0020 /* LOPMUTE */
576 #define WM8400_LOATTN 0x0010 /* LOATTN */
577 #define WM8400_LOATTN_MASK 0x0010 /* LOATTN */
580 #define WM8400_RONMUTE 0x0004 /* RONMUTE */
581 #define WM8400_RONMUTE_MASK 0x0004 /* RONMUTE */
584 #define WM8400_ROPMUTE 0x0002 /* ROPMUTE */
585 #define WM8400_ROPMUTE_MASK 0x0002 /* ROPMUTE */
588 #define WM8400_ROATTN 0x0001 /* ROATTN */
589 #define WM8400_ROATTN_MASK 0x0001 /* ROATTN */
590 #define WM8400_ROATTN_SHIFT 0 /* ROATTN */
594 * R31 (0x1F) - Out3/4 Volume
596 #define WM8400_OUT3MUTE 0x0020 /* OUT3MUTE */
597 #define WM8400_OUT3MUTE_MASK 0x0020 /* OUT3MUTE */
600 #define WM8400_OUT3ATTN 0x0010 /* OUT3ATTN */
601 #define WM8400_OUT3ATTN_MASK 0x0010 /* OUT3ATTN */
604 #define WM8400_OUT4MUTE 0x0002 /* OUT4MUTE */
605 #define WM8400_OUT4MUTE_MASK 0x0002 /* OUT4MUTE */
608 #define WM8400_OUT4ATTN 0x0001 /* OUT4ATTN */
609 #define WM8400_OUT4ATTN_MASK 0x0001 /* OUT4ATTN */
610 #define WM8400_OUT4ATTN_SHIFT 0 /* OUT4ATTN */
614 * R32 (0x20) - Left OPGA Volume
616 #define WM8400_OPVU 0x0100 /* OPVU */
617 #define WM8400_OPVU_MASK 0x0100 /* OPVU */
620 #define WM8400_LOPGAZC 0x0080 /* LOPGAZC */
621 #define WM8400_LOPGAZC_MASK 0x0080 /* LOPGAZC */
624 #define WM8400_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */
625 #define WM8400_LOPGAVOL_SHIFT 0 /* LOPGAVOL - [6:0] */
626 #define WM8400_LOPGAVOL_WIDTH 7 /* LOPGAVOL - [6:0] */
629 * R33 (0x21) - Right OPGA Volume
631 #define WM8400_OPVU 0x0100 /* OPVU */
632 #define WM8400_OPVU_MASK 0x0100 /* OPVU */
635 #define WM8400_ROPGAZC 0x0080 /* ROPGAZC */
636 #define WM8400_ROPGAZC_MASK 0x0080 /* ROPGAZC */
639 #define WM8400_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */
640 #define WM8400_ROPGAVOL_SHIFT 0 /* ROPGAVOL - [6:0] */
641 #define WM8400_ROPGAVOL_WIDTH 7 /* ROPGAVOL - [6:0] */
644 * R34 (0x22) - Speaker Volume
646 #define WM8400_SPKATTN_MASK 0x0003 /* SPKATTN - [1:0] */
647 #define WM8400_SPKATTN_SHIFT 0 /* SPKATTN - [1:0] */
648 #define WM8400_SPKATTN_WIDTH 2 /* SPKATTN - [1:0] */
651 * R35 (0x23) - ClassD1
653 #define WM8400_CDMODE 0x0100 /* CDMODE */
654 #define WM8400_CDMODE_MASK 0x0100 /* CDMODE */
657 #define WM8400_CLASSD_CLK_SEL 0x0080 /* CLASSD_CLK_SEL */
658 #define WM8400_CLASSD_CLK_SEL_MASK 0x0080 /* CLASSD_CLK_SEL */
661 #define WM8400_CD_SRCTRL 0x0040 /* CD_SRCTRL */
662 #define WM8400_CD_SRCTRL_MASK 0x0040 /* CD_SRCTRL */
665 #define WM8400_SPKNOPOP 0x0020 /* SPKNOPOP */
666 #define WM8400_SPKNOPOP_MASK 0x0020 /* SPKNOPOP */
669 #define WM8400_DBLERATE 0x0010 /* DBLERATE */
670 #define WM8400_DBLERATE_MASK 0x0010 /* DBLERATE */
673 #define WM8400_LOOPTEST 0x0008 /* LOOPTEST */
674 #define WM8400_LOOPTEST_MASK 0x0008 /* LOOPTEST */
677 #define WM8400_HALFABBIAS 0x0004 /* HALFABBIAS */
678 #define WM8400_HALFABBIAS_MASK 0x0004 /* HALFABBIAS */
681 #define WM8400_TRIDEL_MASK 0x0003 /* TRIDEL - [1:0] */
682 #define WM8400_TRIDEL_SHIFT 0 /* TRIDEL - [1:0] */
683 #define WM8400_TRIDEL_WIDTH 2 /* TRIDEL - [1:0] */
686 * R37 (0x25) - ClassD3
688 #define WM8400_DCGAIN_MASK 0x0038 /* DCGAIN - [5:3] */
691 #define WM8400_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */
692 #define WM8400_ACGAIN_SHIFT 0 /* ACGAIN - [2:0] */
693 #define WM8400_ACGAIN_WIDTH 3 /* ACGAIN - [2:0] */
696 * R39 (0x27) - Input Mixer1
698 #define WM8400_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */
701 #define WM8400_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */
702 #define WM8400_AINRMODE_SHIFT 0 /* AINRMODE - [1:0] */
703 #define WM8400_AINRMODE_WIDTH 2 /* AINRMODE - [1:0] */
706 * R40 (0x28) - Input Mixer2
708 #define WM8400_LMP4 0x0080 /* LMP4 */
709 #define WM8400_LMP4_MASK 0x0080 /* LMP4 */
712 #define WM8400_LMN3 0x0040 /* LMN3 */
713 #define WM8400_LMN3_MASK 0x0040 /* LMN3 */
716 #define WM8400_LMP2 0x0020 /* LMP2 */
717 #define WM8400_LMP2_MASK 0x0020 /* LMP2 */
720 #define WM8400_LMN1 0x0010 /* LMN1 */
721 #define WM8400_LMN1_MASK 0x0010 /* LMN1 */
724 #define WM8400_RMP4 0x0008 /* RMP4 */
725 #define WM8400_RMP4_MASK 0x0008 /* RMP4 */
728 #define WM8400_RMN3 0x0004 /* RMN3 */
729 #define WM8400_RMN3_MASK 0x0004 /* RMN3 */
732 #define WM8400_RMP2 0x0002 /* RMP2 */
733 #define WM8400_RMP2_MASK 0x0002 /* RMP2 */
736 #define WM8400_RMN1 0x0001 /* RMN1 */
737 #define WM8400_RMN1_MASK 0x0001 /* RMN1 */
738 #define WM8400_RMN1_SHIFT 0 /* RMN1 */
742 * R41 (0x29) - Input Mixer3
744 #define WM8400_L34MNB 0x0100 /* L34MNB */
745 #define WM8400_L34MNB_MASK 0x0100 /* L34MNB */
748 #define WM8400_L34MNBST 0x0080 /* L34MNBST */
749 #define WM8400_L34MNBST_MASK 0x0080 /* L34MNBST */
752 #define WM8400_L12MNB 0x0020 /* L12MNB */
753 #define WM8400_L12MNB_MASK 0x0020 /* L12MNB */
756 #define WM8400_L12MNBST 0x0010 /* L12MNBST */
757 #define WM8400_L12MNBST_MASK 0x0010 /* L12MNBST */
760 #define WM8400_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */
761 #define WM8400_LDBVOL_SHIFT 0 /* LDBVOL - [2:0] */
762 #define WM8400_LDBVOL_WIDTH 3 /* LDBVOL - [2:0] */
765 * R42 (0x2A) - Input Mixer4
767 #define WM8400_R34MNB 0x0100 /* R34MNB */
768 #define WM8400_R34MNB_MASK 0x0100 /* R34MNB */
771 #define WM8400_R34MNBST 0x0080 /* R34MNBST */
772 #define WM8400_R34MNBST_MASK 0x0080 /* R34MNBST */
775 #define WM8400_R12MNB 0x0020 /* R12MNB */
776 #define WM8400_R12MNB_MASK 0x0020 /* R12MNB */
779 #define WM8400_R12MNBST 0x0010 /* R12MNBST */
780 #define WM8400_R12MNBST_MASK 0x0010 /* R12MNBST */
783 #define WM8400_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */
784 #define WM8400_RDBVOL_SHIFT 0 /* RDBVOL - [2:0] */
785 #define WM8400_RDBVOL_WIDTH 3 /* RDBVOL - [2:0] */
788 * R43 (0x2B) - Input Mixer5
790 #define WM8400_LI2BVOL_MASK 0x01C0 /* LI2BVOL - [8:6] */
793 #define WM8400_LR4BVOL_MASK 0x0038 /* LR4BVOL - [5:3] */
796 #define WM8400_LL4BVOL_MASK 0x0007 /* LL4BVOL - [2:0] */
797 #define WM8400_LL4BVOL_SHIFT 0 /* LL4BVOL - [2:0] */
798 #define WM8400_LL4BVOL_WIDTH 3 /* LL4BVOL - [2:0] */
801 * R44 (0x2C) - Input Mixer6
803 #define WM8400_RI2BVOL_MASK 0x01C0 /* RI2BVOL - [8:6] */
806 #define WM8400_RL4BVOL_MASK 0x0038 /* RL4BVOL - [5:3] */
809 #define WM8400_RR4BVOL_MASK 0x0007 /* RR4BVOL - [2:0] */
810 #define WM8400_RR4BVOL_SHIFT 0 /* RR4BVOL - [2:0] */
811 #define WM8400_RR4BVOL_WIDTH 3 /* RR4BVOL - [2:0] */
814 * R45 (0x2D) - Output Mixer1
816 #define WM8400_LRBLO 0x0080 /* LRBLO */
817 #define WM8400_LRBLO_MASK 0x0080 /* LRBLO */
820 #define WM8400_LLBLO 0x0040 /* LLBLO */
821 #define WM8400_LLBLO_MASK 0x0040 /* LLBLO */
824 #define WM8400_LRI3LO 0x0020 /* LRI3LO */
825 #define WM8400_LRI3LO_MASK 0x0020 /* LRI3LO */
828 #define WM8400_LLI3LO 0x0010 /* LLI3LO */
829 #define WM8400_LLI3LO_MASK 0x0010 /* LLI3LO */
832 #define WM8400_LR12LO 0x0008 /* LR12LO */
833 #define WM8400_LR12LO_MASK 0x0008 /* LR12LO */
836 #define WM8400_LL12LO 0x0004 /* LL12LO */
837 #define WM8400_LL12LO_MASK 0x0004 /* LL12LO */
840 #define WM8400_LDLO 0x0001 /* LDLO */
841 #define WM8400_LDLO_MASK 0x0001 /* LDLO */
842 #define WM8400_LDLO_SHIFT 0 /* LDLO */
846 * R46 (0x2E) - Output Mixer2
848 #define WM8400_RLBRO 0x0080 /* RLBRO */
849 #define WM8400_RLBRO_MASK 0x0080 /* RLBRO */
852 #define WM8400_RRBRO 0x0040 /* RRBRO */
853 #define WM8400_RRBRO_MASK 0x0040 /* RRBRO */
856 #define WM8400_RLI3RO 0x0020 /* RLI3RO */
857 #define WM8400_RLI3RO_MASK 0x0020 /* RLI3RO */
860 #define WM8400_RRI3RO 0x0010 /* RRI3RO */
861 #define WM8400_RRI3RO_MASK 0x0010 /* RRI3RO */
864 #define WM8400_RL12RO 0x0008 /* RL12RO */
865 #define WM8400_RL12RO_MASK 0x0008 /* RL12RO */
868 #define WM8400_RR12RO 0x0004 /* RR12RO */
869 #define WM8400_RR12RO_MASK 0x0004 /* RR12RO */
872 #define WM8400_RDRO 0x0001 /* RDRO */
873 #define WM8400_RDRO_MASK 0x0001 /* RDRO */
874 #define WM8400_RDRO_SHIFT 0 /* RDRO */
878 * R47 (0x2F) - Output Mixer3
880 #define WM8400_LLI3LOVOL_MASK 0x01C0 /* LLI3LOVOL - [8:6] */
883 #define WM8400_LR12LOVOL_MASK 0x0038 /* LR12LOVOL - [5:3] */
886 #define WM8400_LL12LOVOL_MASK 0x0007 /* LL12LOVOL - [2:0] */
887 #define WM8400_LL12LOVOL_SHIFT 0 /* LL12LOVOL - [2:0] */
888 #define WM8400_LL12LOVOL_WIDTH 3 /* LL12LOVOL - [2:0] */
891 * R48 (0x30) - Output Mixer4
893 #define WM8400_RRI3ROVOL_MASK 0x01C0 /* RRI3ROVOL - [8:6] */
896 #define WM8400_RL12ROVOL_MASK 0x0038 /* RL12ROVOL - [5:3] */
899 #define WM8400_RR12ROVOL_MASK 0x0007 /* RR12ROVOL - [2:0] */
900 #define WM8400_RR12ROVOL_SHIFT 0 /* RR12ROVOL - [2:0] */
901 #define WM8400_RR12ROVOL_WIDTH 3 /* RR12ROVOL - [2:0] */
904 * R49 (0x31) - Output Mixer5
906 #define WM8400_LRI3LOVOL_MASK 0x01C0 /* LRI3LOVOL - [8:6] */
909 #define WM8400_LRBLOVOL_MASK 0x0038 /* LRBLOVOL - [5:3] */
912 #define WM8400_LLBLOVOL_MASK 0x0007 /* LLBLOVOL - [2:0] */
913 #define WM8400_LLBLOVOL_SHIFT 0 /* LLBLOVOL - [2:0] */
914 #define WM8400_LLBLOVOL_WIDTH 3 /* LLBLOVOL - [2:0] */
917 * R50 (0x32) - Output Mixer6
919 #define WM8400_RLI3ROVOL_MASK 0x01C0 /* RLI3ROVOL - [8:6] */
922 #define WM8400_RLBROVOL_MASK 0x0038 /* RLBROVOL - [5:3] */
925 #define WM8400_RRBROVOL_MASK 0x0007 /* RRBROVOL - [2:0] */
926 #define WM8400_RRBROVOL_SHIFT 0 /* RRBROVOL - [2:0] */
927 #define WM8400_RRBROVOL_WIDTH 3 /* RRBROVOL - [2:0] */
930 * R51 (0x33) - Out3/4 Mixer
932 #define WM8400_VSEL_MASK 0x0180 /* VSEL - [8:7] */
935 #define WM8400_LI4O3 0x0020 /* LI4O3 */
936 #define WM8400_LI4O3_MASK 0x0020 /* LI4O3 */
939 #define WM8400_LPGAO3 0x0010 /* LPGAO3 */
940 #define WM8400_LPGAO3_MASK 0x0010 /* LPGAO3 */
943 #define WM8400_RI4O4 0x0002 /* RI4O4 */
944 #define WM8400_RI4O4_MASK 0x0002 /* RI4O4 */
947 #define WM8400_RPGAO4 0x0001 /* RPGAO4 */
948 #define WM8400_RPGAO4_MASK 0x0001 /* RPGAO4 */
949 #define WM8400_RPGAO4_SHIFT 0 /* RPGAO4 */
953 * R52 (0x34) - Line Mixer1
955 #define WM8400_LLOPGALON 0x0040 /* LLOPGALON */
956 #define WM8400_LLOPGALON_MASK 0x0040 /* LLOPGALON */
959 #define WM8400_LROPGALON 0x0020 /* LROPGALON */
960 #define WM8400_LROPGALON_MASK 0x0020 /* LROPGALON */
963 #define WM8400_LOPLON 0x0010 /* LOPLON */
964 #define WM8400_LOPLON_MASK 0x0010 /* LOPLON */
967 #define WM8400_LR12LOP 0x0004 /* LR12LOP */
968 #define WM8400_LR12LOP_MASK 0x0004 /* LR12LOP */
971 #define WM8400_LL12LOP 0x0002 /* LL12LOP */
972 #define WM8400_LL12LOP_MASK 0x0002 /* LL12LOP */
975 #define WM8400_LLOPGALOP 0x0001 /* LLOPGALOP */
976 #define WM8400_LLOPGALOP_MASK 0x0001 /* LLOPGALOP */
977 #define WM8400_LLOPGALOP_SHIFT 0 /* LLOPGALOP */
981 * R53 (0x35) - Line Mixer2
983 #define WM8400_RROPGARON 0x0040 /* RROPGARON */
984 #define WM8400_RROPGARON_MASK 0x0040 /* RROPGARON */
987 #define WM8400_RLOPGARON 0x0020 /* RLOPGARON */
988 #define WM8400_RLOPGARON_MASK 0x0020 /* RLOPGARON */
991 #define WM8400_ROPRON 0x0010 /* ROPRON */
992 #define WM8400_ROPRON_MASK 0x0010 /* ROPRON */
995 #define WM8400_RL12ROP 0x0004 /* RL12ROP */
996 #define WM8400_RL12ROP_MASK 0x0004 /* RL12ROP */
999 #define WM8400_RR12ROP 0x0002 /* RR12ROP */
1000 #define WM8400_RR12ROP_MASK 0x0002 /* RR12ROP */
1003 #define WM8400_RROPGAROP 0x0001 /* RROPGAROP */
1004 #define WM8400_RROPGAROP_MASK 0x0001 /* RROPGAROP */
1005 #define WM8400_RROPGAROP_SHIFT 0 /* RROPGAROP */
1009 * R54 (0x36) - Speaker Mixer
1011 #define WM8400_LB2SPK 0x0080 /* LB2SPK */
1012 #define WM8400_LB2SPK_MASK 0x0080 /* LB2SPK */
1015 #define WM8400_RB2SPK 0x0040 /* RB2SPK */
1016 #define WM8400_RB2SPK_MASK 0x0040 /* RB2SPK */
1019 #define WM8400_LI2SPK 0x0020 /* LI2SPK */
1020 #define WM8400_LI2SPK_MASK 0x0020 /* LI2SPK */
1023 #define WM8400_RI2SPK 0x0010 /* RI2SPK */
1024 #define WM8400_RI2SPK_MASK 0x0010 /* RI2SPK */
1027 #define WM8400_LOPGASPK 0x0008 /* LOPGASPK */
1028 #define WM8400_LOPGASPK_MASK 0x0008 /* LOPGASPK */
1031 #define WM8400_ROPGASPK 0x0004 /* ROPGASPK */
1032 #define WM8400_ROPGASPK_MASK 0x0004 /* ROPGASPK */
1035 #define WM8400_LDSPK 0x0002 /* LDSPK */
1036 #define WM8400_LDSPK_MASK 0x0002 /* LDSPK */
1039 #define WM8400_RDSPK 0x0001 /* RDSPK */
1040 #define WM8400_RDSPK_MASK 0x0001 /* RDSPK */
1041 #define WM8400_RDSPK_SHIFT 0 /* RDSPK */
1045 * R55 (0x37) - Additional Control
1047 #define WM8400_VROI 0x0001 /* VROI */
1048 #define WM8400_VROI_MASK 0x0001 /* VROI */
1049 #define WM8400_VROI_SHIFT 0 /* VROI */
1053 * R56 (0x38) - AntiPOP1
1055 #define WM8400_DIS_LLINE 0x0020 /* DIS_LLINE */
1056 #define WM8400_DIS_LLINE_MASK 0x0020 /* DIS_LLINE */
1059 #define WM8400_DIS_RLINE 0x0010 /* DIS_RLINE */
1060 #define WM8400_DIS_RLINE_MASK 0x0010 /* DIS_RLINE */
1063 #define WM8400_DIS_OUT3 0x0008 /* DIS_OUT3 */
1064 #define WM8400_DIS_OUT3_MASK 0x0008 /* DIS_OUT3 */
1067 #define WM8400_DIS_OUT4 0x0004 /* DIS_OUT4 */
1068 #define WM8400_DIS_OUT4_MASK 0x0004 /* DIS_OUT4 */
1071 #define WM8400_DIS_LOUT 0x0002 /* DIS_LOUT */
1072 #define WM8400_DIS_LOUT_MASK 0x0002 /* DIS_LOUT */
1075 #define WM8400_DIS_ROUT 0x0001 /* DIS_ROUT */
1076 #define WM8400_DIS_ROUT_MASK 0x0001 /* DIS_ROUT */
1077 #define WM8400_DIS_ROUT_SHIFT 0 /* DIS_ROUT */
1081 * R57 (0x39) - AntiPOP2
1083 #define WM8400_SOFTST 0x0040 /* SOFTST */
1084 #define WM8400_SOFTST_MASK 0x0040 /* SOFTST */
1087 #define WM8400_BUFIOEN 0x0008 /* BUFIOEN */
1088 #define WM8400_BUFIOEN_MASK 0x0008 /* BUFIOEN */
1091 #define WM8400_BUFDCOPEN 0x0004 /* BUFDCOPEN */
1092 #define WM8400_BUFDCOPEN_MASK 0x0004 /* BUFDCOPEN */
1095 #define WM8400_POBCTRL 0x0002 /* POBCTRL */
1096 #define WM8400_POBCTRL_MASK 0x0002 /* POBCTRL */
1099 #define WM8400_VMIDTOG 0x0001 /* VMIDTOG */
1100 #define WM8400_VMIDTOG_MASK 0x0001 /* VMIDTOG */
1101 #define WM8400_VMIDTOG_SHIFT 0 /* VMIDTOG */
1105 * R58 (0x3A) - MICBIAS
1107 #define WM8400_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */
1110 #define WM8400_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */
1113 #define WM8400_MCD 0x0004 /* MCD */
1114 #define WM8400_MCD_MASK 0x0004 /* MCD */
1117 #define WM8400_MBSEL 0x0001 /* MBSEL */
1118 #define WM8400_MBSEL_MASK 0x0001 /* MBSEL */
1119 #define WM8400_MBSEL_SHIFT 0 /* MBSEL */
1123 * R60 (0x3C) - FLL Control 1
1125 #define WM8400_FLL_REF_FREQ 0x1000 /* FLL_REF_FREQ */
1126 #define WM8400_FLL_REF_FREQ_MASK 0x1000 /* FLL_REF_FREQ */
1129 #define WM8400_FLL_CLK_SRC_MASK 0x0C00 /* FLL_CLK_SRC - [11:10] */
1132 #define WM8400_FLL_FRAC 0x0200 /* FLL_FRAC */
1133 #define WM8400_FLL_FRAC_MASK 0x0200 /* FLL_FRAC */
1136 #define WM8400_FLL_OSC_ENA 0x0100 /* FLL_OSC_ENA */
1137 #define WM8400_FLL_OSC_ENA_MASK 0x0100 /* FLL_OSC_ENA */
1140 #define WM8400_FLL_CTRL_RATE_MASK 0x00E0 /* FLL_CTRL_RATE - [7:5] */
1143 #define WM8400_FLL_FRATIO_MASK 0x001F /* FLL_FRATIO - [4:0] */
1144 #define WM8400_FLL_FRATIO_SHIFT 0 /* FLL_FRATIO - [4:0] */
1145 #define WM8400_FLL_FRATIO_WIDTH 5 /* FLL_FRATIO - [4:0] */
1148 * R61 (0x3D) - FLL Control 2
1150 #define WM8400_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
1151 #define WM8400_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
1152 #define WM8400_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
1155 * R62 (0x3E) - FLL Control 3
1157 #define WM8400_FLL_N_MASK 0x03FF /* FLL_N - [9:0] */
1158 #define WM8400_FLL_N_SHIFT 0 /* FLL_N - [9:0] */
1159 #define WM8400_FLL_N_WIDTH 10 /* FLL_N - [9:0] */
1162 * R63 (0x3F) - FLL Control 4
1164 #define WM8400_FLL_TRK_GAIN_MASK 0x0078 /* FLL_TRK_GAIN - [6:3] */
1167 #define WM8400_FLL_OUTDIV_MASK 0x0007 /* FLL_OUTDIV - [2:0] */
1168 #define WM8400_FLL_OUTDIV_SHIFT 0 /* FLL_OUTDIV - [2:0] */
1169 #define WM8400_FLL_OUTDIV_WIDTH 3 /* FLL_OUTDIV - [2:0] */