Lines Matching +full:0 +full:x0300
19 #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
20 #define WM8350_CSA_FLASH_CONTROL 0xAD
21 #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
22 #define WM8350_CSB_FLASH_CONTROL 0xAF
23 #define WM8350_DCDC_LDO_REQUESTED 0xB0
24 #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
25 #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
26 #define WM8350_POWER_CHECK_COMPARATOR 0xB3
27 #define WM8350_DCDC1_CONTROL 0xB4
28 #define WM8350_DCDC1_TIMEOUTS 0xB5
29 #define WM8350_DCDC1_LOW_POWER 0xB6
30 #define WM8350_DCDC2_CONTROL 0xB7
31 #define WM8350_DCDC2_TIMEOUTS 0xB8
32 #define WM8350_DCDC3_CONTROL 0xBA
33 #define WM8350_DCDC3_TIMEOUTS 0xBB
34 #define WM8350_DCDC3_LOW_POWER 0xBC
35 #define WM8350_DCDC4_CONTROL 0xBD
36 #define WM8350_DCDC4_TIMEOUTS 0xBE
37 #define WM8350_DCDC4_LOW_POWER 0xBF
38 #define WM8350_DCDC5_CONTROL 0xC0
39 #define WM8350_DCDC5_TIMEOUTS 0xC1
40 #define WM8350_DCDC6_CONTROL 0xC3
41 #define WM8350_DCDC6_TIMEOUTS 0xC4
42 #define WM8350_DCDC6_LOW_POWER 0xC5
43 #define WM8350_LIMIT_SWITCH_CONTROL 0xC7
44 #define WM8350_LDO1_CONTROL 0xC8
45 #define WM8350_LDO1_TIMEOUTS 0xC9
46 #define WM8350_LDO1_LOW_POWER 0xCA
47 #define WM8350_LDO2_CONTROL 0xCB
48 #define WM8350_LDO2_TIMEOUTS 0xCC
49 #define WM8350_LDO2_LOW_POWER 0xCD
50 #define WM8350_LDO3_CONTROL 0xCE
51 #define WM8350_LDO3_TIMEOUTS 0xCF
52 #define WM8350_LDO3_LOW_POWER 0xD0
53 #define WM8350_LDO4_CONTROL 0xD1
54 #define WM8350_LDO4_TIMEOUTS 0xD2
55 #define WM8350_LDO4_LOW_POWER 0xD3
56 #define WM8350_VCC_FAULT_MASKS 0xD7
57 #define WM8350_MAIN_BANDGAP_CONTROL 0xD8
58 #define WM8350_OSC_CONTROL 0xD9
59 #define WM8350_RTC_TICK_CONTROL 0xDA
60 #define WM8350_SECURITY 0xDB
61 #define WM8350_RAM_BIST_1 0xDC
62 #define WM8350_DCDC_LDO_STATUS 0xE1
63 #define WM8350_GPIO_PIN_STATUS 0xE6
65 #define WM8350_DCDC1_FORCE_PWM 0xF8
66 #define WM8350_DCDC3_FORCE_PWM 0xFA
67 #define WM8350_DCDC4_FORCE_PWM 0xFB
68 #define WM8350_DCDC6_FORCE_PWM 0xFD
71 * R172 (0xAC) - Current Sink Driver A
73 #define WM8350_CS1_HIB_MODE 0x1000
74 #define WM8350_CS1_HIB_MODE_MASK 0x1000
76 #define WM8350_CS1_ISEL_MASK 0x003F
77 #define WM8350_CS1_ISEL_SHIFT 0
79 /* Bit values for R172 (0xAC) */
80 #define WM8350_CS1_HIB_MODE_DISABLE 0
83 #define WM8350_CS1_ISEL_220M 0x3F
86 * R173 (0xAD) - CSA Flash control
88 #define WM8350_CS1_FLASH_MODE 0x8000
89 #define WM8350_CS1_TRIGSRC 0x4000
90 #define WM8350_CS1_DRIVE 0x2000
91 #define WM8350_CS1_FLASH_DUR_MASK 0x0300
92 #define WM8350_CS1_OFF_RAMP_MASK 0x0030
93 #define WM8350_CS1_ON_RAMP_MASK 0x0003
96 * R174 (0xAE) - Current Sink Driver B
98 #define WM8350_CS2_HIB_MODE 0x1000
99 #define WM8350_CS2_ISEL_MASK 0x003F
102 * R175 (0xAF) - CSB Flash control
104 #define WM8350_CS2_FLASH_MODE 0x8000
105 #define WM8350_CS2_TRIGSRC 0x4000
106 #define WM8350_CS2_DRIVE 0x2000
107 #define WM8350_CS2_FLASH_DUR_MASK 0x0300
108 #define WM8350_CS2_OFF_RAMP_MASK 0x0030
109 #define WM8350_CS2_ON_RAMP_MASK 0x0003
112 * R176 (0xB0) - DCDC/LDO requested
114 #define WM8350_LS_ENA 0x8000
115 #define WM8350_LDO4_ENA 0x0800
116 #define WM8350_LDO3_ENA 0x0400
117 #define WM8350_LDO2_ENA 0x0200
118 #define WM8350_LDO1_ENA 0x0100
119 #define WM8350_DC6_ENA 0x0020
120 #define WM8350_DC5_ENA 0x0010
121 #define WM8350_DC4_ENA 0x0008
122 #define WM8350_DC3_ENA 0x0004
123 #define WM8350_DC2_ENA 0x0002
124 #define WM8350_DC1_ENA 0x0001
127 * R177 (0xB1) - DCDC Active options
129 #define WM8350_PUTO_MASK 0x3000
130 #define WM8350_PWRUP_DELAY_MASK 0x0300
131 #define WM8350_DC6_ACTIVE 0x0020
132 #define WM8350_DC4_ACTIVE 0x0008
133 #define WM8350_DC3_ACTIVE 0x0004
134 #define WM8350_DC1_ACTIVE 0x0001
137 * R178 (0xB2) - DCDC Sleep options
139 #define WM8350_DC6_SLEEP 0x0020
140 #define WM8350_DC4_SLEEP 0x0008
141 #define WM8350_DC3_SLEEP 0x0004
142 #define WM8350_DC1_SLEEP 0x0001
145 * R179 (0xB3) - Power-check comparator
147 #define WM8350_PCCMP_ERRACT 0x4000
148 #define WM8350_PCCMP_RAIL 0x0100
149 #define WM8350_PCCMP_OFF_THR_MASK 0x0070
150 #define WM8350_PCCMP_ON_THR_MASK 0x0007
153 * R180 (0xB4) - DCDC1 Control
155 #define WM8350_DC1_OPFLT 0x0400
156 #define WM8350_DC1_VSEL_MASK 0x007F
157 #define WM8350_DC1_VSEL_SHIFT 0
160 * R181 (0xB5) - DCDC1 Timeouts
162 #define WM8350_DC1_ERRACT_MASK 0xC000
164 #define WM8350_DC1_ENSLOT_MASK 0x3C00
166 #define WM8350_DC1_SDSLOT_MASK 0x03C0
167 #define WM8350_DC1_UVTO_MASK 0x0030
170 /* Bit values for R181 (0xB5) */
171 #define WM8350_DC1_ERRACT_NONE 0
176 * R182 (0xB6) - DCDC1 Low Power
178 #define WM8350_DC1_HIB_MODE_MASK 0x7000
179 #define WM8350_DC1_HIB_TRIG_MASK 0x0300
180 #define WM8350_DC1_VIMG_MASK 0x007F
183 * R183 (0xB7) - DCDC2 Control
185 #define WM8350_DC2_MODE 0x4000
186 #define WM8350_DC2_MODE_MASK 0x4000
188 #define WM8350_DC2_HIB_MODE 0x1000
189 #define WM8350_DC2_HIB_MODE_MASK 0x1000
191 #define WM8350_DC2_HIB_TRIG_MASK 0x0300
193 #define WM8350_DC2_ILIM 0x0040
194 #define WM8350_DC2_ILIM_MASK 0x0040
196 #define WM8350_DC2_RMP_MASK 0x0018
198 #define WM8350_DC2_FBSRC_MASK 0x0003
199 #define WM8350_DC2_FBSRC_SHIFT 0
201 /* Bit values for R183 (0xB7) */
202 #define WM8350_DC2_MODE_BOOST 0
206 #define WM8350_DC2_HIB_MODE_DISABLE 0
208 #define WM8350_DC2_HIB_TRIG_NONE 0
213 #define WM8350_DC2_ILIM_HIGH 0
216 #define WM8350_DC2_RMP_30V 0
221 #define WM8350_DC2_FBSRC_FB2 0
227 * R184 (0xB8) - DCDC2 Timeouts
229 #define WM8350_DC2_ERRACT_MASK 0xC000
231 #define WM8350_DC2_ENSLOT_MASK 0x3C00
233 #define WM8350_DC2_SDSLOT_MASK 0x03C0
234 #define WM8350_DC2_UVTO_MASK 0x0030
236 /* Bit values for R184 (0xB8) */
237 #define WM8350_DC2_ERRACT_NONE 0
242 * R186 (0xBA) - DCDC3 Control
244 #define WM8350_DC3_OPFLT 0x0400
245 #define WM8350_DC3_VSEL_MASK 0x007F
246 #define WM8350_DC3_VSEL_SHIFT 0
249 * R187 (0xBB) - DCDC3 Timeouts
251 #define WM8350_DC3_ERRACT_MASK 0xC000
253 #define WM8350_DC3_ENSLOT_MASK 0x3C00
255 #define WM8350_DC3_SDSLOT_MASK 0x03C0
256 #define WM8350_DC3_UVTO_MASK 0x0030
259 /* Bit values for R187 (0xBB) */
260 #define WM8350_DC3_ERRACT_NONE 0
264 * R188 (0xBC) - DCDC3 Low Power
266 #define WM8350_DC3_HIB_MODE_MASK 0x7000
267 #define WM8350_DC3_HIB_TRIG_MASK 0x0300
268 #define WM8350_DC3_VIMG_MASK 0x007F
271 * R189 (0xBD) - DCDC4 Control
273 #define WM8350_DC4_OPFLT 0x0400
274 #define WM8350_DC4_VSEL_MASK 0x007F
275 #define WM8350_DC4_VSEL_SHIFT 0
278 * R190 (0xBE) - DCDC4 Timeouts
280 #define WM8350_DC4_ERRACT_MASK 0xC000
282 #define WM8350_DC4_ENSLOT_MASK 0x3C00
284 #define WM8350_DC4_SDSLOT_MASK 0x03C0
285 #define WM8350_DC4_UVTO_MASK 0x0030
288 /* Bit values for R190 (0xBE) */
289 #define WM8350_DC4_ERRACT_NONE 0
294 * R191 (0xBF) - DCDC4 Low Power
296 #define WM8350_DC4_HIB_MODE_MASK 0x7000
297 #define WM8350_DC4_HIB_TRIG_MASK 0x0300
298 #define WM8350_DC4_VIMG_MASK 0x007F
301 * R192 (0xC0) - DCDC5 Control
303 #define WM8350_DC5_MODE 0x4000
304 #define WM8350_DC5_MODE_MASK 0x4000
306 #define WM8350_DC5_HIB_MODE 0x1000
307 #define WM8350_DC5_HIB_MODE_MASK 0x1000
309 #define WM8350_DC5_HIB_TRIG_MASK 0x0300
311 #define WM8350_DC5_ILIM 0x0040
312 #define WM8350_DC5_ILIM_MASK 0x0040
314 #define WM8350_DC5_RMP_MASK 0x0018
316 #define WM8350_DC5_FBSRC_MASK 0x0003
317 #define WM8350_DC5_FBSRC_SHIFT 0
319 /* Bit values for R192 (0xC0) */
320 #define WM8350_DC5_MODE_BOOST 0
324 #define WM8350_DC5_HIB_MODE_DISABLE 0
326 #define WM8350_DC5_HIB_TRIG_NONE 0
331 #define WM8350_DC5_ILIM_HIGH 0
334 #define WM8350_DC5_RMP_30V 0
339 #define WM8350_DC5_FBSRC_FB2 0
345 * R193 (0xC1) - DCDC5 Timeouts
347 #define WM8350_DC5_ERRACT_MASK 0xC000
349 #define WM8350_DC5_ENSLOT_MASK 0x3C00
351 #define WM8350_DC5_SDSLOT_MASK 0x03C0
352 #define WM8350_DC5_UVTO_MASK 0x0030
355 /* Bit values for R193 (0xC1) */
356 #define WM8350_DC5_ERRACT_NONE 0
361 * R195 (0xC3) - DCDC6 Control
363 #define WM8350_DC6_OPFLT 0x0400
364 #define WM8350_DC6_VSEL_MASK 0x007F
365 #define WM8350_DC6_VSEL_SHIFT 0
368 * R196 (0xC4) - DCDC6 Timeouts
370 #define WM8350_DC6_ERRACT_MASK 0xC000
372 #define WM8350_DC6_ENSLOT_MASK 0x3C00
374 #define WM8350_DC6_SDSLOT_MASK 0x03C0
375 #define WM8350_DC6_UVTO_MASK 0x0030
378 /* Bit values for R196 (0xC4) */
379 #define WM8350_DC6_ERRACT_NONE 0
384 * R197 (0xC5) - DCDC6 Low Power
386 #define WM8350_DC6_HIB_MODE_MASK 0x7000
387 #define WM8350_DC6_HIB_TRIG_MASK 0x0300
388 #define WM8350_DC6_VIMG_MASK 0x007F
391 * R199 (0xC7) - Limit Switch Control
393 #define WM8350_LS_ERRACT_MASK 0xC000
395 #define WM8350_LS_ENSLOT_MASK 0x3C00
397 #define WM8350_LS_SDSLOT_MASK 0x03C0
399 #define WM8350_LS_HIB_MODE 0x0010
400 #define WM8350_LS_HIB_MODE_MASK 0x0010
402 #define WM8350_LS_HIB_PROT 0x0002
403 #define WM8350_LS_HIB_PROT_MASK 0x0002
405 #define WM8350_LS_PROT 0x0001
406 #define WM8350_LS_PROT_MASK 0x0001
407 #define WM8350_LS_PROT_SHIFT 0
409 /* Bit values for R199 (0xC7) */
410 #define WM8350_LS_ERRACT_NONE 0
415 * R200 (0xC8) - LDO1 Control
417 #define WM8350_LDO1_SWI 0x4000
418 #define WM8350_LDO1_OPFLT 0x0400
419 #define WM8350_LDO1_VSEL_MASK 0x001F
420 #define WM8350_LDO1_VSEL_SHIFT 0
423 * R201 (0xC9) - LDO1 Timeouts
425 #define WM8350_LDO1_ERRACT_MASK 0xC000
427 #define WM8350_LDO1_ENSLOT_MASK 0x3C00
429 #define WM8350_LDO1_SDSLOT_MASK 0x03C0
430 #define WM8350_LDO1_UVTO_MASK 0x0030
433 /* Bit values for R201 (0xC9) */
434 #define WM8350_LDO1_ERRACT_NONE 0
439 * R202 (0xCA) - LDO1 Low Power
441 #define WM8350_LDO1_HIB_MODE_MASK 0x3000
442 #define WM8350_LDO1_HIB_TRIG_MASK 0x0300
443 #define WM8350_LDO1_VIMG_MASK 0x001F
444 #define WM8350_LDO1_HIB_MODE_DIS (0x1 << 12)
448 * R203 (0xCB) - LDO2 Control
450 #define WM8350_LDO2_SWI 0x4000
451 #define WM8350_LDO2_OPFLT 0x0400
452 #define WM8350_LDO2_VSEL_MASK 0x001F
453 #define WM8350_LDO2_VSEL_SHIFT 0
456 * R204 (0xCC) - LDO2 Timeouts
458 #define WM8350_LDO2_ERRACT_MASK 0xC000
460 #define WM8350_LDO2_ENSLOT_MASK 0x3C00
462 #define WM8350_LDO2_SDSLOT_MASK 0x03C0
465 /* Bit values for R204 (0xCC) */
466 #define WM8350_LDO2_ERRACT_NONE 0
471 * R205 (0xCD) - LDO2 Low Power
473 #define WM8350_LDO2_HIB_MODE_MASK 0x3000
474 #define WM8350_LDO2_HIB_TRIG_MASK 0x0300
475 #define WM8350_LDO2_VIMG_MASK 0x001F
478 * R206 (0xCE) - LDO3 Control
480 #define WM8350_LDO3_SWI 0x4000
481 #define WM8350_LDO3_OPFLT 0x0400
482 #define WM8350_LDO3_VSEL_MASK 0x001F
483 #define WM8350_LDO3_VSEL_SHIFT 0
486 * R207 (0xCF) - LDO3 Timeouts
488 #define WM8350_LDO3_ERRACT_MASK 0xC000
490 #define WM8350_LDO3_ENSLOT_MASK 0x3C00
492 #define WM8350_LDO3_SDSLOT_MASK 0x03C0
493 #define WM8350_LDO3_UVTO_MASK 0x0030
496 /* Bit values for R207 (0xCF) */
497 #define WM8350_LDO3_ERRACT_NONE 0
502 * R208 (0xD0) - LDO3 Low Power
504 #define WM8350_LDO3_HIB_MODE_MASK 0x3000
505 #define WM8350_LDO3_HIB_TRIG_MASK 0x0300
506 #define WM8350_LDO3_VIMG_MASK 0x001F
509 * R209 (0xD1) - LDO4 Control
511 #define WM8350_LDO4_SWI 0x4000
512 #define WM8350_LDO4_OPFLT 0x0400
513 #define WM8350_LDO4_VSEL_MASK 0x001F
514 #define WM8350_LDO4_VSEL_SHIFT 0
517 * R210 (0xD2) - LDO4 Timeouts
519 #define WM8350_LDO4_ERRACT_MASK 0xC000
521 #define WM8350_LDO4_ENSLOT_MASK 0x3C00
523 #define WM8350_LDO4_SDSLOT_MASK 0x03C0
524 #define WM8350_LDO4_UVTO_MASK 0x0030
527 /* Bit values for R210 (0xD2) */
528 #define WM8350_LDO4_ERRACT_NONE 0
533 * R211 (0xD3) - LDO4 Low Power
535 #define WM8350_LDO4_HIB_MODE_MASK 0x3000
536 #define WM8350_LDO4_HIB_TRIG_MASK 0x0300
537 #define WM8350_LDO4_VIMG_MASK 0x001F
540 * R215 (0xD7) - VCC_FAULT Masks
542 #define WM8350_LS_FAULT 0x8000
543 #define WM8350_LDO4_FAULT 0x0800
544 #define WM8350_LDO3_FAULT 0x0400
545 #define WM8350_LDO2_FAULT 0x0200
546 #define WM8350_LDO1_FAULT 0x0100
547 #define WM8350_DC6_FAULT 0x0020
548 #define WM8350_DC5_FAULT 0x0010
549 #define WM8350_DC4_FAULT 0x0008
550 #define WM8350_DC3_FAULT 0x0004
551 #define WM8350_DC2_FAULT 0x0002
552 #define WM8350_DC1_FAULT 0x0001
555 * R216 (0xD8) - Main Bandgap Control
557 #define WM8350_MBG_LOAD_FUSES 0x8000
558 #define WM8350_MBG_FUSE_WPREP 0x4000
559 #define WM8350_MBG_FUSE_WRITE 0x2000
560 #define WM8350_MBG_FUSE_TRIM_MASK 0x1F00
561 #define WM8350_MBG_TRIM_SRC 0x0020
562 #define WM8350_MBG_USER_TRIM_MASK 0x001F
565 * R217 (0xD9) - OSC Control
567 #define WM8350_OSC_LOAD_FUSES 0x8000
568 #define WM8350_OSC_FUSE_WPREP 0x4000
569 #define WM8350_OSC_FUSE_WRITE 0x2000
570 #define WM8350_OSC_FUSE_TRIM_MASK 0x0F00
571 #define WM8350_OSC_TRIM_SRC 0x0020
572 #define WM8350_OSC_USER_TRIM_MASK 0x000F
575 * R248 (0xF8) - DCDC1 Force PWM
577 #define WM8350_DCDC1_FORCE_PWM_ENA 0x0010
580 * R250 (0xFA) - DCDC3 Force PWM
582 #define WM8350_DCDC3_FORCE_PWM_ENA 0x0010
585 * R251 (0xFB) - DCDC4 Force PWM
587 #define WM8350_DCDC4_FORCE_PWM_ENA 0x0010
590 * R253 (0xFD) - DCDC1 Force PWM
592 #define WM8350_DCDC6_FORCE_PWM_ENA 0x0010
597 #define WM8350_DCDC_1 0
605 #define WM8350_DCDC_ACTIVE_STANDBY 0
607 #define WM8350_DCDC_SLEEP_NORMAL 0
611 #define WM8350_DCDC_HIB_MODE_CUR (0 << 12)
620 #define WM8350_DCDC_HIB_SIG_REG (0 << 8)
626 #define WM8350_LDO_HIB_MODE_IMAGE (0 << 0)
627 #define WM8350_LDO_HIB_MODE_DIS (1 << 0)
630 #define WM8350_LDO_HIB_SIG_REG (0 << 8)
649 #define WM8350_ISINK_MODE_BOOST 0
651 #define WM8350_ISINK_ILIM_NORMAL 0
654 #define WM8350_ISINK_FLASH_DISABLE 0
656 #define WM8350_ISINK_FLASH_TRIG_BIT 0
659 #define WM8350_ISINK_FLASH_MODE_DIS (0 << 13)
660 #define WM8350_ISINK_FLASH_DUR_32MS (0 << 8)
664 #define WM8350_ISINK_FLASH_ON_INSTANT (0 << 0)
665 #define WM8350_ISINK_FLASH_ON_0_25S (1 << 0)
666 #define WM8350_ISINK_FLASH_ON_0_50S (2 << 0)
667 #define WM8350_ISINK_FLASH_ON_1_00S (3 << 0)
668 #define WM8350_ISINK_FLASH_ON_1_95S (1 << 0)
669 #define WM8350_ISINK_FLASH_ON_3_91S (2 << 0)
670 #define WM8350_ISINK_FLASH_ON_7_80S (3 << 0)
671 #define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 4)