linux/mfd/tps65218.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
7  * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
63 #define TPS65218_INT1_VPRG		BIT(5)
64 #define TPS65218_INT1_AC		BIT(4)
65 #define TPS65218_INT1_PB		BIT(3)
66 #define TPS65218_INT1_HOT		BIT(2)
67 #define TPS65218_INT1_CC_AQC		BIT(1)
68 #define TPS65218_INT1_PRGC		BIT(0)
70 #define TPS65218_INT2_LS3_F		BIT(5)
71 #define TPS65218_INT2_LS2_F		BIT(4)
72 #define TPS65218_INT2_LS1_F		BIT(3)
73 #define TPS65218_INT2_LS3_I		BIT(2)
74 #define TPS65218_INT2_LS2_I		BIT(1)
75 #define TPS65218_INT2_LS1_I		BIT(0)
77 #define TPS65218_INT_MASK1_VPRG		BIT(5)
78 #define TPS65218_INT_MASK1_AC		BIT(4)
79 #define TPS65218_INT_MASK1_PB		BIT(3)
80 #define TPS65218_INT_MASK1_HOT		BIT(2)
81 #define TPS65218_INT_MASK1_CC_AQC	BIT(1)
82 #define TPS65218_INT_MASK1_PRGC		BIT(0)
84 #define TPS65218_INT_MASK2_LS3_F	BIT(5)
85 #define TPS65218_INT_MASK2_LS2_F	BIT(4)
86 #define TPS65218_INT_MASK2_LS1_F	BIT(3)
87 #define TPS65218_INT_MASK2_LS3_I	BIT(2)
88 #define TPS65218_INT_MASK2_LS2_I	BIT(1)
89 #define TPS65218_INT_MASK2_LS1_I	BIT(0)
91 #define TPS65218_STATUS_FSEAL		BIT(7)
92 #define TPS65218_STATUS_EE		BIT(6)
93 #define TPS65218_STATUS_AC_STATE	BIT(5)
94 #define TPS65218_STATUS_PB_STATE	BIT(4)
98 #define TPS65218_CONTROL_OFFNPFO	BIT(1)
99 #define TPS65218_CONTROL_CC_AQ	BIT(0)
101 #define TPS65218_FLAG_GPO3_FLG		BIT(7)
102 #define TPS65218_FLAG_GPO2_FLG		BIT(6)
103 #define TPS65218_FLAG_GPO1_FLG		BIT(5)
104 #define TPS65218_FLAG_LDO1_FLG		BIT(4)
105 #define TPS65218_FLAG_DC4_FLG		BIT(3)
106 #define TPS65218_FLAG_DC3_FLG		BIT(2)
107 #define TPS65218_FLAG_DC2_FLG		BIT(1)
108 #define TPS65218_FLAG_DC1_FLG		BIT(0)
110 #define TPS65218_ENABLE1_DC6_EN		BIT(5)
111 #define TPS65218_ENABLE1_DC5_EN		BIT(4)
112 #define TPS65218_ENABLE1_DC4_EN		BIT(3)
113 #define TPS65218_ENABLE1_DC3_EN		BIT(2)
114 #define TPS65218_ENABLE1_DC2_EN		BIT(1)
115 #define TPS65218_ENABLE1_DC1_EN		BIT(0)
117 #define TPS65218_ENABLE2_GPIO3		BIT(6)
118 #define TPS65218_ENABLE2_GPIO2		BIT(5)
119 #define TPS65218_ENABLE2_GPIO1		BIT(4)
120 #define TPS65218_ENABLE2_LS3_EN		BIT(3)
121 #define TPS65218_ENABLE2_LS2_EN		BIT(2)
122 #define TPS65218_ENABLE2_LS1_EN		BIT(1)
123 #define TPS65218_ENABLE2_LDO1_EN	BIT(0)
126 #define TPS65218_CONFIG1_TRST		BIT(7)
127 #define TPS65218_CONFIG1_GPO2_BUF	BIT(6)
128 #define TPS65218_CONFIG1_IO1_SEL	BIT(5)
130 #define TPS65218_CONFIG1_STRICT		BIT(2)
137 #define TPS65218_CONFIG2_DC12_RST	BIT(7)
138 #define TPS65218_CONFIG2_UVLOHYS	BIT(6)
142 #define TPS65218_CONFIG3_LS3NPFO	BIT(5)
143 #define TPS65218_CONFIG3_LS2NPFO	BIT(4)
144 #define TPS65218_CONFIG3_LS1NPFO	BIT(3)
145 #define TPS65218_CONFIG3_LS3DCHRG	BIT(2)
146 #define TPS65218_CONFIG3_LS2DCHRG	BIT(1)
147 #define TPS65218_CONFIG3_LS1DCHRG	BIT(0)
149 #define TPS65218_CONTROL_DCDC1_PFM	BIT(7)
152 #define TPS65218_CONTROL_DCDC2_PFM	BIT(7)
155 #define TPS65218_CONTROL_DCDC3_PFM	BIT(7)
158 #define TPS65218_CONTROL_DCDC4_PFM	BIT(7)
161 #define TPS65218_SLEW_RATE_GO		BIT(7)
162 #define TPS65218_SLEW_RATE_GODSBL	BIT(6)
167 #define TPS65218_SEQ1_DLY8		BIT(7)
168 #define TPS65218_SEQ1_DLY7		BIT(6)
169 #define TPS65218_SEQ1_DLY6		BIT(5)
170 #define TPS65218_SEQ1_DLY5		BIT(4)
171 #define TPS65218_SEQ1_DLY4		BIT(3)
172 #define TPS65218_SEQ1_DLY3		BIT(2)
173 #define TPS65218_SEQ1_DLY2		BIT(1)
174 #define TPS65218_SEQ1_DLY1		BIT(0)
176 #define TPS65218_SEQ2_DLYFCTR		BIT(7)
177 #define TPS65218_SEQ2_DLY9		BIT(0)
213 /* Number of step-down converters available */
246  * struct tps65218 - tps65218 sub-driver chip access routines