Lines Matching +full:5 +full:- +full:bits
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * Author: yanglsh@embest-tech.com
32 /* LDO for Low-Power State Retention */
229 /* BD71815_REG_BUCK1_MODE bits */
242 /* BD71815_REG_BUCK1_VOLT_H bits */
249 /* BD71815_REG_BUCK2_VOLT_H bits */
256 /* LED enable bits at LED_CTRL reg */
262 /* BD71815_REG_LDO1_CTRL bits */
272 #define LDO1_LPSR_ON BIT(5)
286 #define LDO3_LPSR_ON BIT(5)
297 #define LDO5_LPSR_ON BIT(5)
307 #define DVREF_LPSR_ON BIT(5)
314 /* BD71815_REG_OUT32K bits */
320 /* BD71815_REG_BAT_STAT bits */
321 #define BAT_DET BIT(5)
322 #define BAT_DET_OFFSET 5
327 /* BD71815_REG_VBUS_STAT bits */
333 /* BD71815_REG_ALM0_MASK bits */
336 /* BD71815_REG_INT_EN_00 bits */
339 /* BD71815_REG_INT_STAT_03 bits */
345 #define POWERON_PRESS BIT(5)
347 /* BD71805_REG_INT_STAT_08 bits */
351 /* BD71805_REG_INT_STAT_11 bits */
354 #define INT_STAT_11_VF125_DET BIT(5)
364 /* BD71815_REG_PWRCTRL bits */
367 /* BD71815_REG_GPO bits */
472 #define BD71815_INT_LED_OVP_MASK BIT(5)
480 #define BD71815_INT_DCIN_OVP_DET_MASK BIT(5)
496 #define BD71815_INT_CHG_RECHARGE_DET_MASK BIT(5)
503 #define BD71815_INT_BAT_DETECTED_MASK BIT(5)
511 #define BD71815_INT_BAT_LOW_VOLT_DET_MASK BIT(5)
527 #define BD71815_INT_BAT_OVER_CURR_3_DET_MASK BIT(5)
534 #define BD71815_INT_TEMP_CHIP_OVER_125_DET_MASK BIT(5)
542 /* BD71815_REG_CC_CTRL bits */
553 /* BD71815_REG_REX_CTRL_1 bits */
556 /* BD71815_REG_REX_CTRL_1 bits */
559 /* BD71815_REG_LED_CTRL bits */