Lines Matching +full:3 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
175 #define DA9062AA_GPI3_SHIFT 3
176 #define DA9062AA_GPI3_MASK BIT(3)
187 #define DA9062AA_LDO4_ILIM_SHIFT 3
188 #define DA9062AA_LDO4_ILIM_MASK BIT(3)
197 #define DA9062AA_VDD_START_SHIFT 3
198 #define DA9062AA_VDD_START_MASK BIT(3)
205 #define DA9062AA_WAIT_SHUT_SHIFT 7
206 #define DA9062AA_WAIT_SHUT_MASK BIT(7)
215 #define DA9062AA_E_WDG_WARN_SHIFT 3
216 #define DA9062AA_E_WDG_WARN_MASK BIT(3)
227 #define DA9062AA_E_LDO_LIM_SHIFT 3
228 #define DA9062AA_E_LDO_LIM_MASK BIT(3)
231 #define DA9062AA_E_VDD_WARN_SHIFT 7
232 #define DA9062AA_E_VDD_WARN_MASK BIT(7)
241 #define DA9062AA_E_GPI3_SHIFT 3
242 #define DA9062AA_E_GPI3_MASK BIT(3)
253 #define DA9062AA_M_WDG_WARN_SHIFT 3
254 #define DA9062AA_M_WDG_WARN_MASK BIT(3)
261 #define DA9062AA_M_LDO_LIM_SHIFT 3
262 #define DA9062AA_M_LDO_LIM_MASK BIT(3)
265 #define DA9062AA_M_VDD_WARN_SHIFT 7
266 #define DA9062AA_M_VDD_WARN_MASK BIT(7)
275 #define DA9062AA_M_GPI3_SHIFT 3
276 #define DA9062AA_M_GPI3_MASK BIT(3)
287 #define DA9062AA_STANDBY_SHIFT 3
288 #define DA9062AA_STANDBY_MASK BIT(3)
301 #define DA9062AA_NRES_MODE_SHIFT 3
302 #define DA9062AA_NRES_MODE_MASK BIT(3)
307 #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
308 #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
313 #define DA9062AA_AUTO_BOOT_SHIFT 3
314 #define DA9062AA_AUTO_BOOT_MASK BIT(3)
319 #define DA9062AA_DEF_SUPPLY_SHIFT 7
320 #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
333 #define DA9062AA_V_LOCK_SHIFT 7
334 #define DA9062AA_V_LOCK_MASK BIT(7)
355 #define DA9062AA_PMCONT_DIS_SHIFT 7
356 #define DA9062AA_PMCONT_DIS_MASK BIT(7)
363 #define DA9062AA_GPIO0_WEN_SHIFT 3
364 #define DA9062AA_GPIO0_WEN_MASK BIT(3)
369 #define DA9062AA_GPIO1_WEN_SHIFT 7
370 #define DA9062AA_GPIO1_WEN_MASK BIT(7)
377 #define DA9062AA_GPIO2_WEN_SHIFT 3
378 #define DA9062AA_GPIO2_WEN_MASK BIT(3)
383 #define DA9062AA_GPIO3_WEN_SHIFT 7
384 #define DA9062AA_GPIO3_WEN_MASK BIT(7)
391 #define DA9062AA_GPIO4_WEN_SHIFT 3
392 #define DA9062AA_GPIO4_WEN_MASK BIT(3)
401 #define DA9062AA_GPIO3_WKUP_MODE_SHIFT 3
402 #define DA9062AA_GPIO3_WKUP_MODE_MASK BIT(3)
413 #define DA9062AA_GPIO3_MODE_SHIFT 3
414 #define DA9062AA_GPIO3_MODE_MASK BIT(3)
421 #define DA9062AA_GPIO1_OUT_SHIFT 3
422 #define DA9062AA_GPIO1_OUT_MASK (0x07 << 3)
429 #define DA9062AA_GPIO4_OUT_SHIFT 3
430 #define DA9062AA_GPIO4_OUT_MASK (0x03 << 3)
437 #define DA9062AA_BUCK2_CONF_SHIFT 3
438 #define DA9062AA_BUCK2_CONF_MASK BIT(3)
447 #define DA9062AA_BUCK1_CONF_SHIFT 3
448 #define DA9062AA_BUCK1_CONF_MASK BIT(3)
457 #define DA9062AA_BUCK4_CONF_SHIFT 3
458 #define DA9062AA_BUCK4_CONF_MASK BIT(3)
467 #define DA9062AA_BUCK3_CONF_SHIFT 3
468 #define DA9062AA_BUCK3_CONF_MASK BIT(3)
477 #define DA9062AA_LDO1_PD_DIS_SHIFT 3
478 #define DA9062AA_LDO1_PD_DIS_MASK BIT(3)
481 #define DA9062AA_LDO1_CONF_SHIFT 7
482 #define DA9062AA_LDO1_CONF_MASK BIT(7)
489 #define DA9062AA_LDO2_PD_DIS_SHIFT 3
490 #define DA9062AA_LDO2_PD_DIS_MASK BIT(3)
493 #define DA9062AA_LDO2_CONF_SHIFT 7
494 #define DA9062AA_LDO2_CONF_MASK BIT(7)
501 #define DA9062AA_LDO3_PD_DIS_SHIFT 3
502 #define DA9062AA_LDO3_PD_DIS_MASK BIT(3)
505 #define DA9062AA_LDO3_CONF_SHIFT 7
506 #define DA9062AA_LDO3_CONF_MASK BIT(7)
513 #define DA9062AA_LDO4_PD_DIS_SHIFT 3
514 #define DA9062AA_LDO4_PD_DIS_MASK BIT(3)
517 #define DA9062AA_LDO4_CONF_SHIFT 7
518 #define DA9062AA_LDO4_CONF_MASK BIT(7)
527 #define DA9062AA_VBUCK3_SEL_SHIFT 3
528 #define DA9062AA_VBUCK3_SEL_MASK BIT(3)
535 #define DA9062AA_VLDO4_SEL_SHIFT 7
536 #define DA9062AA_VLDO4_SEL_MASK BIT(7)
541 #define DA9062AA_RTC_READ_SHIFT 7
542 #define DA9062AA_RTC_READ_MASK BIT(7)
597 #define DA9062AA_TICK_ON_SHIFT 7
598 #define DA9062AA_TICK_ON_MASK BIT(7)
717 #define DA9062AA_CRYSTAL_SHIFT 3
718 #define DA9062AA_CRYSTAL_MASK BIT(3)
725 #define DA9062AA_EN_32KOUT_SHIFT 7
726 #define DA9062AA_EN_32KOUT_MASK BIT(7)
761 #define DA9062AA_BUCK4_VTTR_EN_SHIFT 3
762 #define DA9062AA_BUCK4_VTTR_EN_MASK BIT(3)
779 #define DA9062AA_BUCK2_SL_A_SHIFT 7
780 #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
785 #define DA9062AA_BUCK1_SL_A_SHIFT 7
786 #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
791 #define DA9062AA_BUCK4_SL_A_SHIFT 7
792 #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
797 #define DA9062AA_BUCK3_SL_A_SHIFT 7
798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
800 /* DA9062AA_VLDO[1-4]_A common */
806 #define DA9062AA_LDO1_SL_A_SHIFT 7
807 #define DA9062AA_LDO1_SL_A_MASK BIT(7)
812 #define DA9062AA_LDO2_SL_A_SHIFT 7
813 #define DA9062AA_LDO2_SL_A_MASK BIT(7)
818 #define DA9062AA_LDO3_SL_A_SHIFT 7
819 #define DA9062AA_LDO3_SL_A_MASK BIT(7)
824 #define DA9062AA_LDO4_SL_A_SHIFT 7
825 #define DA9062AA_LDO4_SL_A_MASK BIT(7)
830 #define DA9062AA_BUCK2_SL_B_SHIFT 7
831 #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
836 #define DA9062AA_BUCK1_SL_B_SHIFT 7
837 #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
842 #define DA9062AA_BUCK4_SL_B_SHIFT 7
843 #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
848 #define DA9062AA_BUCK3_SL_B_SHIFT 7
849 #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
854 #define DA9062AA_LDO1_SL_B_SHIFT 7
855 #define DA9062AA_LDO1_SL_B_MASK BIT(7)
860 #define DA9062AA_LDO2_SL_B_SHIFT 7
861 #define DA9062AA_LDO2_SL_B_MASK BIT(7)
866 #define DA9062AA_LDO3_SL_B_SHIFT 7
867 #define DA9062AA_LDO3_SL_B_MASK BIT(7)
872 #define DA9062AA_LDO4_SL_B_SHIFT 7
873 #define DA9062AA_LDO4_SL_B_MASK BIT(7)
890 #define DA9062AA_IRQ_TYPE_SHIFT 3
891 #define DA9062AA_IRQ_TYPE_MASK BIT(3)
908 #define DA9062AA_BUCK1_CLK_INV_SHIFT 3
909 #define DA9062AA_BUCK1_CLK_INV_MASK BIT(3)
942 #define DA9062AA_LDO4_AUTO_SHIFT 3
943 #define DA9062AA_LDO4_AUTO_MASK BIT(3)
946 #define DA9062AA_BUCK1_2_MERGE_SHIFT 3
947 #define DA9062AA_BUCK1_2_MERGE_MASK BIT(3)
958 #define DA9062AA_WATCHDOG_SD_SHIFT 3
959 #define DA9062AA_WATCHDOG_SD_MASK BIT(3)
966 #define DA9062AA_LDO_SD_SHIFT 7
967 #define DA9062AA_LDO_SD_MASK BIT(7)
978 #define DA9062AA_IF_RESET_SHIFT 7
979 #define DA9062AA_IF_RESET_MASK BIT(7)
988 #define DA9062AA_GPIO3_PUPD_SHIFT 3
989 #define DA9062AA_GPIO3_PUPD_MASK BIT(3)
996 #define DA9062AA_WDG_MODE_SHIFT 3
997 #define DA9062AA_WDG_MODE_MASK BIT(3)