Lines Matching +full:2 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
165 #define DA9062AA_DVC_BUSY_SHIFT 2
166 #define DA9062AA_DVC_BUSY_MASK BIT(2)
173 #define DA9062AA_GPI2_SHIFT 2
174 #define DA9062AA_GPI2_MASK BIT(2)
185 #define DA9062AA_LDO3_ILIM_SHIFT 2
186 #define DA9062AA_LDO3_ILIM_MASK BIT(2)
195 #define DA9062AA_VDD_FAULT_SHIFT 2
196 #define DA9062AA_VDD_FAULT_MASK BIT(2)
205 #define DA9062AA_WAIT_SHUT_SHIFT 7
206 #define DA9062AA_WAIT_SHUT_MASK BIT(7)
213 #define DA9062AA_E_TICK_SHIFT 2
214 #define DA9062AA_E_TICK_MASK BIT(2)
231 #define DA9062AA_E_VDD_WARN_SHIFT 7
232 #define DA9062AA_E_VDD_WARN_MASK BIT(7)
239 #define DA9062AA_E_GPI2_SHIFT 2
240 #define DA9062AA_E_GPI2_MASK BIT(2)
251 #define DA9062AA_M_TICK_SHIFT 2
252 #define DA9062AA_M_TICK_MASK BIT(2)
265 #define DA9062AA_M_VDD_WARN_SHIFT 7
266 #define DA9062AA_M_VDD_WARN_MASK BIT(7)
273 #define DA9062AA_M_GPI2_SHIFT 2
274 #define DA9062AA_M_GPI2_MASK BIT(2)
285 #define DA9062AA_POWER1_EN_SHIFT 2
286 #define DA9062AA_POWER1_EN_MASK BIT(2)
299 #define DA9062AA_FREEZE_EN_SHIFT 2
300 #define DA9062AA_FREEZE_EN_MASK BIT(2)
307 #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
308 #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
319 #define DA9062AA_DEF_SUPPLY_SHIFT 7
320 #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
331 #define DA9062AA_RTC_EN_SHIFT 2
332 #define DA9062AA_RTC_EN_MASK BIT(2)
333 #define DA9062AA_V_LOCK_SHIFT 7
334 #define DA9062AA_V_LOCK_MASK BIT(7)
341 #define DA9062AA_WAKE_UP_SHIFT 2
342 #define DA9062AA_WAKE_UP_MASK BIT(2)
347 #define DA9062AA_PMIF_DIS_SHIFT 2
348 #define DA9062AA_PMIF_DIS_MASK BIT(2)
355 #define DA9062AA_PMCONT_DIS_SHIFT 7
356 #define DA9062AA_PMCONT_DIS_MASK BIT(7)
361 #define DA9062AA_GPIO0_TYPE_SHIFT 2
362 #define DA9062AA_GPIO0_TYPE_MASK BIT(2)
369 #define DA9062AA_GPIO1_WEN_SHIFT 7
370 #define DA9062AA_GPIO1_WEN_MASK BIT(7)
375 #define DA9062AA_GPIO2_TYPE_SHIFT 2
376 #define DA9062AA_GPIO2_TYPE_MASK BIT(2)
383 #define DA9062AA_GPIO3_WEN_SHIFT 7
384 #define DA9062AA_GPIO3_WEN_MASK BIT(7)
389 #define DA9062AA_GPIO4_TYPE_SHIFT 2
390 #define DA9062AA_GPIO4_TYPE_MASK BIT(2)
399 #define DA9062AA_GPIO2_WKUP_MODE_SHIFT 2
400 #define DA9062AA_GPIO2_WKUP_MODE_MASK BIT(2)
411 #define DA9062AA_GPIO2_MODE_SHIFT 2
412 #define DA9062AA_GPIO2_MODE_MASK BIT(2)
481 #define DA9062AA_LDO1_CONF_SHIFT 7
482 #define DA9062AA_LDO1_CONF_MASK BIT(7)
493 #define DA9062AA_LDO2_CONF_SHIFT 7
494 #define DA9062AA_LDO2_CONF_MASK BIT(7)
505 #define DA9062AA_LDO3_CONF_SHIFT 7
506 #define DA9062AA_LDO3_CONF_MASK BIT(7)
517 #define DA9062AA_LDO4_CONF_SHIFT 7
518 #define DA9062AA_LDO4_CONF_MASK BIT(7)
525 #define DA9062AA_VBUCK4_SEL_SHIFT 2
526 #define DA9062AA_VBUCK4_SEL_MASK BIT(2)
535 #define DA9062AA_VLDO4_SEL_SHIFT 7
536 #define DA9062AA_VLDO4_SEL_MASK BIT(7)
541 #define DA9062AA_RTC_READ_SHIFT 7
542 #define DA9062AA_RTC_READ_MASK BIT(7)
597 #define DA9062AA_TICK_ON_SHIFT 7
598 #define DA9062AA_TICK_ON_MASK BIT(7)
725 #define DA9062AA_EN_32KOUT_SHIFT 7
726 #define DA9062AA_EN_32KOUT_MASK BIT(7)
779 #define DA9062AA_BUCK2_SL_A_SHIFT 7
780 #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
785 #define DA9062AA_BUCK1_SL_A_SHIFT 7
786 #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
791 #define DA9062AA_BUCK4_SL_A_SHIFT 7
792 #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
797 #define DA9062AA_BUCK3_SL_A_SHIFT 7
798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
800 /* DA9062AA_VLDO[1-4]_A common */
801 #define DA9062AA_VLDO_A_MIN_SEL 2
806 #define DA9062AA_LDO1_SL_A_SHIFT 7
807 #define DA9062AA_LDO1_SL_A_MASK BIT(7)
812 #define DA9062AA_LDO2_SL_A_SHIFT 7
813 #define DA9062AA_LDO2_SL_A_MASK BIT(7)
818 #define DA9062AA_LDO3_SL_A_SHIFT 7
819 #define DA9062AA_LDO3_SL_A_MASK BIT(7)
824 #define DA9062AA_LDO4_SL_A_SHIFT 7
825 #define DA9062AA_LDO4_SL_A_MASK BIT(7)
830 #define DA9062AA_BUCK2_SL_B_SHIFT 7
831 #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
836 #define DA9062AA_BUCK1_SL_B_SHIFT 7
837 #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
842 #define DA9062AA_BUCK4_SL_B_SHIFT 7
843 #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
848 #define DA9062AA_BUCK3_SL_B_SHIFT 7
849 #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
854 #define DA9062AA_LDO1_SL_B_SHIFT 7
855 #define DA9062AA_LDO1_SL_B_MASK BIT(7)
860 #define DA9062AA_LDO2_SL_B_SHIFT 7
861 #define DA9062AA_LDO2_SL_B_MASK BIT(7)
866 #define DA9062AA_LDO3_SL_B_SHIFT 7
867 #define DA9062AA_LDO3_SL_B_MASK BIT(7)
872 #define DA9062AA_LDO4_SL_B_SHIFT 7
873 #define DA9062AA_LDO4_SL_B_MASK BIT(7)
888 #define DA9062AA_PM_O_TYPE_SHIFT 2
889 #define DA9062AA_PM_O_TYPE_MASK BIT(2)
906 #define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT 2
907 #define DA9062AA_BUCK_ACTV_DISCHRG_MASK BIT(2)
920 #define DA9062AA_SYSTEM_EN_RD_SHIFT 2
921 #define DA9062AA_SYSTEM_EN_RD_MASK BIT(2)
930 #define DA9062AA_BUCK4_AUTO_SHIFT 2
931 #define DA9062AA_BUCK4_AUTO_MASK BIT(2)
940 #define DA9062AA_LDO3_AUTO_SHIFT 2
941 #define DA9062AA_LDO3_AUTO_MASK BIT(2)
956 #define DA9062AA_nONKEY_SD_SHIFT 2
957 #define DA9062AA_nONKEY_SD_MASK BIT(2)
966 #define DA9062AA_LDO_SD_SHIFT 7
967 #define DA9062AA_LDO_SD_MASK BIT(7)
972 #define DA9062AA_SHUT_DELAY_SHIFT 2
973 #define DA9062AA_SHUT_DELAY_MASK (0x03 << 2)
978 #define DA9062AA_IF_RESET_SHIFT 7
979 #define DA9062AA_IF_RESET_MASK BIT(7)
986 #define DA9062AA_GPIO2_PUPD_SHIFT 2
987 #define DA9062AA_GPIO2_PUPD_MASK BIT(2)