Lines Matching +full:0 +full:xc01
16 #define ARIZONA_SOFTWARE_RESET 0x00
17 #define ARIZONA_DEVICE_REVISION 0x01
18 #define ARIZONA_CTRL_IF_SPI_CFG_1 0x08
19 #define ARIZONA_CTRL_IF_I2C1_CFG_1 0x09
20 #define ARIZONA_CTRL_IF_I2C2_CFG_1 0x0A
21 #define ARIZONA_CTRL_IF_I2C1_CFG_2 0x0B
22 #define ARIZONA_CTRL_IF_I2C2_CFG_2 0x0C
23 #define ARIZONA_CTRL_IF_STATUS_1 0x0D
24 #define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
25 #define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
26 #define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18
27 #define ARIZONA_WRITE_SEQUENCER_CTRL_3 0x19
28 #define ARIZONA_WRITE_SEQUENCER_PROM 0x1A
29 #define ARIZONA_TONE_GENERATOR_1 0x20
30 #define ARIZONA_TONE_GENERATOR_2 0x21
31 #define ARIZONA_TONE_GENERATOR_3 0x22
32 #define ARIZONA_TONE_GENERATOR_4 0x23
33 #define ARIZONA_TONE_GENERATOR_5 0x24
34 #define ARIZONA_PWM_DRIVE_1 0x30
35 #define ARIZONA_PWM_DRIVE_2 0x31
36 #define ARIZONA_PWM_DRIVE_3 0x32
37 #define ARIZONA_WAKE_CONTROL 0x40
38 #define ARIZONA_SEQUENCE_CONTROL 0x41
39 #define ARIZONA_SPARE_TRIGGERS 0x42
40 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61
41 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
42 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
43 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64
44 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
45 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
46 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68
47 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69
48 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A
49 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B
50 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C
51 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D
52 #define ARIZONA_COMFORT_NOISE_GENERATOR 0x70
53 #define ARIZONA_HAPTICS_CONTROL_1 0x90
54 #define ARIZONA_HAPTICS_CONTROL_2 0x91
55 #define ARIZONA_HAPTICS_PHASE_1_INTENSITY 0x92
56 #define ARIZONA_HAPTICS_PHASE_1_DURATION 0x93
57 #define ARIZONA_HAPTICS_PHASE_2_INTENSITY 0x94
58 #define ARIZONA_HAPTICS_PHASE_2_DURATION 0x95
59 #define ARIZONA_HAPTICS_PHASE_3_INTENSITY 0x96
60 #define ARIZONA_HAPTICS_PHASE_3_DURATION 0x97
61 #define ARIZONA_HAPTICS_STATUS 0x98
62 #define ARIZONA_CLOCK_32K_1 0x100
63 #define ARIZONA_SYSTEM_CLOCK_1 0x101
64 #define ARIZONA_SAMPLE_RATE_1 0x102
65 #define ARIZONA_SAMPLE_RATE_2 0x103
66 #define ARIZONA_SAMPLE_RATE_3 0x104
67 #define ARIZONA_SAMPLE_RATE_1_STATUS 0x10A
68 #define ARIZONA_SAMPLE_RATE_2_STATUS 0x10B
69 #define ARIZONA_SAMPLE_RATE_3_STATUS 0x10C
70 #define ARIZONA_ASYNC_CLOCK_1 0x112
71 #define ARIZONA_ASYNC_SAMPLE_RATE_1 0x113
72 #define ARIZONA_ASYNC_SAMPLE_RATE_2 0x114
73 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B
74 #define ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C
75 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149
76 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A
77 #define ARIZONA_RATE_ESTIMATOR_1 0x152
78 #define ARIZONA_RATE_ESTIMATOR_2 0x153
79 #define ARIZONA_RATE_ESTIMATOR_3 0x154
80 #define ARIZONA_RATE_ESTIMATOR_4 0x155
81 #define ARIZONA_RATE_ESTIMATOR_5 0x156
82 #define ARIZONA_DYNAMIC_FREQUENCY_SCALING_1 0x161
83 #define ARIZONA_FLL1_CONTROL_1 0x171
84 #define ARIZONA_FLL1_CONTROL_2 0x172
85 #define ARIZONA_FLL1_CONTROL_3 0x173
86 #define ARIZONA_FLL1_CONTROL_4 0x174
87 #define ARIZONA_FLL1_CONTROL_5 0x175
88 #define ARIZONA_FLL1_CONTROL_6 0x176
89 #define ARIZONA_FLL1_LOOP_FILTER_TEST_1 0x177
90 #define ARIZONA_FLL1_NCO_TEST_0 0x178
91 #define ARIZONA_FLL1_CONTROL_7 0x179
92 #define ARIZONA_FLL1_SYNCHRONISER_1 0x181
93 #define ARIZONA_FLL1_SYNCHRONISER_2 0x182
94 #define ARIZONA_FLL1_SYNCHRONISER_3 0x183
95 #define ARIZONA_FLL1_SYNCHRONISER_4 0x184
96 #define ARIZONA_FLL1_SYNCHRONISER_5 0x185
97 #define ARIZONA_FLL1_SYNCHRONISER_6 0x186
98 #define ARIZONA_FLL1_SYNCHRONISER_7 0x187
99 #define ARIZONA_FLL1_SPREAD_SPECTRUM 0x189
100 #define ARIZONA_FLL1_GPIO_CLOCK 0x18A
101 #define ARIZONA_FLL2_CONTROL_1 0x191
102 #define ARIZONA_FLL2_CONTROL_2 0x192
103 #define ARIZONA_FLL2_CONTROL_3 0x193
104 #define ARIZONA_FLL2_CONTROL_4 0x194
105 #define ARIZONA_FLL2_CONTROL_5 0x195
106 #define ARIZONA_FLL2_CONTROL_6 0x196
107 #define ARIZONA_FLL2_LOOP_FILTER_TEST_1 0x197
108 #define ARIZONA_FLL2_NCO_TEST_0 0x198
109 #define ARIZONA_FLL2_CONTROL_7 0x199
110 #define ARIZONA_FLL2_SYNCHRONISER_1 0x1A1
111 #define ARIZONA_FLL2_SYNCHRONISER_2 0x1A2
112 #define ARIZONA_FLL2_SYNCHRONISER_3 0x1A3
113 #define ARIZONA_FLL2_SYNCHRONISER_4 0x1A4
114 #define ARIZONA_FLL2_SYNCHRONISER_5 0x1A5
115 #define ARIZONA_FLL2_SYNCHRONISER_6 0x1A6
116 #define ARIZONA_FLL2_SYNCHRONISER_7 0x1A7
117 #define ARIZONA_FLL2_SPREAD_SPECTRUM 0x1A9
118 #define ARIZONA_FLL2_GPIO_CLOCK 0x1AA
119 #define ARIZONA_MIC_CHARGE_PUMP_1 0x200
120 #define ARIZONA_LDO1_CONTROL_1 0x210
121 #define ARIZONA_LDO1_CONTROL_2 0x212
122 #define ARIZONA_LDO2_CONTROL_1 0x213
123 #define ARIZONA_MIC_BIAS_CTRL_1 0x218
124 #define ARIZONA_MIC_BIAS_CTRL_2 0x219
125 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A
126 #define ARIZONA_HP_CTRL_1L 0x225
127 #define ARIZONA_HP_CTRL_1R 0x226
128 #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293
129 #define ARIZONA_HEADPHONE_DETECT_1 0x29B
130 #define ARIZONA_HEADPHONE_DETECT_2 0x29C
131 #define ARIZONA_HP_DACVAL 0x29F
132 #define ARIZONA_MICD_CLAMP_CONTROL 0x2A2
133 #define ARIZONA_MIC_DETECT_1 0x2A3
134 #define ARIZONA_MIC_DETECT_2 0x2A4
135 #define ARIZONA_MIC_DETECT_3 0x2A5
136 #define ARIZONA_MIC_DETECT_LEVEL_1 0x2A6
137 #define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7
138 #define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8
139 #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9
140 #define ARIZONA_MIC_DETECT_4 0x2AB
141 #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3
142 #define ARIZONA_ISOLATION_CONTROL 0x2CB
143 #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3
144 #define ARIZONA_INPUT_ENABLES 0x300
145 #define ARIZONA_INPUT_ENABLES_STATUS 0x301
146 #define ARIZONA_INPUT_RATE 0x308
147 #define ARIZONA_INPUT_VOLUME_RAMP 0x309
148 #define ARIZONA_HPF_CONTROL 0x30C
149 #define ARIZONA_IN1L_CONTROL 0x310
150 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
151 #define ARIZONA_DMIC1L_CONTROL 0x312
152 #define ARIZONA_IN1R_CONTROL 0x314
153 #define ARIZONA_ADC_DIGITAL_VOLUME_1R 0x315
154 #define ARIZONA_DMIC1R_CONTROL 0x316
155 #define ARIZONA_IN2L_CONTROL 0x318
156 #define ARIZONA_ADC_DIGITAL_VOLUME_2L 0x319
157 #define ARIZONA_DMIC2L_CONTROL 0x31A
158 #define ARIZONA_IN2R_CONTROL 0x31C
159 #define ARIZONA_ADC_DIGITAL_VOLUME_2R 0x31D
160 #define ARIZONA_DMIC2R_CONTROL 0x31E
161 #define ARIZONA_IN3L_CONTROL 0x320
162 #define ARIZONA_ADC_DIGITAL_VOLUME_3L 0x321
163 #define ARIZONA_DMIC3L_CONTROL 0x322
164 #define ARIZONA_IN3R_CONTROL 0x324
165 #define ARIZONA_ADC_DIGITAL_VOLUME_3R 0x325
166 #define ARIZONA_DMIC3R_CONTROL 0x326
167 #define ARIZONA_IN4L_CONTROL 0x328
168 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
169 #define ARIZONA_DMIC4L_CONTROL 0x32A
170 #define ARIZONA_IN4R_CONTROL 0x32C
171 #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
172 #define ARIZONA_DMIC4R_CONTROL 0x32E
173 #define ARIZONA_OUTPUT_ENABLES_1 0x400
174 #define ARIZONA_OUTPUT_STATUS_1 0x401
175 #define ARIZONA_RAW_OUTPUT_STATUS_1 0x406
176 #define ARIZONA_OUTPUT_RATE_1 0x408
177 #define ARIZONA_OUTPUT_VOLUME_RAMP 0x409
178 #define ARIZONA_OUTPUT_PATH_CONFIG_1L 0x410
179 #define ARIZONA_DAC_DIGITAL_VOLUME_1L 0x411
180 #define ARIZONA_DAC_VOLUME_LIMIT_1L 0x412
181 #define ARIZONA_NOISE_GATE_SELECT_1L 0x413
182 #define ARIZONA_OUTPUT_PATH_CONFIG_1R 0x414
183 #define ARIZONA_DAC_DIGITAL_VOLUME_1R 0x415
184 #define ARIZONA_DAC_VOLUME_LIMIT_1R 0x416
185 #define ARIZONA_NOISE_GATE_SELECT_1R 0x417
186 #define ARIZONA_OUTPUT_PATH_CONFIG_2L 0x418
187 #define ARIZONA_DAC_DIGITAL_VOLUME_2L 0x419
188 #define ARIZONA_DAC_VOLUME_LIMIT_2L 0x41A
189 #define ARIZONA_NOISE_GATE_SELECT_2L 0x41B
190 #define ARIZONA_OUTPUT_PATH_CONFIG_2R 0x41C
191 #define ARIZONA_DAC_DIGITAL_VOLUME_2R 0x41D
192 #define ARIZONA_DAC_VOLUME_LIMIT_2R 0x41E
193 #define ARIZONA_NOISE_GATE_SELECT_2R 0x41F
194 #define ARIZONA_OUTPUT_PATH_CONFIG_3L 0x420
195 #define ARIZONA_DAC_DIGITAL_VOLUME_3L 0x421
196 #define ARIZONA_DAC_VOLUME_LIMIT_3L 0x422
197 #define ARIZONA_NOISE_GATE_SELECT_3L 0x423
198 #define ARIZONA_OUTPUT_PATH_CONFIG_3R 0x424
199 #define ARIZONA_DAC_DIGITAL_VOLUME_3R 0x425
200 #define ARIZONA_DAC_VOLUME_LIMIT_3R 0x426
201 #define ARIZONA_NOISE_GATE_SELECT_3R 0x427
202 #define ARIZONA_OUTPUT_PATH_CONFIG_4L 0x428
203 #define ARIZONA_DAC_DIGITAL_VOLUME_4L 0x429
204 #define ARIZONA_OUT_VOLUME_4L 0x42A
205 #define ARIZONA_NOISE_GATE_SELECT_4L 0x42B
206 #define ARIZONA_OUTPUT_PATH_CONFIG_4R 0x42C
207 #define ARIZONA_DAC_DIGITAL_VOLUME_4R 0x42D
208 #define ARIZONA_OUT_VOLUME_4R 0x42E
209 #define ARIZONA_NOISE_GATE_SELECT_4R 0x42F
210 #define ARIZONA_OUTPUT_PATH_CONFIG_5L 0x430
211 #define ARIZONA_DAC_DIGITAL_VOLUME_5L 0x431
212 #define ARIZONA_DAC_VOLUME_LIMIT_5L 0x432
213 #define ARIZONA_NOISE_GATE_SELECT_5L 0x433
214 #define ARIZONA_OUTPUT_PATH_CONFIG_5R 0x434
215 #define ARIZONA_DAC_DIGITAL_VOLUME_5R 0x435
216 #define ARIZONA_DAC_VOLUME_LIMIT_5R 0x436
217 #define ARIZONA_NOISE_GATE_SELECT_5R 0x437
218 #define ARIZONA_OUTPUT_PATH_CONFIG_6L 0x438
219 #define ARIZONA_DAC_DIGITAL_VOLUME_6L 0x439
220 #define ARIZONA_DAC_VOLUME_LIMIT_6L 0x43A
221 #define ARIZONA_NOISE_GATE_SELECT_6L 0x43B
222 #define ARIZONA_OUTPUT_PATH_CONFIG_6R 0x43C
223 #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D
224 #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E
225 #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F
226 #define ARIZONA_DRE_ENABLE 0x440
227 #define ARIZONA_DRE_CONTROL_1 0x441
228 #define ARIZONA_DRE_CONTROL_2 0x442
229 #define ARIZONA_DRE_CONTROL_3 0x443
230 #define ARIZONA_EDRE_ENABLE 0x448
231 #define ARIZONA_DAC_AEC_CONTROL_1 0x450
232 #define ARIZONA_DAC_AEC_CONTROL_2 0x451
233 #define ARIZONA_NOISE_GATE_CONTROL 0x458
234 #define ARIZONA_PDM_SPK1_CTRL_1 0x490
235 #define ARIZONA_PDM_SPK1_CTRL_2 0x491
236 #define ARIZONA_PDM_SPK2_CTRL_1 0x492
237 #define ARIZONA_PDM_SPK2_CTRL_2 0x493
238 #define ARIZONA_HP_TEST_CTRL_13 0x49A
239 #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0
240 #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1
241 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2
242 #define ARIZONA_HP_TEST_CTRL_1 0x4A4
243 #define ARIZONA_SPK_CTRL_2 0x4B5
244 #define ARIZONA_SPK_CTRL_3 0x4B6
245 #define ARIZONA_DAC_COMP_1 0x4DC
246 #define ARIZONA_DAC_COMP_2 0x4DD
247 #define ARIZONA_DAC_COMP_3 0x4DE
248 #define ARIZONA_DAC_COMP_4 0x4DF
249 #define ARIZONA_AIF1_BCLK_CTRL 0x500
250 #define ARIZONA_AIF1_TX_PIN_CTRL 0x501
251 #define ARIZONA_AIF1_RX_PIN_CTRL 0x502
252 #define ARIZONA_AIF1_RATE_CTRL 0x503
253 #define ARIZONA_AIF1_FORMAT 0x504
254 #define ARIZONA_AIF1_TX_BCLK_RATE 0x505
255 #define ARIZONA_AIF1_RX_BCLK_RATE 0x506
256 #define ARIZONA_AIF1_FRAME_CTRL_1 0x507
257 #define ARIZONA_AIF1_FRAME_CTRL_2 0x508
258 #define ARIZONA_AIF1_FRAME_CTRL_3 0x509
259 #define ARIZONA_AIF1_FRAME_CTRL_4 0x50A
260 #define ARIZONA_AIF1_FRAME_CTRL_5 0x50B
261 #define ARIZONA_AIF1_FRAME_CTRL_6 0x50C
262 #define ARIZONA_AIF1_FRAME_CTRL_7 0x50D
263 #define ARIZONA_AIF1_FRAME_CTRL_8 0x50E
264 #define ARIZONA_AIF1_FRAME_CTRL_9 0x50F
265 #define ARIZONA_AIF1_FRAME_CTRL_10 0x510
266 #define ARIZONA_AIF1_FRAME_CTRL_11 0x511
267 #define ARIZONA_AIF1_FRAME_CTRL_12 0x512
268 #define ARIZONA_AIF1_FRAME_CTRL_13 0x513
269 #define ARIZONA_AIF1_FRAME_CTRL_14 0x514
270 #define ARIZONA_AIF1_FRAME_CTRL_15 0x515
271 #define ARIZONA_AIF1_FRAME_CTRL_16 0x516
272 #define ARIZONA_AIF1_FRAME_CTRL_17 0x517
273 #define ARIZONA_AIF1_FRAME_CTRL_18 0x518
274 #define ARIZONA_AIF1_TX_ENABLES 0x519
275 #define ARIZONA_AIF1_RX_ENABLES 0x51A
276 #define ARIZONA_AIF1_FORCE_WRITE 0x51B
277 #define ARIZONA_AIF2_BCLK_CTRL 0x540
278 #define ARIZONA_AIF2_TX_PIN_CTRL 0x541
279 #define ARIZONA_AIF2_RX_PIN_CTRL 0x542
280 #define ARIZONA_AIF2_RATE_CTRL 0x543
281 #define ARIZONA_AIF2_FORMAT 0x544
282 #define ARIZONA_AIF2_TX_BCLK_RATE 0x545
283 #define ARIZONA_AIF2_RX_BCLK_RATE 0x546
284 #define ARIZONA_AIF2_FRAME_CTRL_1 0x547
285 #define ARIZONA_AIF2_FRAME_CTRL_2 0x548
286 #define ARIZONA_AIF2_FRAME_CTRL_3 0x549
287 #define ARIZONA_AIF2_FRAME_CTRL_4 0x54A
288 #define ARIZONA_AIF2_FRAME_CTRL_5 0x54B
289 #define ARIZONA_AIF2_FRAME_CTRL_6 0x54C
290 #define ARIZONA_AIF2_FRAME_CTRL_7 0x54D
291 #define ARIZONA_AIF2_FRAME_CTRL_8 0x54E
292 #define ARIZONA_AIF2_FRAME_CTRL_11 0x551
293 #define ARIZONA_AIF2_FRAME_CTRL_12 0x552
294 #define ARIZONA_AIF2_FRAME_CTRL_13 0x553
295 #define ARIZONA_AIF2_FRAME_CTRL_14 0x554
296 #define ARIZONA_AIF2_FRAME_CTRL_15 0x555
297 #define ARIZONA_AIF2_FRAME_CTRL_16 0x556
298 #define ARIZONA_AIF2_TX_ENABLES 0x559
299 #define ARIZONA_AIF2_RX_ENABLES 0x55A
300 #define ARIZONA_AIF2_FORCE_WRITE 0x55B
301 #define ARIZONA_AIF3_BCLK_CTRL 0x580
302 #define ARIZONA_AIF3_TX_PIN_CTRL 0x581
303 #define ARIZONA_AIF3_RX_PIN_CTRL 0x582
304 #define ARIZONA_AIF3_RATE_CTRL 0x583
305 #define ARIZONA_AIF3_FORMAT 0x584
306 #define ARIZONA_AIF3_TX_BCLK_RATE 0x585
307 #define ARIZONA_AIF3_RX_BCLK_RATE 0x586
308 #define ARIZONA_AIF3_FRAME_CTRL_1 0x587
309 #define ARIZONA_AIF3_FRAME_CTRL_2 0x588
310 #define ARIZONA_AIF3_FRAME_CTRL_3 0x589
311 #define ARIZONA_AIF3_FRAME_CTRL_4 0x58A
312 #define ARIZONA_AIF3_FRAME_CTRL_11 0x591
313 #define ARIZONA_AIF3_FRAME_CTRL_12 0x592
314 #define ARIZONA_AIF3_TX_ENABLES 0x599
315 #define ARIZONA_AIF3_RX_ENABLES 0x59A
316 #define ARIZONA_AIF3_FORCE_WRITE 0x59B
317 #define ARIZONA_SPD1_TX_CONTROL 0x5C2
318 #define ARIZONA_SPD1_TX_CHANNEL_STATUS_1 0x5C3
319 #define ARIZONA_SPD1_TX_CHANNEL_STATUS_2 0x5C4
320 #define ARIZONA_SPD1_TX_CHANNEL_STATUS_3 0x5C5
321 #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3
322 #define ARIZONA_SLIMBUS_RATES_1 0x5E5
323 #define ARIZONA_SLIMBUS_RATES_2 0x5E6
324 #define ARIZONA_SLIMBUS_RATES_3 0x5E7
325 #define ARIZONA_SLIMBUS_RATES_4 0x5E8
326 #define ARIZONA_SLIMBUS_RATES_5 0x5E9
327 #define ARIZONA_SLIMBUS_RATES_6 0x5EA
328 #define ARIZONA_SLIMBUS_RATES_7 0x5EB
329 #define ARIZONA_SLIMBUS_RATES_8 0x5EC
330 #define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE 0x5F5
331 #define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE 0x5F6
332 #define ARIZONA_SLIMBUS_RX_PORT_STATUS 0x5F7
333 #define ARIZONA_SLIMBUS_TX_PORT_STATUS 0x5F8
334 #define ARIZONA_PWM1MIX_INPUT_1_SOURCE 0x640
335 #define ARIZONA_PWM1MIX_INPUT_1_VOLUME 0x641
336 #define ARIZONA_PWM1MIX_INPUT_2_SOURCE 0x642
337 #define ARIZONA_PWM1MIX_INPUT_2_VOLUME 0x643
338 #define ARIZONA_PWM1MIX_INPUT_3_SOURCE 0x644
339 #define ARIZONA_PWM1MIX_INPUT_3_VOLUME 0x645
340 #define ARIZONA_PWM1MIX_INPUT_4_SOURCE 0x646
341 #define ARIZONA_PWM1MIX_INPUT_4_VOLUME 0x647
342 #define ARIZONA_PWM2MIX_INPUT_1_SOURCE 0x648
343 #define ARIZONA_PWM2MIX_INPUT_1_VOLUME 0x649
344 #define ARIZONA_PWM2MIX_INPUT_2_SOURCE 0x64A
345 #define ARIZONA_PWM2MIX_INPUT_2_VOLUME 0x64B
346 #define ARIZONA_PWM2MIX_INPUT_3_SOURCE 0x64C
347 #define ARIZONA_PWM2MIX_INPUT_3_VOLUME 0x64D
348 #define ARIZONA_PWM2MIX_INPUT_4_SOURCE 0x64E
349 #define ARIZONA_PWM2MIX_INPUT_4_VOLUME 0x64F
350 #define ARIZONA_MICMIX_INPUT_1_SOURCE 0x660
351 #define ARIZONA_MICMIX_INPUT_1_VOLUME 0x661
352 #define ARIZONA_MICMIX_INPUT_2_SOURCE 0x662
353 #define ARIZONA_MICMIX_INPUT_2_VOLUME 0x663
354 #define ARIZONA_MICMIX_INPUT_3_SOURCE 0x664
355 #define ARIZONA_MICMIX_INPUT_3_VOLUME 0x665
356 #define ARIZONA_MICMIX_INPUT_4_SOURCE 0x666
357 #define ARIZONA_MICMIX_INPUT_4_VOLUME 0x667
358 #define ARIZONA_NOISEMIX_INPUT_1_SOURCE 0x668
359 #define ARIZONA_NOISEMIX_INPUT_1_VOLUME 0x669
360 #define ARIZONA_NOISEMIX_INPUT_2_SOURCE 0x66A
361 #define ARIZONA_NOISEMIX_INPUT_2_VOLUME 0x66B
362 #define ARIZONA_NOISEMIX_INPUT_3_SOURCE 0x66C
363 #define ARIZONA_NOISEMIX_INPUT_3_VOLUME 0x66D
364 #define ARIZONA_NOISEMIX_INPUT_4_SOURCE 0x66E
365 #define ARIZONA_NOISEMIX_INPUT_4_VOLUME 0x66F
366 #define ARIZONA_OUT1LMIX_INPUT_1_SOURCE 0x680
367 #define ARIZONA_OUT1LMIX_INPUT_1_VOLUME 0x681
368 #define ARIZONA_OUT1LMIX_INPUT_2_SOURCE 0x682
369 #define ARIZONA_OUT1LMIX_INPUT_2_VOLUME 0x683
370 #define ARIZONA_OUT1LMIX_INPUT_3_SOURCE 0x684
371 #define ARIZONA_OUT1LMIX_INPUT_3_VOLUME 0x685
372 #define ARIZONA_OUT1LMIX_INPUT_4_SOURCE 0x686
373 #define ARIZONA_OUT1LMIX_INPUT_4_VOLUME 0x687
374 #define ARIZONA_OUT1RMIX_INPUT_1_SOURCE 0x688
375 #define ARIZONA_OUT1RMIX_INPUT_1_VOLUME 0x689
376 #define ARIZONA_OUT1RMIX_INPUT_2_SOURCE 0x68A
377 #define ARIZONA_OUT1RMIX_INPUT_2_VOLUME 0x68B
378 #define ARIZONA_OUT1RMIX_INPUT_3_SOURCE 0x68C
379 #define ARIZONA_OUT1RMIX_INPUT_3_VOLUME 0x68D
380 #define ARIZONA_OUT1RMIX_INPUT_4_SOURCE 0x68E
381 #define ARIZONA_OUT1RMIX_INPUT_4_VOLUME 0x68F
382 #define ARIZONA_OUT2LMIX_INPUT_1_SOURCE 0x690
383 #define ARIZONA_OUT2LMIX_INPUT_1_VOLUME 0x691
384 #define ARIZONA_OUT2LMIX_INPUT_2_SOURCE 0x692
385 #define ARIZONA_OUT2LMIX_INPUT_2_VOLUME 0x693
386 #define ARIZONA_OUT2LMIX_INPUT_3_SOURCE 0x694
387 #define ARIZONA_OUT2LMIX_INPUT_3_VOLUME 0x695
388 #define ARIZONA_OUT2LMIX_INPUT_4_SOURCE 0x696
389 #define ARIZONA_OUT2LMIX_INPUT_4_VOLUME 0x697
390 #define ARIZONA_OUT2RMIX_INPUT_1_SOURCE 0x698
391 #define ARIZONA_OUT2RMIX_INPUT_1_VOLUME 0x699
392 #define ARIZONA_OUT2RMIX_INPUT_2_SOURCE 0x69A
393 #define ARIZONA_OUT2RMIX_INPUT_2_VOLUME 0x69B
394 #define ARIZONA_OUT2RMIX_INPUT_3_SOURCE 0x69C
395 #define ARIZONA_OUT2RMIX_INPUT_3_VOLUME 0x69D
396 #define ARIZONA_OUT2RMIX_INPUT_4_SOURCE 0x69E
397 #define ARIZONA_OUT2RMIX_INPUT_4_VOLUME 0x69F
398 #define ARIZONA_OUT3LMIX_INPUT_1_SOURCE 0x6A0
399 #define ARIZONA_OUT3LMIX_INPUT_1_VOLUME 0x6A1
400 #define ARIZONA_OUT3LMIX_INPUT_2_SOURCE 0x6A2
401 #define ARIZONA_OUT3LMIX_INPUT_2_VOLUME 0x6A3
402 #define ARIZONA_OUT3LMIX_INPUT_3_SOURCE 0x6A4
403 #define ARIZONA_OUT3LMIX_INPUT_3_VOLUME 0x6A5
404 #define ARIZONA_OUT3LMIX_INPUT_4_SOURCE 0x6A6
405 #define ARIZONA_OUT3LMIX_INPUT_4_VOLUME 0x6A7
406 #define ARIZONA_OUT3RMIX_INPUT_1_SOURCE 0x6A8
407 #define ARIZONA_OUT3RMIX_INPUT_1_VOLUME 0x6A9
408 #define ARIZONA_OUT3RMIX_INPUT_2_SOURCE 0x6AA
409 #define ARIZONA_OUT3RMIX_INPUT_2_VOLUME 0x6AB
410 #define ARIZONA_OUT3RMIX_INPUT_3_SOURCE 0x6AC
411 #define ARIZONA_OUT3RMIX_INPUT_3_VOLUME 0x6AD
412 #define ARIZONA_OUT3RMIX_INPUT_4_SOURCE 0x6AE
413 #define ARIZONA_OUT3RMIX_INPUT_4_VOLUME 0x6AF
414 #define ARIZONA_OUT4LMIX_INPUT_1_SOURCE 0x6B0
415 #define ARIZONA_OUT4LMIX_INPUT_1_VOLUME 0x6B1
416 #define ARIZONA_OUT4LMIX_INPUT_2_SOURCE 0x6B2
417 #define ARIZONA_OUT4LMIX_INPUT_2_VOLUME 0x6B3
418 #define ARIZONA_OUT4LMIX_INPUT_3_SOURCE 0x6B4
419 #define ARIZONA_OUT4LMIX_INPUT_3_VOLUME 0x6B5
420 #define ARIZONA_OUT4LMIX_INPUT_4_SOURCE 0x6B6
421 #define ARIZONA_OUT4LMIX_INPUT_4_VOLUME 0x6B7
422 #define ARIZONA_OUT4RMIX_INPUT_1_SOURCE 0x6B8
423 #define ARIZONA_OUT4RMIX_INPUT_1_VOLUME 0x6B9
424 #define ARIZONA_OUT4RMIX_INPUT_2_SOURCE 0x6BA
425 #define ARIZONA_OUT4RMIX_INPUT_2_VOLUME 0x6BB
426 #define ARIZONA_OUT4RMIX_INPUT_3_SOURCE 0x6BC
427 #define ARIZONA_OUT4RMIX_INPUT_3_VOLUME 0x6BD
428 #define ARIZONA_OUT4RMIX_INPUT_4_SOURCE 0x6BE
429 #define ARIZONA_OUT4RMIX_INPUT_4_VOLUME 0x6BF
430 #define ARIZONA_OUT5LMIX_INPUT_1_SOURCE 0x6C0
431 #define ARIZONA_OUT5LMIX_INPUT_1_VOLUME 0x6C1
432 #define ARIZONA_OUT5LMIX_INPUT_2_SOURCE 0x6C2
433 #define ARIZONA_OUT5LMIX_INPUT_2_VOLUME 0x6C3
434 #define ARIZONA_OUT5LMIX_INPUT_3_SOURCE 0x6C4
435 #define ARIZONA_OUT5LMIX_INPUT_3_VOLUME 0x6C5
436 #define ARIZONA_OUT5LMIX_INPUT_4_SOURCE 0x6C6
437 #define ARIZONA_OUT5LMIX_INPUT_4_VOLUME 0x6C7
438 #define ARIZONA_OUT5RMIX_INPUT_1_SOURCE 0x6C8
439 #define ARIZONA_OUT5RMIX_INPUT_1_VOLUME 0x6C9
440 #define ARIZONA_OUT5RMIX_INPUT_2_SOURCE 0x6CA
441 #define ARIZONA_OUT5RMIX_INPUT_2_VOLUME 0x6CB
442 #define ARIZONA_OUT5RMIX_INPUT_3_SOURCE 0x6CC
443 #define ARIZONA_OUT5RMIX_INPUT_3_VOLUME 0x6CD
444 #define ARIZONA_OUT5RMIX_INPUT_4_SOURCE 0x6CE
445 #define ARIZONA_OUT5RMIX_INPUT_4_VOLUME 0x6CF
446 #define ARIZONA_OUT6LMIX_INPUT_1_SOURCE 0x6D0
447 #define ARIZONA_OUT6LMIX_INPUT_1_VOLUME 0x6D1
448 #define ARIZONA_OUT6LMIX_INPUT_2_SOURCE 0x6D2
449 #define ARIZONA_OUT6LMIX_INPUT_2_VOLUME 0x6D3
450 #define ARIZONA_OUT6LMIX_INPUT_3_SOURCE 0x6D4
451 #define ARIZONA_OUT6LMIX_INPUT_3_VOLUME 0x6D5
452 #define ARIZONA_OUT6LMIX_INPUT_4_SOURCE 0x6D6
453 #define ARIZONA_OUT6LMIX_INPUT_4_VOLUME 0x6D7
454 #define ARIZONA_OUT6RMIX_INPUT_1_SOURCE 0x6D8
455 #define ARIZONA_OUT6RMIX_INPUT_1_VOLUME 0x6D9
456 #define ARIZONA_OUT6RMIX_INPUT_2_SOURCE 0x6DA
457 #define ARIZONA_OUT6RMIX_INPUT_2_VOLUME 0x6DB
458 #define ARIZONA_OUT6RMIX_INPUT_3_SOURCE 0x6DC
459 #define ARIZONA_OUT6RMIX_INPUT_3_VOLUME 0x6DD
460 #define ARIZONA_OUT6RMIX_INPUT_4_SOURCE 0x6DE
461 #define ARIZONA_OUT6RMIX_INPUT_4_VOLUME 0x6DF
462 #define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE 0x700
463 #define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME 0x701
464 #define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE 0x702
465 #define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME 0x703
466 #define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE 0x704
467 #define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME 0x705
468 #define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE 0x706
469 #define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME 0x707
470 #define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE 0x708
471 #define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME 0x709
472 #define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE 0x70A
473 #define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME 0x70B
474 #define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE 0x70C
475 #define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME 0x70D
476 #define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE 0x70E
477 #define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME 0x70F
478 #define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE 0x710
479 #define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME 0x711
480 #define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE 0x712
481 #define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME 0x713
482 #define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE 0x714
483 #define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME 0x715
484 #define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE 0x716
485 #define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME 0x717
486 #define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE 0x718
487 #define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME 0x719
488 #define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE 0x71A
489 #define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME 0x71B
490 #define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE 0x71C
491 #define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME 0x71D
492 #define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE 0x71E
493 #define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME 0x71F
494 #define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE 0x720
495 #define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME 0x721
496 #define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE 0x722
497 #define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME 0x723
498 #define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE 0x724
499 #define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME 0x725
500 #define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE 0x726
501 #define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME 0x727
502 #define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE 0x728
503 #define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME 0x729
504 #define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE 0x72A
505 #define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME 0x72B
506 #define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE 0x72C
507 #define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME 0x72D
508 #define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE 0x72E
509 #define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME 0x72F
510 #define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE 0x730
511 #define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME 0x731
512 #define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE 0x732
513 #define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME 0x733
514 #define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE 0x734
515 #define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME 0x735
516 #define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE 0x736
517 #define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME 0x737
518 #define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE 0x738
519 #define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME 0x739
520 #define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE 0x73A
521 #define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME 0x73B
522 #define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE 0x73C
523 #define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME 0x73D
524 #define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE 0x73E
525 #define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME 0x73F
526 #define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE 0x740
527 #define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME 0x741
528 #define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE 0x742
529 #define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME 0x743
530 #define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE 0x744
531 #define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME 0x745
532 #define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE 0x746
533 #define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME 0x747
534 #define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE 0x748
535 #define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME 0x749
536 #define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE 0x74A
537 #define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME 0x74B
538 #define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE 0x74C
539 #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
540 #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
541 #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
542 #define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750
543 #define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751
544 #define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752
545 #define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753
546 #define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754
547 #define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755
548 #define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756
549 #define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757
550 #define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758
551 #define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759
552 #define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A
553 #define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B
554 #define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C
555 #define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D
556 #define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E
557 #define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F
558 #define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760
559 #define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761
560 #define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762
561 #define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763
562 #define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764
563 #define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765
564 #define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766
565 #define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767
566 #define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768
567 #define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769
568 #define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A
569 #define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B
570 #define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C
571 #define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D
572 #define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E
573 #define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F
574 #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
575 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
576 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
577 #define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME 0x783
578 #define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE 0x784
579 #define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME 0x785
580 #define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE 0x786
581 #define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME 0x787
582 #define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE 0x788
583 #define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME 0x789
584 #define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE 0x78A
585 #define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME 0x78B
586 #define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE 0x78C
587 #define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D
588 #define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E
589 #define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F
590 #define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0
591 #define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1
592 #define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2
593 #define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME 0x7C3
594 #define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE 0x7C4
595 #define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME 0x7C5
596 #define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE 0x7C6
597 #define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME 0x7C7
598 #define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE 0x7C8
599 #define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME 0x7C9
600 #define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE 0x7CA
601 #define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME 0x7CB
602 #define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE 0x7CC
603 #define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME 0x7CD
604 #define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE 0x7CE
605 #define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME 0x7CF
606 #define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE 0x7D0
607 #define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME 0x7D1
608 #define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE 0x7D2
609 #define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME 0x7D3
610 #define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE 0x7D4
611 #define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME 0x7D5
612 #define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE 0x7D6
613 #define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME 0x7D7
614 #define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE 0x7D8
615 #define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME 0x7D9
616 #define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE 0x7DA
617 #define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME 0x7DB
618 #define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE 0x7DC
619 #define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME 0x7DD
620 #define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE 0x7DE
621 #define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME 0x7DF
622 #define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE 0x7E0
623 #define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME 0x7E1
624 #define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE 0x7E2
625 #define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME 0x7E3
626 #define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE 0x7E4
627 #define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME 0x7E5
628 #define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE 0x7E6
629 #define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME 0x7E7
630 #define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE 0x7E8
631 #define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME 0x7E9
632 #define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE 0x7EA
633 #define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME 0x7EB
634 #define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE 0x7EC
635 #define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME 0x7ED
636 #define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE 0x7EE
637 #define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME 0x7EF
638 #define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE 0x7F0
639 #define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME 0x7F1
640 #define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE 0x7F2
641 #define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME 0x7F3
642 #define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE 0x7F4
643 #define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME 0x7F5
644 #define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE 0x7F6
645 #define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME 0x7F7
646 #define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE 0x7F8
647 #define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME 0x7F9
648 #define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE 0x7FA
649 #define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME 0x7FB
650 #define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE 0x7FC
651 #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD
652 #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE
653 #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF
654 #define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE 0x800
655 #define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME 0x801
656 #define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE 0x808
657 #define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME 0x809
658 #define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880
659 #define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881
660 #define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882
661 #define ARIZONA_EQ1MIX_INPUT_2_VOLUME 0x883
662 #define ARIZONA_EQ1MIX_INPUT_3_SOURCE 0x884
663 #define ARIZONA_EQ1MIX_INPUT_3_VOLUME 0x885
664 #define ARIZONA_EQ1MIX_INPUT_4_SOURCE 0x886
665 #define ARIZONA_EQ1MIX_INPUT_4_VOLUME 0x887
666 #define ARIZONA_EQ2MIX_INPUT_1_SOURCE 0x888
667 #define ARIZONA_EQ2MIX_INPUT_1_VOLUME 0x889
668 #define ARIZONA_EQ2MIX_INPUT_2_SOURCE 0x88A
669 #define ARIZONA_EQ2MIX_INPUT_2_VOLUME 0x88B
670 #define ARIZONA_EQ2MIX_INPUT_3_SOURCE 0x88C
671 #define ARIZONA_EQ2MIX_INPUT_3_VOLUME 0x88D
672 #define ARIZONA_EQ2MIX_INPUT_4_SOURCE 0x88E
673 #define ARIZONA_EQ2MIX_INPUT_4_VOLUME 0x88F
674 #define ARIZONA_EQ3MIX_INPUT_1_SOURCE 0x890
675 #define ARIZONA_EQ3MIX_INPUT_1_VOLUME 0x891
676 #define ARIZONA_EQ3MIX_INPUT_2_SOURCE 0x892
677 #define ARIZONA_EQ3MIX_INPUT_2_VOLUME 0x893
678 #define ARIZONA_EQ3MIX_INPUT_3_SOURCE 0x894
679 #define ARIZONA_EQ3MIX_INPUT_3_VOLUME 0x895
680 #define ARIZONA_EQ3MIX_INPUT_4_SOURCE 0x896
681 #define ARIZONA_EQ3MIX_INPUT_4_VOLUME 0x897
682 #define ARIZONA_EQ4MIX_INPUT_1_SOURCE 0x898
683 #define ARIZONA_EQ4MIX_INPUT_1_VOLUME 0x899
684 #define ARIZONA_EQ4MIX_INPUT_2_SOURCE 0x89A
685 #define ARIZONA_EQ4MIX_INPUT_2_VOLUME 0x89B
686 #define ARIZONA_EQ4MIX_INPUT_3_SOURCE 0x89C
687 #define ARIZONA_EQ4MIX_INPUT_3_VOLUME 0x89D
688 #define ARIZONA_EQ4MIX_INPUT_4_SOURCE 0x89E
689 #define ARIZONA_EQ4MIX_INPUT_4_VOLUME 0x89F
690 #define ARIZONA_DRC1LMIX_INPUT_1_SOURCE 0x8C0
691 #define ARIZONA_DRC1LMIX_INPUT_1_VOLUME 0x8C1
692 #define ARIZONA_DRC1LMIX_INPUT_2_SOURCE 0x8C2
693 #define ARIZONA_DRC1LMIX_INPUT_2_VOLUME 0x8C3
694 #define ARIZONA_DRC1LMIX_INPUT_3_SOURCE 0x8C4
695 #define ARIZONA_DRC1LMIX_INPUT_3_VOLUME 0x8C5
696 #define ARIZONA_DRC1LMIX_INPUT_4_SOURCE 0x8C6
697 #define ARIZONA_DRC1LMIX_INPUT_4_VOLUME 0x8C7
698 #define ARIZONA_DRC1RMIX_INPUT_1_SOURCE 0x8C8
699 #define ARIZONA_DRC1RMIX_INPUT_1_VOLUME 0x8C9
700 #define ARIZONA_DRC1RMIX_INPUT_2_SOURCE 0x8CA
701 #define ARIZONA_DRC1RMIX_INPUT_2_VOLUME 0x8CB
702 #define ARIZONA_DRC1RMIX_INPUT_3_SOURCE 0x8CC
703 #define ARIZONA_DRC1RMIX_INPUT_3_VOLUME 0x8CD
704 #define ARIZONA_DRC1RMIX_INPUT_4_SOURCE 0x8CE
705 #define ARIZONA_DRC1RMIX_INPUT_4_VOLUME 0x8CF
706 #define ARIZONA_DRC2LMIX_INPUT_1_SOURCE 0x8D0
707 #define ARIZONA_DRC2LMIX_INPUT_1_VOLUME 0x8D1
708 #define ARIZONA_DRC2LMIX_INPUT_2_SOURCE 0x8D2
709 #define ARIZONA_DRC2LMIX_INPUT_2_VOLUME 0x8D3
710 #define ARIZONA_DRC2LMIX_INPUT_3_SOURCE 0x8D4
711 #define ARIZONA_DRC2LMIX_INPUT_3_VOLUME 0x8D5
712 #define ARIZONA_DRC2LMIX_INPUT_4_SOURCE 0x8D6
713 #define ARIZONA_DRC2LMIX_INPUT_4_VOLUME 0x8D7
714 #define ARIZONA_DRC2RMIX_INPUT_1_SOURCE 0x8D8
715 #define ARIZONA_DRC2RMIX_INPUT_1_VOLUME 0x8D9
716 #define ARIZONA_DRC2RMIX_INPUT_2_SOURCE 0x8DA
717 #define ARIZONA_DRC2RMIX_INPUT_2_VOLUME 0x8DB
718 #define ARIZONA_DRC2RMIX_INPUT_3_SOURCE 0x8DC
719 #define ARIZONA_DRC2RMIX_INPUT_3_VOLUME 0x8DD
720 #define ARIZONA_DRC2RMIX_INPUT_4_SOURCE 0x8DE
721 #define ARIZONA_DRC2RMIX_INPUT_4_VOLUME 0x8DF
722 #define ARIZONA_HPLP1MIX_INPUT_1_SOURCE 0x900
723 #define ARIZONA_HPLP1MIX_INPUT_1_VOLUME 0x901
724 #define ARIZONA_HPLP1MIX_INPUT_2_SOURCE 0x902
725 #define ARIZONA_HPLP1MIX_INPUT_2_VOLUME 0x903
726 #define ARIZONA_HPLP1MIX_INPUT_3_SOURCE 0x904
727 #define ARIZONA_HPLP1MIX_INPUT_3_VOLUME 0x905
728 #define ARIZONA_HPLP1MIX_INPUT_4_SOURCE 0x906
729 #define ARIZONA_HPLP1MIX_INPUT_4_VOLUME 0x907
730 #define ARIZONA_HPLP2MIX_INPUT_1_SOURCE 0x908
731 #define ARIZONA_HPLP2MIX_INPUT_1_VOLUME 0x909
732 #define ARIZONA_HPLP2MIX_INPUT_2_SOURCE 0x90A
733 #define ARIZONA_HPLP2MIX_INPUT_2_VOLUME 0x90B
734 #define ARIZONA_HPLP2MIX_INPUT_3_SOURCE 0x90C
735 #define ARIZONA_HPLP2MIX_INPUT_3_VOLUME 0x90D
736 #define ARIZONA_HPLP2MIX_INPUT_4_SOURCE 0x90E
737 #define ARIZONA_HPLP2MIX_INPUT_4_VOLUME 0x90F
738 #define ARIZONA_HPLP3MIX_INPUT_1_SOURCE 0x910
739 #define ARIZONA_HPLP3MIX_INPUT_1_VOLUME 0x911
740 #define ARIZONA_HPLP3MIX_INPUT_2_SOURCE 0x912
741 #define ARIZONA_HPLP3MIX_INPUT_2_VOLUME 0x913
742 #define ARIZONA_HPLP3MIX_INPUT_3_SOURCE 0x914
743 #define ARIZONA_HPLP3MIX_INPUT_3_VOLUME 0x915
744 #define ARIZONA_HPLP3MIX_INPUT_4_SOURCE 0x916
745 #define ARIZONA_HPLP3MIX_INPUT_4_VOLUME 0x917
746 #define ARIZONA_HPLP4MIX_INPUT_1_SOURCE 0x918
747 #define ARIZONA_HPLP4MIX_INPUT_1_VOLUME 0x919
748 #define ARIZONA_HPLP4MIX_INPUT_2_SOURCE 0x91A
749 #define ARIZONA_HPLP4MIX_INPUT_2_VOLUME 0x91B
750 #define ARIZONA_HPLP4MIX_INPUT_3_SOURCE 0x91C
751 #define ARIZONA_HPLP4MIX_INPUT_3_VOLUME 0x91D
752 #define ARIZONA_HPLP4MIX_INPUT_4_SOURCE 0x91E
753 #define ARIZONA_HPLP4MIX_INPUT_4_VOLUME 0x91F
754 #define ARIZONA_DSP1LMIX_INPUT_1_SOURCE 0x940
755 #define ARIZONA_DSP1LMIX_INPUT_1_VOLUME 0x941
756 #define ARIZONA_DSP1LMIX_INPUT_2_SOURCE 0x942
757 #define ARIZONA_DSP1LMIX_INPUT_2_VOLUME 0x943
758 #define ARIZONA_DSP1LMIX_INPUT_3_SOURCE 0x944
759 #define ARIZONA_DSP1LMIX_INPUT_3_VOLUME 0x945
760 #define ARIZONA_DSP1LMIX_INPUT_4_SOURCE 0x946
761 #define ARIZONA_DSP1LMIX_INPUT_4_VOLUME 0x947
762 #define ARIZONA_DSP1RMIX_INPUT_1_SOURCE 0x948
763 #define ARIZONA_DSP1RMIX_INPUT_1_VOLUME 0x949
764 #define ARIZONA_DSP1RMIX_INPUT_2_SOURCE 0x94A
765 #define ARIZONA_DSP1RMIX_INPUT_2_VOLUME 0x94B
766 #define ARIZONA_DSP1RMIX_INPUT_3_SOURCE 0x94C
767 #define ARIZONA_DSP1RMIX_INPUT_3_VOLUME 0x94D
768 #define ARIZONA_DSP1RMIX_INPUT_4_SOURCE 0x94E
769 #define ARIZONA_DSP1RMIX_INPUT_4_VOLUME 0x94F
770 #define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE 0x950
771 #define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE 0x958
772 #define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE 0x960
773 #define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE 0x968
774 #define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE 0x970
775 #define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE 0x978
776 #define ARIZONA_DSP2LMIX_INPUT_1_SOURCE 0x980
777 #define ARIZONA_DSP2LMIX_INPUT_1_VOLUME 0x981
778 #define ARIZONA_DSP2LMIX_INPUT_2_SOURCE 0x982
779 #define ARIZONA_DSP2LMIX_INPUT_2_VOLUME 0x983
780 #define ARIZONA_DSP2LMIX_INPUT_3_SOURCE 0x984
781 #define ARIZONA_DSP2LMIX_INPUT_3_VOLUME 0x985
782 #define ARIZONA_DSP2LMIX_INPUT_4_SOURCE 0x986
783 #define ARIZONA_DSP2LMIX_INPUT_4_VOLUME 0x987
784 #define ARIZONA_DSP2RMIX_INPUT_1_SOURCE 0x988
785 #define ARIZONA_DSP2RMIX_INPUT_1_VOLUME 0x989
786 #define ARIZONA_DSP2RMIX_INPUT_2_SOURCE 0x98A
787 #define ARIZONA_DSP2RMIX_INPUT_2_VOLUME 0x98B
788 #define ARIZONA_DSP2RMIX_INPUT_3_SOURCE 0x98C
789 #define ARIZONA_DSP2RMIX_INPUT_3_VOLUME 0x98D
790 #define ARIZONA_DSP2RMIX_INPUT_4_SOURCE 0x98E
791 #define ARIZONA_DSP2RMIX_INPUT_4_VOLUME 0x98F
792 #define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE 0x990
793 #define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE 0x998
794 #define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0
795 #define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8
796 #define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0
797 #define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8
798 #define ARIZONA_DSP3LMIX_INPUT_1_SOURCE 0x9C0
799 #define ARIZONA_DSP3LMIX_INPUT_1_VOLUME 0x9C1
800 #define ARIZONA_DSP3LMIX_INPUT_2_SOURCE 0x9C2
801 #define ARIZONA_DSP3LMIX_INPUT_2_VOLUME 0x9C3
802 #define ARIZONA_DSP3LMIX_INPUT_3_SOURCE 0x9C4
803 #define ARIZONA_DSP3LMIX_INPUT_3_VOLUME 0x9C5
804 #define ARIZONA_DSP3LMIX_INPUT_4_SOURCE 0x9C6
805 #define ARIZONA_DSP3LMIX_INPUT_4_VOLUME 0x9C7
806 #define ARIZONA_DSP3RMIX_INPUT_1_SOURCE 0x9C8
807 #define ARIZONA_DSP3RMIX_INPUT_1_VOLUME 0x9C9
808 #define ARIZONA_DSP3RMIX_INPUT_2_SOURCE 0x9CA
809 #define ARIZONA_DSP3RMIX_INPUT_2_VOLUME 0x9CB
810 #define ARIZONA_DSP3RMIX_INPUT_3_SOURCE 0x9CC
811 #define ARIZONA_DSP3RMIX_INPUT_3_VOLUME 0x9CD
812 #define ARIZONA_DSP3RMIX_INPUT_4_SOURCE 0x9CE
813 #define ARIZONA_DSP3RMIX_INPUT_4_VOLUME 0x9CF
814 #define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0
815 #define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8
816 #define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0
817 #define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8
818 #define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0
819 #define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8
820 #define ARIZONA_DSP4LMIX_INPUT_1_SOURCE 0xA00
821 #define ARIZONA_DSP4LMIX_INPUT_1_VOLUME 0xA01
822 #define ARIZONA_DSP4LMIX_INPUT_2_SOURCE 0xA02
823 #define ARIZONA_DSP4LMIX_INPUT_2_VOLUME 0xA03
824 #define ARIZONA_DSP4LMIX_INPUT_3_SOURCE 0xA04
825 #define ARIZONA_DSP4LMIX_INPUT_3_VOLUME 0xA05
826 #define ARIZONA_DSP4LMIX_INPUT_4_SOURCE 0xA06
827 #define ARIZONA_DSP4LMIX_INPUT_4_VOLUME 0xA07
828 #define ARIZONA_DSP4RMIX_INPUT_1_SOURCE 0xA08
829 #define ARIZONA_DSP4RMIX_INPUT_1_VOLUME 0xA09
830 #define ARIZONA_DSP4RMIX_INPUT_2_SOURCE 0xA0A
831 #define ARIZONA_DSP4RMIX_INPUT_2_VOLUME 0xA0B
832 #define ARIZONA_DSP4RMIX_INPUT_3_SOURCE 0xA0C
833 #define ARIZONA_DSP4RMIX_INPUT_3_VOLUME 0xA0D
834 #define ARIZONA_DSP4RMIX_INPUT_4_SOURCE 0xA0E
835 #define ARIZONA_DSP4RMIX_INPUT_4_VOLUME 0xA0F
836 #define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE 0xA10
837 #define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE 0xA18
838 #define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE 0xA20
839 #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28
840 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30
841 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38
842 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80
843 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88
844 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90
845 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98
846 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00
847 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08
848 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10
849 #define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18
850 #define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20
851 #define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28
852 #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
853 #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
854 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
855 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
856 #define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50
857 #define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58
858 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
859 #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
860 #define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70
861 #define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78
862 #define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE 0xB80
863 #define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE 0xB88
864 #define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE 0xB90
865 #define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE 0xB98
866 #define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE 0xBA0
867 #define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8
868 #define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0
869 #define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8
870 #define ARIZONA_GPIO1_CTRL 0xC00
871 #define ARIZONA_GPIO2_CTRL 0xC01
872 #define ARIZONA_GPIO3_CTRL 0xC02
873 #define ARIZONA_GPIO4_CTRL 0xC03
874 #define ARIZONA_GPIO5_CTRL 0xC04
875 #define ARIZONA_IRQ_CTRL_1 0xC0F
876 #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10
877 #define ARIZONA_GP_SWITCH_1 0xC18
878 #define ARIZONA_MISC_PAD_CTRL_1 0xC20
879 #define ARIZONA_MISC_PAD_CTRL_2 0xC21
880 #define ARIZONA_MISC_PAD_CTRL_3 0xC22
881 #define ARIZONA_MISC_PAD_CTRL_4 0xC23
882 #define ARIZONA_MISC_PAD_CTRL_5 0xC24
883 #define ARIZONA_MISC_PAD_CTRL_6 0xC25
884 #define ARIZONA_MISC_PAD_CTRL_7 0xC30
885 #define ARIZONA_MISC_PAD_CTRL_8 0xC31
886 #define ARIZONA_MISC_PAD_CTRL_9 0xC32
887 #define ARIZONA_MISC_PAD_CTRL_10 0xC33
888 #define ARIZONA_MISC_PAD_CTRL_11 0xC34
889 #define ARIZONA_MISC_PAD_CTRL_12 0xC35
890 #define ARIZONA_MISC_PAD_CTRL_13 0xC36
891 #define ARIZONA_MISC_PAD_CTRL_14 0xC37
892 #define ARIZONA_MISC_PAD_CTRL_15 0xC38
893 #define ARIZONA_MISC_PAD_CTRL_16 0xC39
894 #define ARIZONA_MISC_PAD_CTRL_17 0xC3A
895 #define ARIZONA_MISC_PAD_CTRL_18 0xC3B
896 #define ARIZONA_INTERRUPT_STATUS_1 0xD00
897 #define ARIZONA_INTERRUPT_STATUS_2 0xD01
898 #define ARIZONA_INTERRUPT_STATUS_3 0xD02
899 #define ARIZONA_INTERRUPT_STATUS_4 0xD03
900 #define ARIZONA_INTERRUPT_STATUS_5 0xD04
901 #define ARIZONA_INTERRUPT_STATUS_6 0xD05
902 #define ARIZONA_INTERRUPT_STATUS_1_MASK 0xD08
903 #define ARIZONA_INTERRUPT_STATUS_2_MASK 0xD09
904 #define ARIZONA_INTERRUPT_STATUS_3_MASK 0xD0A
905 #define ARIZONA_INTERRUPT_STATUS_4_MASK 0xD0B
906 #define ARIZONA_INTERRUPT_STATUS_5_MASK 0xD0C
907 #define ARIZONA_INTERRUPT_STATUS_6_MASK 0xD0D
908 #define ARIZONA_INTERRUPT_CONTROL 0xD0F
909 #define ARIZONA_IRQ2_STATUS_1 0xD10
910 #define ARIZONA_IRQ2_STATUS_2 0xD11
911 #define ARIZONA_IRQ2_STATUS_3 0xD12
912 #define ARIZONA_IRQ2_STATUS_4 0xD13
913 #define ARIZONA_IRQ2_STATUS_5 0xD14
914 #define ARIZONA_IRQ2_STATUS_6 0xD15
915 #define ARIZONA_IRQ2_STATUS_1_MASK 0xD18
916 #define ARIZONA_IRQ2_STATUS_2_MASK 0xD19
917 #define ARIZONA_IRQ2_STATUS_3_MASK 0xD1A
918 #define ARIZONA_IRQ2_STATUS_4_MASK 0xD1B
919 #define ARIZONA_IRQ2_STATUS_5_MASK 0xD1C
920 #define ARIZONA_IRQ2_STATUS_6_MASK 0xD1D
921 #define ARIZONA_IRQ2_CONTROL 0xD1F
922 #define ARIZONA_INTERRUPT_RAW_STATUS_2 0xD20
923 #define ARIZONA_INTERRUPT_RAW_STATUS_3 0xD21
924 #define ARIZONA_INTERRUPT_RAW_STATUS_4 0xD22
925 #define ARIZONA_INTERRUPT_RAW_STATUS_5 0xD23
926 #define ARIZONA_INTERRUPT_RAW_STATUS_6 0xD24
927 #define ARIZONA_INTERRUPT_RAW_STATUS_7 0xD25
928 #define ARIZONA_INTERRUPT_RAW_STATUS_8 0xD26
929 #define ARIZONA_INTERRUPT_RAW_STATUS_9 0xD28
930 #define ARIZONA_IRQ_PIN_STATUS 0xD40
931 #define ARIZONA_ADSP2_IRQ0 0xD41
932 #define ARIZONA_AOD_WKUP_AND_TRIG 0xD50
933 #define ARIZONA_AOD_IRQ1 0xD51
934 #define ARIZONA_AOD_IRQ2 0xD52
935 #define ARIZONA_AOD_IRQ_MASK_IRQ1 0xD53
936 #define ARIZONA_AOD_IRQ_MASK_IRQ2 0xD54
937 #define ARIZONA_AOD_IRQ_RAW_STATUS 0xD55
938 #define ARIZONA_JACK_DETECT_DEBOUNCE 0xD56
939 #define ARIZONA_FX_CTRL1 0xE00
940 #define ARIZONA_FX_CTRL2 0xE01
941 #define ARIZONA_EQ1_1 0xE10
942 #define ARIZONA_EQ1_2 0xE11
943 #define ARIZONA_EQ1_3 0xE12
944 #define ARIZONA_EQ1_4 0xE13
945 #define ARIZONA_EQ1_5 0xE14
946 #define ARIZONA_EQ1_6 0xE15
947 #define ARIZONA_EQ1_7 0xE16
948 #define ARIZONA_EQ1_8 0xE17
949 #define ARIZONA_EQ1_9 0xE18
950 #define ARIZONA_EQ1_10 0xE19
951 #define ARIZONA_EQ1_11 0xE1A
952 #define ARIZONA_EQ1_12 0xE1B
953 #define ARIZONA_EQ1_13 0xE1C
954 #define ARIZONA_EQ1_14 0xE1D
955 #define ARIZONA_EQ1_15 0xE1E
956 #define ARIZONA_EQ1_16 0xE1F
957 #define ARIZONA_EQ1_17 0xE20
958 #define ARIZONA_EQ1_18 0xE21
959 #define ARIZONA_EQ1_19 0xE22
960 #define ARIZONA_EQ1_20 0xE23
961 #define ARIZONA_EQ1_21 0xE24
962 #define ARIZONA_EQ2_1 0xE26
963 #define ARIZONA_EQ2_2 0xE27
964 #define ARIZONA_EQ2_3 0xE28
965 #define ARIZONA_EQ2_4 0xE29
966 #define ARIZONA_EQ2_5 0xE2A
967 #define ARIZONA_EQ2_6 0xE2B
968 #define ARIZONA_EQ2_7 0xE2C
969 #define ARIZONA_EQ2_8 0xE2D
970 #define ARIZONA_EQ2_9 0xE2E
971 #define ARIZONA_EQ2_10 0xE2F
972 #define ARIZONA_EQ2_11 0xE30
973 #define ARIZONA_EQ2_12 0xE31
974 #define ARIZONA_EQ2_13 0xE32
975 #define ARIZONA_EQ2_14 0xE33
976 #define ARIZONA_EQ2_15 0xE34
977 #define ARIZONA_EQ2_16 0xE35
978 #define ARIZONA_EQ2_17 0xE36
979 #define ARIZONA_EQ2_18 0xE37
980 #define ARIZONA_EQ2_19 0xE38
981 #define ARIZONA_EQ2_20 0xE39
982 #define ARIZONA_EQ2_21 0xE3A
983 #define ARIZONA_EQ3_1 0xE3C
984 #define ARIZONA_EQ3_2 0xE3D
985 #define ARIZONA_EQ3_3 0xE3E
986 #define ARIZONA_EQ3_4 0xE3F
987 #define ARIZONA_EQ3_5 0xE40
988 #define ARIZONA_EQ3_6 0xE41
989 #define ARIZONA_EQ3_7 0xE42
990 #define ARIZONA_EQ3_8 0xE43
991 #define ARIZONA_EQ3_9 0xE44
992 #define ARIZONA_EQ3_10 0xE45
993 #define ARIZONA_EQ3_11 0xE46
994 #define ARIZONA_EQ3_12 0xE47
995 #define ARIZONA_EQ3_13 0xE48
996 #define ARIZONA_EQ3_14 0xE49
997 #define ARIZONA_EQ3_15 0xE4A
998 #define ARIZONA_EQ3_16 0xE4B
999 #define ARIZONA_EQ3_17 0xE4C
1000 #define ARIZONA_EQ3_18 0xE4D
1001 #define ARIZONA_EQ3_19 0xE4E
1002 #define ARIZONA_EQ3_20 0xE4F
1003 #define ARIZONA_EQ3_21 0xE50
1004 #define ARIZONA_EQ4_1 0xE52
1005 #define ARIZONA_EQ4_2 0xE53
1006 #define ARIZONA_EQ4_3 0xE54
1007 #define ARIZONA_EQ4_4 0xE55
1008 #define ARIZONA_EQ4_5 0xE56
1009 #define ARIZONA_EQ4_6 0xE57
1010 #define ARIZONA_EQ4_7 0xE58
1011 #define ARIZONA_EQ4_8 0xE59
1012 #define ARIZONA_EQ4_9 0xE5A
1013 #define ARIZONA_EQ4_10 0xE5B
1014 #define ARIZONA_EQ4_11 0xE5C
1015 #define ARIZONA_EQ4_12 0xE5D
1016 #define ARIZONA_EQ4_13 0xE5E
1017 #define ARIZONA_EQ4_14 0xE5F
1018 #define ARIZONA_EQ4_15 0xE60
1019 #define ARIZONA_EQ4_16 0xE61
1020 #define ARIZONA_EQ4_17 0xE62
1021 #define ARIZONA_EQ4_18 0xE63
1022 #define ARIZONA_EQ4_19 0xE64
1023 #define ARIZONA_EQ4_20 0xE65
1024 #define ARIZONA_EQ4_21 0xE66
1025 #define ARIZONA_DRC1_CTRL1 0xE80
1026 #define ARIZONA_DRC1_CTRL2 0xE81
1027 #define ARIZONA_DRC1_CTRL3 0xE82
1028 #define ARIZONA_DRC1_CTRL4 0xE83
1029 #define ARIZONA_DRC1_CTRL5 0xE84
1030 #define ARIZONA_DRC2_CTRL1 0xE89
1031 #define ARIZONA_DRC2_CTRL2 0xE8A
1032 #define ARIZONA_DRC2_CTRL3 0xE8B
1033 #define ARIZONA_DRC2_CTRL4 0xE8C
1034 #define ARIZONA_DRC2_CTRL5 0xE8D
1035 #define ARIZONA_HPLPF1_1 0xEC0
1036 #define ARIZONA_HPLPF1_2 0xEC1
1037 #define ARIZONA_HPLPF2_1 0xEC4
1038 #define ARIZONA_HPLPF2_2 0xEC5
1039 #define ARIZONA_HPLPF3_1 0xEC8
1040 #define ARIZONA_HPLPF3_2 0xEC9
1041 #define ARIZONA_HPLPF4_1 0xECC
1042 #define ARIZONA_HPLPF4_2 0xECD
1043 #define ARIZONA_ASRC_ENABLE 0xEE0
1044 #define ARIZONA_ASRC_STATUS 0xEE1
1045 #define ARIZONA_ASRC_RATE1 0xEE2
1046 #define ARIZONA_ASRC_RATE2 0xEE3
1047 #define ARIZONA_ISRC_1_CTRL_1 0xEF0
1048 #define ARIZONA_ISRC_1_CTRL_2 0xEF1
1049 #define ARIZONA_ISRC_1_CTRL_3 0xEF2
1050 #define ARIZONA_ISRC_2_CTRL_1 0xEF3
1051 #define ARIZONA_ISRC_2_CTRL_2 0xEF4
1052 #define ARIZONA_ISRC_2_CTRL_3 0xEF5
1053 #define ARIZONA_ISRC_3_CTRL_1 0xEF6
1054 #define ARIZONA_ISRC_3_CTRL_2 0xEF7
1055 #define ARIZONA_ISRC_3_CTRL_3 0xEF8
1056 #define ARIZONA_CLOCK_CONTROL 0xF00
1057 #define ARIZONA_ANC_SRC 0xF01
1058 #define ARIZONA_DSP_STATUS 0xF02
1059 #define ARIZONA_ANC_COEFF_START 0xF08
1060 #define ARIZONA_ANC_COEFF_END 0xF12
1061 #define ARIZONA_FCL_FILTER_CONTROL 0xF15
1062 #define ARIZONA_FCL_ADC_REFORMATTER_CONTROL 0xF17
1063 #define ARIZONA_FCL_COEFF_START 0xF18
1064 #define ARIZONA_FCL_COEFF_END 0xF69
1065 #define ARIZONA_FCR_FILTER_CONTROL 0xF70
1066 #define ARIZONA_FCR_ADC_REFORMATTER_CONTROL 0xF72
1067 #define ARIZONA_FCR_COEFF_START 0xF73
1068 #define ARIZONA_FCR_COEFF_END 0xFC4
1069 #define ARIZONA_DSP1_CONTROL_1 0x1100
1070 #define ARIZONA_DSP1_CLOCKING_1 0x1101
1071 #define ARIZONA_DSP1_STATUS_1 0x1104
1072 #define ARIZONA_DSP1_STATUS_2 0x1105
1073 #define ARIZONA_DSP1_STATUS_3 0x1106
1074 #define ARIZONA_DSP1_STATUS_4 0x1107
1075 #define ARIZONA_DSP1_WDMA_BUFFER_1 0x1110
1076 #define ARIZONA_DSP1_WDMA_BUFFER_2 0x1111
1077 #define ARIZONA_DSP1_WDMA_BUFFER_3 0x1112
1078 #define ARIZONA_DSP1_WDMA_BUFFER_4 0x1113
1079 #define ARIZONA_DSP1_WDMA_BUFFER_5 0x1114
1080 #define ARIZONA_DSP1_WDMA_BUFFER_6 0x1115
1081 #define ARIZONA_DSP1_WDMA_BUFFER_7 0x1116
1082 #define ARIZONA_DSP1_WDMA_BUFFER_8 0x1117
1083 #define ARIZONA_DSP1_RDMA_BUFFER_1 0x1120
1084 #define ARIZONA_DSP1_RDMA_BUFFER_2 0x1121
1085 #define ARIZONA_DSP1_RDMA_BUFFER_3 0x1122
1086 #define ARIZONA_DSP1_RDMA_BUFFER_4 0x1123
1087 #define ARIZONA_DSP1_RDMA_BUFFER_5 0x1124
1088 #define ARIZONA_DSP1_RDMA_BUFFER_6 0x1125
1089 #define ARIZONA_DSP1_WDMA_CONFIG_1 0x1130
1090 #define ARIZONA_DSP1_WDMA_CONFIG_2 0x1131
1091 #define ARIZONA_DSP1_WDMA_OFFSET_1 0x1132
1092 #define ARIZONA_DSP1_RDMA_CONFIG_1 0x1134
1093 #define ARIZONA_DSP1_RDMA_OFFSET_1 0x1135
1094 #define ARIZONA_DSP1_EXTERNAL_START_SELECT_1 0x1138
1095 #define ARIZONA_DSP1_SCRATCH_0 0x1140
1096 #define ARIZONA_DSP1_SCRATCH_1 0x1141
1097 #define ARIZONA_DSP1_SCRATCH_2 0x1142
1098 #define ARIZONA_DSP1_SCRATCH_3 0x1143
1099 #define ARIZONA_DSP2_CONTROL_1 0x1200
1100 #define ARIZONA_DSP2_CLOCKING_1 0x1201
1101 #define ARIZONA_DSP2_STATUS_1 0x1204
1102 #define ARIZONA_DSP2_STATUS_2 0x1205
1103 #define ARIZONA_DSP2_STATUS_3 0x1206
1104 #define ARIZONA_DSP2_STATUS_4 0x1207
1105 #define ARIZONA_DSP2_WDMA_BUFFER_1 0x1210
1106 #define ARIZONA_DSP2_WDMA_BUFFER_2 0x1211
1107 #define ARIZONA_DSP2_WDMA_BUFFER_3 0x1212
1108 #define ARIZONA_DSP2_WDMA_BUFFER_4 0x1213
1109 #define ARIZONA_DSP2_WDMA_BUFFER_5 0x1214
1110 #define ARIZONA_DSP2_WDMA_BUFFER_6 0x1215
1111 #define ARIZONA_DSP2_WDMA_BUFFER_7 0x1216
1112 #define ARIZONA_DSP2_WDMA_BUFFER_8 0x1217
1113 #define ARIZONA_DSP2_RDMA_BUFFER_1 0x1220
1114 #define ARIZONA_DSP2_RDMA_BUFFER_2 0x1221
1115 #define ARIZONA_DSP2_RDMA_BUFFER_3 0x1222
1116 #define ARIZONA_DSP2_RDMA_BUFFER_4 0x1223
1117 #define ARIZONA_DSP2_RDMA_BUFFER_5 0x1224
1118 #define ARIZONA_DSP2_RDMA_BUFFER_6 0x1225
1119 #define ARIZONA_DSP2_WDMA_CONFIG_1 0x1230
1120 #define ARIZONA_DSP2_WDMA_CONFIG_2 0x1231
1121 #define ARIZONA_DSP2_WDMA_OFFSET_1 0x1232
1122 #define ARIZONA_DSP2_RDMA_CONFIG_1 0x1234
1123 #define ARIZONA_DSP2_RDMA_OFFSET_1 0x1235
1124 #define ARIZONA_DSP2_EXTERNAL_START_SELECT_1 0x1238
1125 #define ARIZONA_DSP2_SCRATCH_0 0x1240
1126 #define ARIZONA_DSP2_SCRATCH_1 0x1241
1127 #define ARIZONA_DSP2_SCRATCH_2 0x1242
1128 #define ARIZONA_DSP2_SCRATCH_3 0x1243
1129 #define ARIZONA_DSP3_CONTROL_1 0x1300
1130 #define ARIZONA_DSP3_CLOCKING_1 0x1301
1131 #define ARIZONA_DSP3_STATUS_1 0x1304
1132 #define ARIZONA_DSP3_STATUS_2 0x1305
1133 #define ARIZONA_DSP3_STATUS_3 0x1306
1134 #define ARIZONA_DSP3_STATUS_4 0x1307
1135 #define ARIZONA_DSP3_WDMA_BUFFER_1 0x1310
1136 #define ARIZONA_DSP3_WDMA_BUFFER_2 0x1311
1137 #define ARIZONA_DSP3_WDMA_BUFFER_3 0x1312
1138 #define ARIZONA_DSP3_WDMA_BUFFER_4 0x1313
1139 #define ARIZONA_DSP3_WDMA_BUFFER_5 0x1314
1140 #define ARIZONA_DSP3_WDMA_BUFFER_6 0x1315
1141 #define ARIZONA_DSP3_WDMA_BUFFER_7 0x1316
1142 #define ARIZONA_DSP3_WDMA_BUFFER_8 0x1317
1143 #define ARIZONA_DSP3_RDMA_BUFFER_1 0x1320
1144 #define ARIZONA_DSP3_RDMA_BUFFER_2 0x1321
1145 #define ARIZONA_DSP3_RDMA_BUFFER_3 0x1322
1146 #define ARIZONA_DSP3_RDMA_BUFFER_4 0x1323
1147 #define ARIZONA_DSP3_RDMA_BUFFER_5 0x1324
1148 #define ARIZONA_DSP3_RDMA_BUFFER_6 0x1325
1149 #define ARIZONA_DSP3_WDMA_CONFIG_1 0x1330
1150 #define ARIZONA_DSP3_WDMA_CONFIG_2 0x1331
1151 #define ARIZONA_DSP3_WDMA_OFFSET_1 0x1332
1152 #define ARIZONA_DSP3_RDMA_CONFIG_1 0x1334
1153 #define ARIZONA_DSP3_RDMA_OFFSET_1 0x1335
1154 #define ARIZONA_DSP3_EXTERNAL_START_SELECT_1 0x1338
1155 #define ARIZONA_DSP3_SCRATCH_0 0x1340
1156 #define ARIZONA_DSP3_SCRATCH_1 0x1341
1157 #define ARIZONA_DSP3_SCRATCH_2 0x1342
1158 #define ARIZONA_DSP3_SCRATCH_3 0x1343
1159 #define ARIZONA_DSP4_CONTROL_1 0x1400
1160 #define ARIZONA_DSP4_CLOCKING_1 0x1401
1161 #define ARIZONA_DSP4_STATUS_1 0x1404
1162 #define ARIZONA_DSP4_STATUS_2 0x1405
1163 #define ARIZONA_DSP4_STATUS_3 0x1406
1164 #define ARIZONA_DSP4_STATUS_4 0x1407
1165 #define ARIZONA_DSP4_WDMA_BUFFER_1 0x1410
1166 #define ARIZONA_DSP4_WDMA_BUFFER_2 0x1411
1167 #define ARIZONA_DSP4_WDMA_BUFFER_3 0x1412
1168 #define ARIZONA_DSP4_WDMA_BUFFER_4 0x1413
1169 #define ARIZONA_DSP4_WDMA_BUFFER_5 0x1414
1170 #define ARIZONA_DSP4_WDMA_BUFFER_6 0x1415
1171 #define ARIZONA_DSP4_WDMA_BUFFER_7 0x1416
1172 #define ARIZONA_DSP4_WDMA_BUFFER_8 0x1417
1173 #define ARIZONA_DSP4_RDMA_BUFFER_1 0x1420
1174 #define ARIZONA_DSP4_RDMA_BUFFER_2 0x1421
1175 #define ARIZONA_DSP4_RDMA_BUFFER_3 0x1422
1176 #define ARIZONA_DSP4_RDMA_BUFFER_4 0x1423
1177 #define ARIZONA_DSP4_RDMA_BUFFER_5 0x1424
1178 #define ARIZONA_DSP4_RDMA_BUFFER_6 0x1425
1179 #define ARIZONA_DSP4_WDMA_CONFIG_1 0x1430
1180 #define ARIZONA_DSP4_WDMA_CONFIG_2 0x1431
1181 #define ARIZONA_DSP4_WDMA_OFFSET_1 0x1432
1182 #define ARIZONA_DSP4_RDMA_CONFIG_1 0x1434
1183 #define ARIZONA_DSP4_RDMA_OFFSET_1 0x1435
1184 #define ARIZONA_DSP4_EXTERNAL_START_SELECT_1 0x1438
1185 #define ARIZONA_DSP4_SCRATCH_0 0x1440
1186 #define ARIZONA_DSP4_SCRATCH_1 0x1441
1187 #define ARIZONA_DSP4_SCRATCH_2 0x1442
1188 #define ARIZONA_DSP4_SCRATCH_3 0x1443
1195 * R0 (0x00) - software reset
1197 #define ARIZONA_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
1198 #define ARIZONA_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
1199 #define ARIZONA_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1202 * R1 (0x01) - Device Revision
1204 #define ARIZONA_DEVICE_REVISION_MASK 0x00FF /* DEVICE_REVISION - [7:0] */
1205 #define ARIZONA_DEVICE_REVISION_SHIFT 0 /* DEVICE_REVISION - [7:0] */
1206 #define ARIZONA_DEVICE_REVISION_WIDTH 8 /* DEVICE_REVISION - [7:0] */
1209 * R8 (0x08) - Ctrl IF SPI CFG 1
1211 #define ARIZONA_SPI_CFG 0x0010 /* SPI_CFG */
1212 #define ARIZONA_SPI_CFG_MASK 0x0010 /* SPI_CFG */
1215 #define ARIZONA_SPI_4WIRE 0x0008 /* SPI_4WIRE */
1216 #define ARIZONA_SPI_4WIRE_MASK 0x0008 /* SPI_4WIRE */
1219 #define ARIZONA_SPI_AUTO_INC_MASK 0x0003 /* SPI_AUTO_INC - [1:0] */
1220 #define ARIZONA_SPI_AUTO_INC_SHIFT 0 /* SPI_AUTO_INC - [1:0] */
1221 #define ARIZONA_SPI_AUTO_INC_WIDTH 2 /* SPI_AUTO_INC - [1:0] */
1224 * R9 (0x09) - Ctrl IF I2C1 CFG 1
1226 #define ARIZONA_I2C1_AUTO_INC_MASK 0x0003 /* I2C1_AUTO_INC - [1:0] */
1227 #define ARIZONA_I2C1_AUTO_INC_SHIFT 0 /* I2C1_AUTO_INC - [1:0] */
1228 #define ARIZONA_I2C1_AUTO_INC_WIDTH 2 /* I2C1_AUTO_INC - [1:0] */
1231 * R13 (0x0D) - Ctrl IF Status 1
1233 #define ARIZONA_I2C1_BUSY 0x0020 /* I2C1_BUSY */
1234 #define ARIZONA_I2C1_BUSY_MASK 0x0020 /* I2C1_BUSY */
1237 #define ARIZONA_SPI_BUSY 0x0010 /* SPI_BUSY */
1238 #define ARIZONA_SPI_BUSY_MASK 0x0010 /* SPI_BUSY */
1243 * R22 (0x16) - Write Sequencer Ctrl 0
1245 #define ARIZONA_WSEQ_ABORT 0x0800 /* WSEQ_ABORT */
1246 #define ARIZONA_WSEQ_ABORT_MASK 0x0800 /* WSEQ_ABORT */
1249 #define ARIZONA_WSEQ_START 0x0400 /* WSEQ_START */
1250 #define ARIZONA_WSEQ_START_MASK 0x0400 /* WSEQ_START */
1253 #define ARIZONA_WSEQ_ENA 0x0200 /* WSEQ_ENA */
1254 #define ARIZONA_WSEQ_ENA_MASK 0x0200 /* WSEQ_ENA */
1257 #define ARIZONA_WSEQ_START_INDEX_MASK 0x01FF /* WSEQ_START_INDEX - [8:0] */
1258 #define ARIZONA_WSEQ_START_INDEX_SHIFT 0 /* WSEQ_START_INDEX - [8:0] */
1259 #define ARIZONA_WSEQ_START_INDEX_WIDTH 9 /* WSEQ_START_INDEX - [8:0] */
1262 * R23 (0x17) - Write Sequencer Ctrl 1
1264 #define ARIZONA_WSEQ_BUSY 0x0200 /* WSEQ_BUSY */
1265 #define ARIZONA_WSEQ_BUSY_MASK 0x0200 /* WSEQ_BUSY */
1268 #define ARIZONA_WSEQ_CURRENT_INDEX_MASK 0x01FF /* WSEQ_CURRENT_INDEX - [8:0] */
1269 #define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT 0 /* WSEQ_CURRENT_INDEX - [8:0] */
1270 #define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH 9 /* WSEQ_CURRENT_INDEX - [8:0] */
1273 * R24 (0x18) - Write Sequencer Ctrl 2
1275 #define ARIZONA_LOAD_DEFAULTS 0x0002 /* LOAD_DEFAULTS */
1276 #define ARIZONA_LOAD_DEFAULTS_MASK 0x0002 /* LOAD_DEFAULTS */
1279 #define ARIZONA_WSEQ_LOAD_MEM 0x0001 /* WSEQ_LOAD_MEM */
1280 #define ARIZONA_WSEQ_LOAD_MEM_MASK 0x0001 /* WSEQ_LOAD_MEM */
1281 #define ARIZONA_WSEQ_LOAD_MEM_SHIFT 0 /* WSEQ_LOAD_MEM */
1285 * R26 (0x1A) - Write Sequencer PROM
1287 #define ARIZONA_WSEQ_OTP_WRITE 0x0001 /* WSEQ_OTP_WRITE */
1288 #define ARIZONA_WSEQ_OTP_WRITE_MASK 0x0001 /* WSEQ_OTP_WRITE */
1289 #define ARIZONA_WSEQ_OTP_WRITE_SHIFT 0 /* WSEQ_OTP_WRITE */
1293 * R32 (0x20) - Tone Generator 1
1295 #define ARIZONA_TONE_RATE_MASK 0x7800 /* TONE_RATE - [14:11] */
1298 #define ARIZONA_TONE_OFFSET_MASK 0x0300 /* TONE_OFFSET - [9:8] */
1301 #define ARIZONA_TONE2_OVD 0x0020 /* TONE2_OVD */
1302 #define ARIZONA_TONE2_OVD_MASK 0x0020 /* TONE2_OVD */
1305 #define ARIZONA_TONE1_OVD 0x0010 /* TONE1_OVD */
1306 #define ARIZONA_TONE1_OVD_MASK 0x0010 /* TONE1_OVD */
1309 #define ARIZONA_TONE2_ENA 0x0002 /* TONE2_ENA */
1310 #define ARIZONA_TONE2_ENA_MASK 0x0002 /* TONE2_ENA */
1313 #define ARIZONA_TONE1_ENA 0x0001 /* TONE1_ENA */
1314 #define ARIZONA_TONE1_ENA_MASK 0x0001 /* TONE1_ENA */
1315 #define ARIZONA_TONE1_ENA_SHIFT 0 /* TONE1_ENA */
1319 * R33 (0x21) - Tone Generator 2
1321 #define ARIZONA_TONE1_LVL_0_MASK 0xFFFF /* TONE1_LVL - [15:0] */
1322 #define ARIZONA_TONE1_LVL_0_SHIFT 0 /* TONE1_LVL - [15:0] */
1323 #define ARIZONA_TONE1_LVL_0_WIDTH 16 /* TONE1_LVL - [15:0] */
1326 * R34 (0x22) - Tone Generator 3
1328 #define ARIZONA_TONE1_LVL_MASK 0x00FF /* TONE1_LVL - [7:0] */
1329 #define ARIZONA_TONE1_LVL_SHIFT 0 /* TONE1_LVL - [7:0] */
1330 #define ARIZONA_TONE1_LVL_WIDTH 8 /* TONE1_LVL - [7:0] */
1333 * R35 (0x23) - Tone Generator 4
1335 #define ARIZONA_TONE2_LVL_0_MASK 0xFFFF /* TONE2_LVL - [15:0] */
1336 #define ARIZONA_TONE2_LVL_0_SHIFT 0 /* TONE2_LVL - [15:0] */
1337 #define ARIZONA_TONE2_LVL_0_WIDTH 16 /* TONE2_LVL - [15:0] */
1340 * R36 (0x24) - Tone Generator 5
1342 #define ARIZONA_TONE2_LVL_MASK 0x00FF /* TONE2_LVL - [7:0] */
1343 #define ARIZONA_TONE2_LVL_SHIFT 0 /* TONE2_LVL - [7:0] */
1344 #define ARIZONA_TONE2_LVL_WIDTH 8 /* TONE2_LVL - [7:0] */
1347 * R48 (0x30) - PWM Drive 1
1349 #define ARIZONA_PWM_RATE_MASK 0x7800 /* PWM_RATE - [14:11] */
1352 #define ARIZONA_PWM_CLK_SEL_MASK 0x0700 /* PWM_CLK_SEL - [10:8] */
1355 #define ARIZONA_PWM2_OVD 0x0020 /* PWM2_OVD */
1356 #define ARIZONA_PWM2_OVD_MASK 0x0020 /* PWM2_OVD */
1359 #define ARIZONA_PWM1_OVD 0x0010 /* PWM1_OVD */
1360 #define ARIZONA_PWM1_OVD_MASK 0x0010 /* PWM1_OVD */
1363 #define ARIZONA_PWM2_ENA 0x0002 /* PWM2_ENA */
1364 #define ARIZONA_PWM2_ENA_MASK 0x0002 /* PWM2_ENA */
1367 #define ARIZONA_PWM1_ENA 0x0001 /* PWM1_ENA */
1368 #define ARIZONA_PWM1_ENA_MASK 0x0001 /* PWM1_ENA */
1369 #define ARIZONA_PWM1_ENA_SHIFT 0 /* PWM1_ENA */
1373 * R49 (0x31) - PWM Drive 2
1375 #define ARIZONA_PWM1_LVL_MASK 0x03FF /* PWM1_LVL - [9:0] */
1376 #define ARIZONA_PWM1_LVL_SHIFT 0 /* PWM1_LVL - [9:0] */
1377 #define ARIZONA_PWM1_LVL_WIDTH 10 /* PWM1_LVL - [9:0] */
1380 * R50 (0x32) - PWM Drive 3
1382 #define ARIZONA_PWM2_LVL_MASK 0x03FF /* PWM2_LVL - [9:0] */
1383 #define ARIZONA_PWM2_LVL_SHIFT 0 /* PWM2_LVL - [9:0] */
1384 #define ARIZONA_PWM2_LVL_WIDTH 10 /* PWM2_LVL - [9:0] */
1387 * R64 (0x40) - Wake control
1389 #define ARIZONA_WKUP_MICD_CLAMP_FALL 0x0080 /* WKUP_MICD_CLAMP_FALL */
1390 #define ARIZONA_WKUP_MICD_CLAMP_FALL_MASK 0x0080 /* WKUP_MICD_CLAMP_FALL */
1393 #define ARIZONA_WKUP_MICD_CLAMP_RISE 0x0040 /* WKUP_MICD_CLAMP_RISE */
1394 #define ARIZONA_WKUP_MICD_CLAMP_RISE_MASK 0x0040 /* WKUP_MICD_CLAMP_RISE */
1397 #define ARIZONA_WKUP_GP5_FALL 0x0020 /* WKUP_GP5_FALL */
1398 #define ARIZONA_WKUP_GP5_FALL_MASK 0x0020 /* WKUP_GP5_FALL */
1401 #define ARIZONA_WKUP_GP5_RISE 0x0010 /* WKUP_GP5_RISE */
1402 #define ARIZONA_WKUP_GP5_RISE_MASK 0x0010 /* WKUP_GP5_RISE */
1405 #define ARIZONA_WKUP_JD1_FALL 0x0008 /* WKUP_JD1_FALL */
1406 #define ARIZONA_WKUP_JD1_FALL_MASK 0x0008 /* WKUP_JD1_FALL */
1409 #define ARIZONA_WKUP_JD1_RISE 0x0004 /* WKUP_JD1_RISE */
1410 #define ARIZONA_WKUP_JD1_RISE_MASK 0x0004 /* WKUP_JD1_RISE */
1413 #define ARIZONA_WKUP_JD2_FALL 0x0002 /* WKUP_JD2_FALL */
1414 #define ARIZONA_WKUP_JD2_FALL_MASK 0x0002 /* WKUP_JD2_FALL */
1417 #define ARIZONA_WKUP_JD2_RISE 0x0001 /* WKUP_JD2_RISE */
1418 #define ARIZONA_WKUP_JD2_RISE_MASK 0x0001 /* WKUP_JD2_RISE */
1419 #define ARIZONA_WKUP_JD2_RISE_SHIFT 0 /* WKUP_JD2_RISE */
1423 * R65 (0x41) - Sequence control
1425 #define ARIZONA_WSEQ_ENA_GP5_FALL 0x0020 /* WSEQ_ENA_GP5_FALL */
1426 #define ARIZONA_WSEQ_ENA_GP5_FALL_MASK 0x0020 /* WSEQ_ENA_GP5_FALL */
1429 #define ARIZONA_WSEQ_ENA_GP5_RISE 0x0010 /* WSEQ_ENA_GP5_RISE */
1430 #define ARIZONA_WSEQ_ENA_GP5_RISE_MASK 0x0010 /* WSEQ_ENA_GP5_RISE */
1433 #define ARIZONA_WSEQ_ENA_JD1_FALL 0x0008 /* WSEQ_ENA_JD1_FALL */
1434 #define ARIZONA_WSEQ_ENA_JD1_FALL_MASK 0x0008 /* WSEQ_ENA_JD1_FALL */
1437 #define ARIZONA_WSEQ_ENA_JD1_RISE 0x0004 /* WSEQ_ENA_JD1_RISE */
1438 #define ARIZONA_WSEQ_ENA_JD1_RISE_MASK 0x0004 /* WSEQ_ENA_JD1_RISE */
1441 #define ARIZONA_WSEQ_ENA_JD2_FALL 0x0002 /* WSEQ_ENA_JD2_FALL */
1442 #define ARIZONA_WSEQ_ENA_JD2_FALL_MASK 0x0002 /* WSEQ_ENA_JD2_FALL */
1445 #define ARIZONA_WSEQ_ENA_JD2_RISE 0x0001 /* WSEQ_ENA_JD2_RISE */
1446 #define ARIZONA_WSEQ_ENA_JD2_RISE_MASK 0x0001 /* WSEQ_ENA_JD2_RISE */
1447 #define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT 0 /* WSEQ_ENA_JD2_RISE */
1451 * R66 (0x42) - Spare Triggers
1453 #define ARIZONA_WS_TRG8 0x0080 /* WS_TRG8 */
1454 #define ARIZONA_WS_TRG8_MASK 0x0080 /* WS_TRG8 */
1457 #define ARIZONA_WS_TRG7 0x0040 /* WS_TRG7 */
1458 #define ARIZONA_WS_TRG7_MASK 0x0040 /* WS_TRG7 */
1461 #define ARIZONA_WS_TRG6 0x0020 /* WS_TRG6 */
1462 #define ARIZONA_WS_TRG6_MASK 0x0020 /* WS_TRG6 */
1465 #define ARIZONA_WS_TRG5 0x0010 /* WS_TRG5 */
1466 #define ARIZONA_WS_TRG5_MASK 0x0010 /* WS_TRG5 */
1469 #define ARIZONA_WS_TRG4 0x0008 /* WS_TRG4 */
1470 #define ARIZONA_WS_TRG4_MASK 0x0008 /* WS_TRG4 */
1473 #define ARIZONA_WS_TRG3 0x0004 /* WS_TRG3 */
1474 #define ARIZONA_WS_TRG3_MASK 0x0004 /* WS_TRG3 */
1477 #define ARIZONA_WS_TRG2 0x0002 /* WS_TRG2 */
1478 #define ARIZONA_WS_TRG2_MASK 0x0002 /* WS_TRG2 */
1481 #define ARIZONA_WS_TRG1 0x0001 /* WS_TRG1 */
1482 #define ARIZONA_WS_TRG1_MASK 0x0001 /* WS_TRG1 */
1483 #define ARIZONA_WS_TRG1_SHIFT 0 /* WS_TRG1 */
1487 * R97 (0x61) - Sample Rate Sequence Select 1
1489 …e ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - …
1490 …RIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8…
1491 …A_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1494 * R98 (0x62) - Sample Rate Sequence Select 2
1496 …e ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - …
1497 …RIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8…
1498 …A_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1501 * R99 (0x63) - Sample Rate Sequence Select 3
1503 …e ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - …
1504 …RIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8…
1505 …A_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1508 * R100 (0x64) - Sample Rate Sequence Select 4
1510 …e ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - …
1511 …RIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8…
1512 …A_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1515 * R104 (0x68) - Always On Triggers Sequence Select 1
1517 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1518 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1519 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1522 * R105 (0x69) - Always On Triggers Sequence Select 2
1524 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1525 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1526 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1529 * R106 (0x6A) - Always On Triggers Sequence Select 3
1531 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1532 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1533 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1536 * R107 (0x6B) - Always On Triggers Sequence Select 4
1538 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1539 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1540 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1543 * R108 (0x6C) - Always On Triggers Sequence Select 5
1545 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1546 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1547 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1550 * R109 (0x6D) - Always On Triggers Sequence Select 6
1552 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1553 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1554 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1557 * R112 (0x70) - Comfort Noise Generator
1559 #define ARIZONA_NOISE_GEN_RATE_MASK 0x7800 /* NOISE_GEN_RATE - [14:11] */
1562 #define ARIZONA_NOISE_GEN_ENA 0x0020 /* NOISE_GEN_ENA */
1563 #define ARIZONA_NOISE_GEN_ENA_MASK 0x0020 /* NOISE_GEN_ENA */
1566 #define ARIZONA_NOISE_GEN_GAIN_MASK 0x001F /* NOISE_GEN_GAIN - [4:0] */
1567 #define ARIZONA_NOISE_GEN_GAIN_SHIFT 0 /* NOISE_GEN_GAIN - [4:0] */
1568 #define ARIZONA_NOISE_GEN_GAIN_WIDTH 5 /* NOISE_GEN_GAIN - [4:0] */
1571 * R144 (0x90) - Haptics Control 1
1573 #define ARIZONA_HAP_RATE_MASK 0x7800 /* HAP_RATE - [14:11] */
1576 #define ARIZONA_ONESHOT_TRIG 0x0010 /* ONESHOT_TRIG */
1577 #define ARIZONA_ONESHOT_TRIG_MASK 0x0010 /* ONESHOT_TRIG */
1580 #define ARIZONA_HAP_CTRL_MASK 0x000C /* HAP_CTRL - [3:2] */
1583 #define ARIZONA_HAP_ACT 0x0002 /* HAP_ACT */
1584 #define ARIZONA_HAP_ACT_MASK 0x0002 /* HAP_ACT */
1589 * R145 (0x91) - Haptics Control 2
1591 #define ARIZONA_LRA_FREQ_MASK 0x7FFF /* LRA_FREQ - [14:0] */
1592 #define ARIZONA_LRA_FREQ_SHIFT 0 /* LRA_FREQ - [14:0] */
1593 #define ARIZONA_LRA_FREQ_WIDTH 15 /* LRA_FREQ - [14:0] */
1596 * R146 (0x92) - Haptics phase 1 intensity
1598 #define ARIZONA_PHASE1_INTENSITY_MASK 0x00FF /* PHASE1_INTENSITY - [7:0] */
1599 #define ARIZONA_PHASE1_INTENSITY_SHIFT 0 /* PHASE1_INTENSITY - [7:0] */
1600 #define ARIZONA_PHASE1_INTENSITY_WIDTH 8 /* PHASE1_INTENSITY - [7:0] */
1603 * R147 (0x93) - Haptics phase 1 duration
1605 #define ARIZONA_PHASE1_DURATION_MASK 0x01FF /* PHASE1_DURATION - [8:0] */
1606 #define ARIZONA_PHASE1_DURATION_SHIFT 0 /* PHASE1_DURATION - [8:0] */
1607 #define ARIZONA_PHASE1_DURATION_WIDTH 9 /* PHASE1_DURATION - [8:0] */
1610 * R148 (0x94) - Haptics phase 2 intensity
1612 #define ARIZONA_PHASE2_INTENSITY_MASK 0x00FF /* PHASE2_INTENSITY - [7:0] */
1613 #define ARIZONA_PHASE2_INTENSITY_SHIFT 0 /* PHASE2_INTENSITY - [7:0] */
1614 #define ARIZONA_PHASE2_INTENSITY_WIDTH 8 /* PHASE2_INTENSITY - [7:0] */
1617 * R149 (0x95) - Haptics phase 2 duration
1619 #define ARIZONA_PHASE2_DURATION_MASK 0x07FF /* PHASE2_DURATION - [10:0] */
1620 #define ARIZONA_PHASE2_DURATION_SHIFT 0 /* PHASE2_DURATION - [10:0] */
1621 #define ARIZONA_PHASE2_DURATION_WIDTH 11 /* PHASE2_DURATION - [10:0] */
1624 * R150 (0x96) - Haptics phase 3 intensity
1626 #define ARIZONA_PHASE3_INTENSITY_MASK 0x00FF /* PHASE3_INTENSITY - [7:0] */
1627 #define ARIZONA_PHASE3_INTENSITY_SHIFT 0 /* PHASE3_INTENSITY - [7:0] */
1628 #define ARIZONA_PHASE3_INTENSITY_WIDTH 8 /* PHASE3_INTENSITY - [7:0] */
1631 * R151 (0x97) - Haptics phase 3 duration
1633 #define ARIZONA_PHASE3_DURATION_MASK 0x01FF /* PHASE3_DURATION - [8:0] */
1634 #define ARIZONA_PHASE3_DURATION_SHIFT 0 /* PHASE3_DURATION - [8:0] */
1635 #define ARIZONA_PHASE3_DURATION_WIDTH 9 /* PHASE3_DURATION - [8:0] */
1638 * R152 (0x98) - Haptics Status
1640 #define ARIZONA_ONESHOT_STS 0x0001 /* ONESHOT_STS */
1641 #define ARIZONA_ONESHOT_STS_MASK 0x0001 /* ONESHOT_STS */
1642 #define ARIZONA_ONESHOT_STS_SHIFT 0 /* ONESHOT_STS */
1646 * R256 (0x100) - Clock 32k 1
1648 #define ARIZONA_CLK_32K_ENA 0x0040 /* CLK_32K_ENA */
1649 #define ARIZONA_CLK_32K_ENA_MASK 0x0040 /* CLK_32K_ENA */
1652 #define ARIZONA_CLK_32K_SRC_MASK 0x0003 /* CLK_32K_SRC - [1:0] */
1653 #define ARIZONA_CLK_32K_SRC_SHIFT 0 /* CLK_32K_SRC - [1:0] */
1654 #define ARIZONA_CLK_32K_SRC_WIDTH 2 /* CLK_32K_SRC - [1:0] */
1657 * R257 (0x101) - System Clock 1
1659 #define ARIZONA_SYSCLK_FRAC 0x8000 /* SYSCLK_FRAC */
1660 #define ARIZONA_SYSCLK_FRAC_MASK 0x8000 /* SYSCLK_FRAC */
1663 #define ARIZONA_SYSCLK_FREQ_MASK 0x0700 /* SYSCLK_FREQ - [10:8] */
1666 #define ARIZONA_SYSCLK_ENA 0x0040 /* SYSCLK_ENA */
1667 #define ARIZONA_SYSCLK_ENA_MASK 0x0040 /* SYSCLK_ENA */
1670 #define ARIZONA_SYSCLK_SRC_MASK 0x000F /* SYSCLK_SRC - [3:0] */
1671 #define ARIZONA_SYSCLK_SRC_SHIFT 0 /* SYSCLK_SRC - [3:0] */
1672 #define ARIZONA_SYSCLK_SRC_WIDTH 4 /* SYSCLK_SRC - [3:0] */
1675 * R258 (0x102) - Sample rate 1
1677 #define ARIZONA_SAMPLE_RATE_1_MASK 0x001F /* SAMPLE_RATE_1 - [4:0] */
1678 #define ARIZONA_SAMPLE_RATE_1_SHIFT 0 /* SAMPLE_RATE_1 - [4:0] */
1679 #define ARIZONA_SAMPLE_RATE_1_WIDTH 5 /* SAMPLE_RATE_1 - [4:0] */
1682 * R259 (0x103) - Sample rate 2
1684 #define ARIZONA_SAMPLE_RATE_2_MASK 0x001F /* SAMPLE_RATE_2 - [4:0] */
1685 #define ARIZONA_SAMPLE_RATE_2_SHIFT 0 /* SAMPLE_RATE_2 - [4:0] */
1686 #define ARIZONA_SAMPLE_RATE_2_WIDTH 5 /* SAMPLE_RATE_2 - [4:0] */
1689 * R260 (0x104) - Sample rate 3
1691 #define ARIZONA_SAMPLE_RATE_3_MASK 0x001F /* SAMPLE_RATE_3 - [4:0] */
1692 #define ARIZONA_SAMPLE_RATE_3_SHIFT 0 /* SAMPLE_RATE_3 - [4:0] */
1693 #define ARIZONA_SAMPLE_RATE_3_WIDTH 5 /* SAMPLE_RATE_3 - [4:0] */
1696 * R266 (0x10A) - Sample rate 1 status
1698 #define ARIZONA_SAMPLE_RATE_1_STS_MASK 0x001F /* SAMPLE_RATE_1_STS - [4:0] */
1699 #define ARIZONA_SAMPLE_RATE_1_STS_SHIFT 0 /* SAMPLE_RATE_1_STS - [4:0] */
1700 #define ARIZONA_SAMPLE_RATE_1_STS_WIDTH 5 /* SAMPLE_RATE_1_STS - [4:0] */
1703 * R267 (0x10B) - Sample rate 2 status
1705 #define ARIZONA_SAMPLE_RATE_2_STS_MASK 0x001F /* SAMPLE_RATE_2_STS - [4:0] */
1706 #define ARIZONA_SAMPLE_RATE_2_STS_SHIFT 0 /* SAMPLE_RATE_2_STS - [4:0] */
1707 #define ARIZONA_SAMPLE_RATE_2_STS_WIDTH 5 /* SAMPLE_RATE_2_STS - [4:0] */
1710 * R268 (0x10C) - Sample rate 3 status
1712 #define ARIZONA_SAMPLE_RATE_3_STS_MASK 0x001F /* SAMPLE_RATE_3_STS - [4:0] */
1713 #define ARIZONA_SAMPLE_RATE_3_STS_SHIFT 0 /* SAMPLE_RATE_3_STS - [4:0] */
1714 #define ARIZONA_SAMPLE_RATE_3_STS_WIDTH 5 /* SAMPLE_RATE_3_STS - [4:0] */
1717 * R274 (0x112) - Async clock 1
1719 #define ARIZONA_ASYNC_CLK_FREQ_MASK 0x0700 /* ASYNC_CLK_FREQ - [10:8] */
1722 #define ARIZONA_ASYNC_CLK_ENA 0x0040 /* ASYNC_CLK_ENA */
1723 #define ARIZONA_ASYNC_CLK_ENA_MASK 0x0040 /* ASYNC_CLK_ENA */
1726 #define ARIZONA_ASYNC_CLK_SRC_MASK 0x000F /* ASYNC_CLK_SRC - [3:0] */
1727 #define ARIZONA_ASYNC_CLK_SRC_SHIFT 0 /* ASYNC_CLK_SRC - [3:0] */
1728 #define ARIZONA_ASYNC_CLK_SRC_WIDTH 4 /* ASYNC_CLK_SRC - [3:0] */
1731 * R275 (0x113) - Async sample rate 1
1733 #define ARIZONA_ASYNC_SAMPLE_RATE_1_MASK 0x001F /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1734 #define ARIZONA_ASYNC_SAMPLE_RATE_1_SHIFT 0 /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1735 #define ARIZONA_ASYNC_SAMPLE_RATE_1_WIDTH 5 /* ASYNC_SAMPLE_RATE_1 - [4:0] */
1738 * R276 (0x114) - Async sample rate 2
1740 #define ARIZONA_ASYNC_SAMPLE_RATE_2_MASK 0x001F /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1741 #define ARIZONA_ASYNC_SAMPLE_RATE_2_SHIFT 0 /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1742 #define ARIZONA_ASYNC_SAMPLE_RATE_2_WIDTH 5 /* ASYNC_SAMPLE_RATE_2 - [4:0] */
1745 * R283 (0x11B) - Async sample rate 1 status
1747 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1748 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1749 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_1_STS - [4:0] */
1752 * R284 (0x11C) - Async sample rate 2 status
1754 #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1755 #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1756 #define ARIZONA_ASYNC_SAMPLE_RATE_2_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_2_STS - [4:0] */
1759 * R329 (0x149) - Output system clock
1761 #define ARIZONA_OPCLK_ENA 0x8000 /* OPCLK_ENA */
1762 #define ARIZONA_OPCLK_ENA_MASK 0x8000 /* OPCLK_ENA */
1765 #define ARIZONA_OPCLK_DIV_MASK 0x00F8 /* OPCLK_DIV - [7:3] */
1768 #define ARIZONA_OPCLK_SEL_MASK 0x0007 /* OPCLK_SEL - [2:0] */
1769 #define ARIZONA_OPCLK_SEL_SHIFT 0 /* OPCLK_SEL - [2:0] */
1770 #define ARIZONA_OPCLK_SEL_WIDTH 3 /* OPCLK_SEL - [2:0] */
1773 * R330 (0x14A) - Output async clock
1775 #define ARIZONA_OPCLK_ASYNC_ENA 0x8000 /* OPCLK_ASYNC_ENA */
1776 #define ARIZONA_OPCLK_ASYNC_ENA_MASK 0x8000 /* OPCLK_ASYNC_ENA */
1779 #define ARIZONA_OPCLK_ASYNC_DIV_MASK 0x00F8 /* OPCLK_ASYNC_DIV - [7:3] */
1782 #define ARIZONA_OPCLK_ASYNC_SEL_MASK 0x0007 /* OPCLK_ASYNC_SEL - [2:0] */
1783 #define ARIZONA_OPCLK_ASYNC_SEL_SHIFT 0 /* OPCLK_ASYNC_SEL - [2:0] */
1784 #define ARIZONA_OPCLK_ASYNC_SEL_WIDTH 3 /* OPCLK_ASYNC_SEL - [2:0] */
1787 * R338 (0x152) - Rate Estimator 1
1789 #define ARIZONA_TRIG_ON_STARTUP 0x0010 /* TRIG_ON_STARTUP */
1790 #define ARIZONA_TRIG_ON_STARTUP_MASK 0x0010 /* TRIG_ON_STARTUP */
1793 #define ARIZONA_LRCLK_SRC_MASK 0x000E /* LRCLK_SRC - [3:1] */
1796 #define ARIZONA_RATE_EST_ENA 0x0001 /* RATE_EST_ENA */
1797 #define ARIZONA_RATE_EST_ENA_MASK 0x0001 /* RATE_EST_ENA */
1798 #define ARIZONA_RATE_EST_ENA_SHIFT 0 /* RATE_EST_ENA */
1802 * R339 (0x153) - Rate Estimator 2
1804 #define ARIZONA_SAMPLE_RATE_DETECT_A_MASK 0x001F /* SAMPLE_RATE_DETECT_A - [4:0] */
1805 #define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT 0 /* SAMPLE_RATE_DETECT_A - [4:0] */
1806 #define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH 5 /* SAMPLE_RATE_DETECT_A - [4:0] */
1809 * R340 (0x154) - Rate Estimator 3
1811 #define ARIZONA_SAMPLE_RATE_DETECT_B_MASK 0x001F /* SAMPLE_RATE_DETECT_B - [4:0] */
1812 #define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT 0 /* SAMPLE_RATE_DETECT_B - [4:0] */
1813 #define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH 5 /* SAMPLE_RATE_DETECT_B - [4:0] */
1816 * R341 (0x155) - Rate Estimator 4
1818 #define ARIZONA_SAMPLE_RATE_DETECT_C_MASK 0x001F /* SAMPLE_RATE_DETECT_C - [4:0] */
1819 #define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT 0 /* SAMPLE_RATE_DETECT_C - [4:0] */
1820 #define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH 5 /* SAMPLE_RATE_DETECT_C - [4:0] */
1823 * R342 (0x156) - Rate Estimator 5
1825 #define ARIZONA_SAMPLE_RATE_DETECT_D_MASK 0x001F /* SAMPLE_RATE_DETECT_D - [4:0] */
1826 #define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT 0 /* SAMPLE_RATE_DETECT_D - [4:0] */
1827 #define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH 5 /* SAMPLE_RATE_DETECT_D - [4:0] */
1830 * R353 (0x161) - Dynamic Frequency Scaling 1
1832 #define ARIZONA_SUBSYS_MAX_FREQ 0x0001 /* SUBSYS_MAX_FREQ */
1833 #define ARIZONA_SUBSYS_MAX_FREQ_SHIFT 0 /* SUBSYS_MAX_FREQ */
1837 * R369 (0x171) - FLL1 Control 1
1839 #define ARIZONA_FLL1_FREERUN 0x0002 /* FLL1_FREERUN */
1840 #define ARIZONA_FLL1_FREERUN_MASK 0x0002 /* FLL1_FREERUN */
1843 #define ARIZONA_FLL1_ENA 0x0001 /* FLL1_ENA */
1844 #define ARIZONA_FLL1_ENA_MASK 0x0001 /* FLL1_ENA */
1845 #define ARIZONA_FLL1_ENA_SHIFT 0 /* FLL1_ENA */
1849 * R370 (0x172) - FLL1 Control 2
1851 #define ARIZONA_FLL1_CTRL_UPD 0x8000 /* FLL1_CTRL_UPD */
1852 #define ARIZONA_FLL1_CTRL_UPD_MASK 0x8000 /* FLL1_CTRL_UPD */
1855 #define ARIZONA_FLL1_N_MASK 0x03FF /* FLL1_N - [9:0] */
1856 #define ARIZONA_FLL1_N_SHIFT 0 /* FLL1_N - [9:0] */
1857 #define ARIZONA_FLL1_N_WIDTH 10 /* FLL1_N - [9:0] */
1860 * R371 (0x173) - FLL1 Control 3
1862 #define ARIZONA_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1863 #define ARIZONA_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1864 #define ARIZONA_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1867 * R372 (0x174) - FLL1 Control 4
1869 #define ARIZONA_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1870 #define ARIZONA_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
1871 #define ARIZONA_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */
1874 * R373 (0x175) - FLL1 Control 5
1876 #define ARIZONA_FLL1_FRATIO_MASK 0x0F00 /* FLL1_FRATIO - [11:8] */
1879 #define ARIZONA_FLL1_OUTDIV_MASK 0x000E /* FLL1_OUTDIV - [3:1] */
1884 * R374 (0x176) - FLL1 Control 6
1886 #define ARIZONA_FLL1_CLK_REF_DIV_MASK 0x00C0 /* FLL1_CLK_REF_DIV - [7:6] */
1889 #define ARIZONA_FLL1_CLK_REF_SRC_MASK 0x000F /* FLL1_CLK_REF_SRC - [3:0] */
1890 #define ARIZONA_FLL1_CLK_REF_SRC_SHIFT 0 /* FLL1_CLK_REF_SRC - [3:0] */
1891 #define ARIZONA_FLL1_CLK_REF_SRC_WIDTH 4 /* FLL1_CLK_REF_SRC - [3:0] */
1894 * R375 (0x177) - FLL1 Loop Filter Test 1
1896 #define ARIZONA_FLL1_FRC_INTEG_UPD 0x8000 /* FLL1_FRC_INTEG_UPD */
1897 #define ARIZONA_FLL1_FRC_INTEG_UPD_MASK 0x8000 /* FLL1_FRC_INTEG_UPD */
1900 #define ARIZONA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF /* FLL1_FRC_INTEG_VAL - [11:0] */
1901 #define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT 0 /* FLL1_FRC_INTEG_VAL - [11:0] */
1902 #define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH 12 /* FLL1_FRC_INTEG_VAL - [11:0] */
1905 * R377 (0x179) - FLL1 Control 7
1907 #define ARIZONA_FLL1_GAIN_MASK 0x003c /* FLL1_GAIN */
1912 * R385 (0x181) - FLL1 Synchroniser 1
1914 #define ARIZONA_FLL1_SYNC_ENA 0x0001 /* FLL1_SYNC_ENA */
1915 #define ARIZONA_FLL1_SYNC_ENA_MASK 0x0001 /* FLL1_SYNC_ENA */
1916 #define ARIZONA_FLL1_SYNC_ENA_SHIFT 0 /* FLL1_SYNC_ENA */
1920 * R386 (0x182) - FLL1 Synchroniser 2
1922 #define ARIZONA_FLL1_SYNC_N_MASK 0x03FF /* FLL1_SYNC_N - [9:0] */
1923 #define ARIZONA_FLL1_SYNC_N_SHIFT 0 /* FLL1_SYNC_N - [9:0] */
1924 #define ARIZONA_FLL1_SYNC_N_WIDTH 10 /* FLL1_SYNC_N - [9:0] */
1927 * R387 (0x183) - FLL1 Synchroniser 3
1929 #define ARIZONA_FLL1_SYNC_THETA_MASK 0xFFFF /* FLL1_SYNC_THETA - [15:0] */
1930 #define ARIZONA_FLL1_SYNC_THETA_SHIFT 0 /* FLL1_SYNC_THETA - [15:0] */
1931 #define ARIZONA_FLL1_SYNC_THETA_WIDTH 16 /* FLL1_SYNC_THETA - [15:0] */
1934 * R388 (0x184) - FLL1 Synchroniser 4
1936 #define ARIZONA_FLL1_SYNC_LAMBDA_MASK 0xFFFF /* FLL1_SYNC_LAMBDA - [15:0] */
1937 #define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT 0 /* FLL1_SYNC_LAMBDA - [15:0] */
1938 #define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH 16 /* FLL1_SYNC_LAMBDA - [15:0] */
1941 * R389 (0x185) - FLL1 Synchroniser 5
1943 #define ARIZONA_FLL1_SYNC_FRATIO_MASK 0x0700 /* FLL1_SYNC_FRATIO - [10:8] */
1948 * R390 (0x186) - FLL1 Synchroniser 6
1950 #define ARIZONA_FLL1_CLK_SYNC_DIV_MASK 0x00C0 /* FLL1_CLK_SYNC_DIV - [7:6] */
1953 #define ARIZONA_FLL1_CLK_SYNC_SRC_MASK 0x000F /* FLL1_CLK_SYNC_SRC - [3:0] */
1954 #define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT 0 /* FLL1_CLK_SYNC_SRC - [3:0] */
1955 #define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH 4 /* FLL1_CLK_SYNC_SRC - [3:0] */
1958 * R391 (0x187) - FLL1 Synchroniser 7
1960 #define ARIZONA_FLL1_SYNC_GAIN_MASK 0x003c /* FLL1_SYNC_GAIN */
1963 #define ARIZONA_FLL1_SYNC_BW 0x0001 /* FLL1_SYNC_BW */
1964 #define ARIZONA_FLL1_SYNC_BW_MASK 0x0001 /* FLL1_SYNC_BW */
1965 #define ARIZONA_FLL1_SYNC_BW_SHIFT 0 /* FLL1_SYNC_BW */
1969 * R393 (0x189) - FLL1 Spread Spectrum
1971 #define ARIZONA_FLL1_SS_AMPL_MASK 0x0030 /* FLL1_SS_AMPL - [5:4] */
1974 #define ARIZONA_FLL1_SS_FREQ_MASK 0x000C /* FLL1_SS_FREQ - [3:2] */
1977 #define ARIZONA_FLL1_SS_SEL_MASK 0x0003 /* FLL1_SS_SEL - [1:0] */
1978 #define ARIZONA_FLL1_SS_SEL_SHIFT 0 /* FLL1_SS_SEL - [1:0] */
1979 #define ARIZONA_FLL1_SS_SEL_WIDTH 2 /* FLL1_SS_SEL - [1:0] */
1982 * R394 (0x18A) - FLL1 GPIO Clock
1984 #define ARIZONA_FLL1_GPDIV_MASK 0x00FE /* FLL1_GPDIV - [7:1] */
1987 #define ARIZONA_FLL1_GPDIV_ENA 0x0001 /* FLL1_GPDIV_ENA */
1988 #define ARIZONA_FLL1_GPDIV_ENA_MASK 0x0001 /* FLL1_GPDIV_ENA */
1989 #define ARIZONA_FLL1_GPDIV_ENA_SHIFT 0 /* FLL1_GPDIV_ENA */
1993 * R401 (0x191) - FLL2 Control 1
1995 #define ARIZONA_FLL2_FREERUN 0x0002 /* FLL2_FREERUN */
1996 #define ARIZONA_FLL2_FREERUN_MASK 0x0002 /* FLL2_FREERUN */
1999 #define ARIZONA_FLL2_ENA 0x0001 /* FLL2_ENA */
2000 #define ARIZONA_FLL2_ENA_MASK 0x0001 /* FLL2_ENA */
2001 #define ARIZONA_FLL2_ENA_SHIFT 0 /* FLL2_ENA */
2005 * R402 (0x192) - FLL2 Control 2
2007 #define ARIZONA_FLL2_CTRL_UPD 0x8000 /* FLL2_CTRL_UPD */
2008 #define ARIZONA_FLL2_CTRL_UPD_MASK 0x8000 /* FLL2_CTRL_UPD */
2011 #define ARIZONA_FLL2_N_MASK 0x03FF /* FLL2_N - [9:0] */
2012 #define ARIZONA_FLL2_N_SHIFT 0 /* FLL2_N - [9:0] */
2013 #define ARIZONA_FLL2_N_WIDTH 10 /* FLL2_N - [9:0] */
2016 * R403 (0x193) - FLL2 Control 3
2018 #define ARIZONA_FLL2_THETA_MASK 0xFFFF /* FLL2_THETA - [15:0] */
2019 #define ARIZONA_FLL2_THETA_SHIFT 0 /* FLL2_THETA - [15:0] */
2020 #define ARIZONA_FLL2_THETA_WIDTH 16 /* FLL2_THETA - [15:0] */
2023 * R404 (0x194) - FLL2 Control 4
2025 #define ARIZONA_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */
2026 #define ARIZONA_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */
2027 #define ARIZONA_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */
2030 * R405 (0x195) - FLL2 Control 5
2032 #define ARIZONA_FLL2_FRATIO_MASK 0x0700 /* FLL2_FRATIO - [10:8] */
2035 #define ARIZONA_FLL2_OUTDIV_MASK 0x000E /* FLL2_OUTDIV - [3:1] */
2040 * R406 (0x196) - FLL2 Control 6
2042 #define ARIZONA_FLL2_CLK_REF_DIV_MASK 0x00C0 /* FLL2_CLK_REF_DIV - [7:6] */
2045 #define ARIZONA_FLL2_CLK_REF_SRC_MASK 0x000F /* FLL2_CLK_REF_SRC - [3:0] */
2046 #define ARIZONA_FLL2_CLK_REF_SRC_SHIFT 0 /* FLL2_CLK_REF_SRC - [3:0] */
2047 #define ARIZONA_FLL2_CLK_REF_SRC_WIDTH 4 /* FLL2_CLK_REF_SRC - [3:0] */
2050 * R407 (0x197) - FLL2 Loop Filter Test 1
2052 #define ARIZONA_FLL2_FRC_INTEG_UPD 0x8000 /* FLL2_FRC_INTEG_UPD */
2053 #define ARIZONA_FLL2_FRC_INTEG_UPD_MASK 0x8000 /* FLL2_FRC_INTEG_UPD */
2056 #define ARIZONA_FLL2_FRC_INTEG_VAL_MASK 0x0FFF /* FLL2_FRC_INTEG_VAL - [11:0] */
2057 #define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT 0 /* FLL2_FRC_INTEG_VAL - [11:0] */
2058 #define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH 12 /* FLL2_FRC_INTEG_VAL - [11:0] */
2061 * R409 (0x199) - FLL2 Control 7
2063 #define ARIZONA_FLL2_GAIN_MASK 0x003c /* FLL2_GAIN */
2068 * R417 (0x1A1) - FLL2 Synchroniser 1
2070 #define ARIZONA_FLL2_SYNC_ENA 0x0001 /* FLL2_SYNC_ENA */
2071 #define ARIZONA_FLL2_SYNC_ENA_MASK 0x0001 /* FLL2_SYNC_ENA */
2072 #define ARIZONA_FLL2_SYNC_ENA_SHIFT 0 /* FLL2_SYNC_ENA */
2076 * R418 (0x1A2) - FLL2 Synchroniser 2
2078 #define ARIZONA_FLL2_SYNC_N_MASK 0x03FF /* FLL2_SYNC_N - [9:0] */
2079 #define ARIZONA_FLL2_SYNC_N_SHIFT 0 /* FLL2_SYNC_N - [9:0] */
2080 #define ARIZONA_FLL2_SYNC_N_WIDTH 10 /* FLL2_SYNC_N - [9:0] */
2083 * R419 (0x1A3) - FLL2 Synchroniser 3
2085 #define ARIZONA_FLL2_SYNC_THETA_MASK 0xFFFF /* FLL2_SYNC_THETA - [15:0] */
2086 #define ARIZONA_FLL2_SYNC_THETA_SHIFT 0 /* FLL2_SYNC_THETA - [15:0] */
2087 #define ARIZONA_FLL2_SYNC_THETA_WIDTH 16 /* FLL2_SYNC_THETA - [15:0] */
2090 * R420 (0x1A4) - FLL2 Synchroniser 4
2092 #define ARIZONA_FLL2_SYNC_LAMBDA_MASK 0xFFFF /* FLL2_SYNC_LAMBDA - [15:0] */
2093 #define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT 0 /* FLL2_SYNC_LAMBDA - [15:0] */
2094 #define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH 16 /* FLL2_SYNC_LAMBDA - [15:0] */
2097 * R421 (0x1A5) - FLL2 Synchroniser 5
2099 #define ARIZONA_FLL2_SYNC_FRATIO_MASK 0x0700 /* FLL2_SYNC_FRATIO - [10:8] */
2104 * R422 (0x1A6) - FLL2 Synchroniser 6
2106 #define ARIZONA_FLL2_CLK_SYNC_DIV_MASK 0x00C0 /* FLL2_CLK_SYNC_DIV - [7:6] */
2109 #define ARIZONA_FLL2_CLK_SYNC_SRC_MASK 0x000F /* FLL2_CLK_SYNC_SRC - [3:0] */
2110 #define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT 0 /* FLL2_CLK_SYNC_SRC - [3:0] */
2111 #define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH 4 /* FLL2_CLK_SYNC_SRC - [3:0] */
2114 * R423 (0x1A7) - FLL2 Synchroniser 7
2116 #define ARIZONA_FLL2_SYNC_GAIN_MASK 0x003c /* FLL2_SYNC_GAIN */
2119 #define ARIZONA_FLL2_SYNC_BW 0x0001 /* FLL2_SYNC_BW */
2120 #define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */
2121 #define ARIZONA_FLL2_SYNC_BW_SHIFT 0 /* FLL2_SYNC_BW */
2125 * R425 (0x1A9) - FLL2 Spread Spectrum
2127 #define ARIZONA_FLL2_SS_AMPL_MASK 0x0030 /* FLL2_SS_AMPL - [5:4] */
2130 #define ARIZONA_FLL2_SS_FREQ_MASK 0x000C /* FLL2_SS_FREQ - [3:2] */
2133 #define ARIZONA_FLL2_SS_SEL_MASK 0x0003 /* FLL2_SS_SEL - [1:0] */
2134 #define ARIZONA_FLL2_SS_SEL_SHIFT 0 /* FLL2_SS_SEL - [1:0] */
2135 #define ARIZONA_FLL2_SS_SEL_WIDTH 2 /* FLL2_SS_SEL - [1:0] */
2138 * R426 (0x1AA) - FLL2 GPIO Clock
2140 #define ARIZONA_FLL2_GPDIV_MASK 0x00FE /* FLL2_GPDIV - [7:1] */
2143 #define ARIZONA_FLL2_GPDIV_ENA 0x0001 /* FLL2_GPDIV_ENA */
2144 #define ARIZONA_FLL2_GPDIV_ENA_MASK 0x0001 /* FLL2_GPDIV_ENA */
2145 #define ARIZONA_FLL2_GPDIV_ENA_SHIFT 0 /* FLL2_GPDIV_ENA */
2149 * R512 (0x200) - Mic Charge Pump 1
2151 #define ARIZONA_CPMIC_DISCH 0x0004 /* CPMIC_DISCH */
2152 #define ARIZONA_CPMIC_DISCH_MASK 0x0004 /* CPMIC_DISCH */
2155 #define ARIZONA_CPMIC_BYPASS 0x0002 /* CPMIC_BYPASS */
2156 #define ARIZONA_CPMIC_BYPASS_MASK 0x0002 /* CPMIC_BYPASS */
2159 #define ARIZONA_CPMIC_ENA 0x0001 /* CPMIC_ENA */
2160 #define ARIZONA_CPMIC_ENA_MASK 0x0001 /* CPMIC_ENA */
2161 #define ARIZONA_CPMIC_ENA_SHIFT 0 /* CPMIC_ENA */
2165 * R528 (0x210) - LDO1 Control 1
2167 #define ARIZONA_LDO1_VSEL_MASK 0x07E0 /* LDO1_VSEL - [10:5] */
2170 #define ARIZONA_LDO1_FAST 0x0010 /* LDO1_FAST */
2171 #define ARIZONA_LDO1_FAST_MASK 0x0010 /* LDO1_FAST */
2174 #define ARIZONA_LDO1_DISCH 0x0004 /* LDO1_DISCH */
2175 #define ARIZONA_LDO1_DISCH_MASK 0x0004 /* LDO1_DISCH */
2178 #define ARIZONA_LDO1_BYPASS 0x0002 /* LDO1_BYPASS */
2179 #define ARIZONA_LDO1_BYPASS_MASK 0x0002 /* LDO1_BYPASS */
2182 #define ARIZONA_LDO1_ENA 0x0001 /* LDO1_ENA */
2183 #define ARIZONA_LDO1_ENA_MASK 0x0001 /* LDO1_ENA */
2184 #define ARIZONA_LDO1_ENA_SHIFT 0 /* LDO1_ENA */
2188 * R530 (0x212) - LDO1 Control 2
2190 #define ARIZONA_LDO1_HI_PWR 0x0001 /* LDO1_HI_PWR */
2191 #define ARIZONA_LDO1_HI_PWR_SHIFT 0 /* LDO1_HI_PWR */
2195 * R531 (0x213) - LDO2 Control 1
2197 #define ARIZONA_LDO2_VSEL_MASK 0x07E0 /* LDO2_VSEL - [10:5] */
2200 #define ARIZONA_LDO2_FAST 0x0010 /* LDO2_FAST */
2201 #define ARIZONA_LDO2_FAST_MASK 0x0010 /* LDO2_FAST */
2204 #define ARIZONA_LDO2_DISCH 0x0004 /* LDO2_DISCH */
2205 #define ARIZONA_LDO2_DISCH_MASK 0x0004 /* LDO2_DISCH */
2208 #define ARIZONA_LDO2_BYPASS 0x0002 /* LDO2_BYPASS */
2209 #define ARIZONA_LDO2_BYPASS_MASK 0x0002 /* LDO2_BYPASS */
2212 #define ARIZONA_LDO2_ENA 0x0001 /* LDO2_ENA */
2213 #define ARIZONA_LDO2_ENA_MASK 0x0001 /* LDO2_ENA */
2214 #define ARIZONA_LDO2_ENA_SHIFT 0 /* LDO2_ENA */
2218 * R536 (0x218) - Mic Bias Ctrl 1
2220 #define ARIZONA_MICB1_EXT_CAP 0x8000 /* MICB1_EXT_CAP */
2221 #define ARIZONA_MICB1_EXT_CAP_MASK 0x8000 /* MICB1_EXT_CAP */
2224 #define ARIZONA_MICB1_LVL_MASK 0x01E0 /* MICB1_LVL - [8:5] */
2227 #define ARIZONA_MICB1_FAST 0x0010 /* MICB1_FAST */
2228 #define ARIZONA_MICB1_FAST_MASK 0x0010 /* MICB1_FAST */
2231 #define ARIZONA_MICB1_RATE 0x0008 /* MICB1_RATE */
2232 #define ARIZONA_MICB1_RATE_MASK 0x0008 /* MICB1_RATE */
2235 #define ARIZONA_MICB1_DISCH 0x0004 /* MICB1_DISCH */
2236 #define ARIZONA_MICB1_DISCH_MASK 0x0004 /* MICB1_DISCH */
2239 #define ARIZONA_MICB1_BYPASS 0x0002 /* MICB1_BYPASS */
2240 #define ARIZONA_MICB1_BYPASS_MASK 0x0002 /* MICB1_BYPASS */
2243 #define ARIZONA_MICB1_ENA 0x0001 /* MICB1_ENA */
2244 #define ARIZONA_MICB1_ENA_MASK 0x0001 /* MICB1_ENA */
2245 #define ARIZONA_MICB1_ENA_SHIFT 0 /* MICB1_ENA */
2249 * R537 (0x219) - Mic Bias Ctrl 2
2251 #define ARIZONA_MICB2_EXT_CAP 0x8000 /* MICB2_EXT_CAP */
2252 #define ARIZONA_MICB2_EXT_CAP_MASK 0x8000 /* MICB2_EXT_CAP */
2255 #define ARIZONA_MICB2_LVL_MASK 0x01E0 /* MICB2_LVL - [8:5] */
2258 #define ARIZONA_MICB2_FAST 0x0010 /* MICB2_FAST */
2259 #define ARIZONA_MICB2_FAST_MASK 0x0010 /* MICB2_FAST */
2262 #define ARIZONA_MICB2_RATE 0x0008 /* MICB2_RATE */
2263 #define ARIZONA_MICB2_RATE_MASK 0x0008 /* MICB2_RATE */
2266 #define ARIZONA_MICB2_DISCH 0x0004 /* MICB2_DISCH */
2267 #define ARIZONA_MICB2_DISCH_MASK 0x0004 /* MICB2_DISCH */
2270 #define ARIZONA_MICB2_BYPASS 0x0002 /* MICB2_BYPASS */
2271 #define ARIZONA_MICB2_BYPASS_MASK 0x0002 /* MICB2_BYPASS */
2274 #define ARIZONA_MICB2_ENA 0x0001 /* MICB2_ENA */
2275 #define ARIZONA_MICB2_ENA_MASK 0x0001 /* MICB2_ENA */
2276 #define ARIZONA_MICB2_ENA_SHIFT 0 /* MICB2_ENA */
2280 * R538 (0x21A) - Mic Bias Ctrl 3
2282 #define ARIZONA_MICB3_EXT_CAP 0x8000 /* MICB3_EXT_CAP */
2283 #define ARIZONA_MICB3_EXT_CAP_MASK 0x8000 /* MICB3_EXT_CAP */
2286 #define ARIZONA_MICB3_LVL_MASK 0x01E0 /* MICB3_LVL - [8:5] */
2289 #define ARIZONA_MICB3_FAST 0x0010 /* MICB3_FAST */
2290 #define ARIZONA_MICB3_FAST_MASK 0x0010 /* MICB3_FAST */
2293 #define ARIZONA_MICB3_RATE 0x0008 /* MICB3_RATE */
2294 #define ARIZONA_MICB3_RATE_MASK 0x0008 /* MICB3_RATE */
2297 #define ARIZONA_MICB3_DISCH 0x0004 /* MICB3_DISCH */
2298 #define ARIZONA_MICB3_DISCH_MASK 0x0004 /* MICB3_DISCH */
2301 #define ARIZONA_MICB3_BYPASS 0x0002 /* MICB3_BYPASS */
2302 #define ARIZONA_MICB3_BYPASS_MASK 0x0002 /* MICB3_BYPASS */
2305 #define ARIZONA_MICB3_ENA 0x0001 /* MICB3_ENA */
2306 #define ARIZONA_MICB3_ENA_MASK 0x0001 /* MICB3_ENA */
2307 #define ARIZONA_MICB3_ENA_SHIFT 0 /* MICB3_ENA */
2311 * R549 (0x225) - HP Ctrl 1L
2313 #define ARIZONA_RMV_SHRT_HP1L 0x4000 /* RMV_SHRT_HP1L */
2314 #define ARIZONA_RMV_SHRT_HP1L_MASK 0x4000 /* RMV_SHRT_HP1L */
2317 #define ARIZONA_HP1L_FLWR 0x0004 /* HP1L_FLWR */
2318 #define ARIZONA_HP1L_FLWR_MASK 0x0004 /* HP1L_FLWR */
2321 #define ARIZONA_HP1L_SHRTI 0x0002 /* HP1L_SHRTI */
2322 #define ARIZONA_HP1L_SHRTI_MASK 0x0002 /* HP1L_SHRTI */
2325 #define ARIZONA_HP1L_SHRTO 0x0001 /* HP1L_SHRTO */
2326 #define ARIZONA_HP1L_SHRTO_MASK 0x0001 /* HP1L_SHRTO */
2327 #define ARIZONA_HP1L_SHRTO_SHIFT 0 /* HP1L_SHRTO */
2331 * R550 (0x226) - HP Ctrl 1R
2333 #define ARIZONA_RMV_SHRT_HP1R 0x4000 /* RMV_SHRT_HP1R */
2334 #define ARIZONA_RMV_SHRT_HP1R_MASK 0x4000 /* RMV_SHRT_HP1R */
2337 #define ARIZONA_HP1R_FLWR 0x0004 /* HP1R_FLWR */
2338 #define ARIZONA_HP1R_FLWR_MASK 0x0004 /* HP1R_FLWR */
2341 #define ARIZONA_HP1R_SHRTI 0x0002 /* HP1R_SHRTI */
2342 #define ARIZONA_HP1R_SHRTI_MASK 0x0002 /* HP1R_SHRTI */
2345 #define ARIZONA_HP1R_SHRTO 0x0001 /* HP1R_SHRTO */
2346 #define ARIZONA_HP1R_SHRTO_MASK 0x0001 /* HP1R_SHRTO */
2347 #define ARIZONA_HP1R_SHRTO_SHIFT 0 /* HP1R_SHRTO */
2351 * R659 (0x293) - Accessory Detect Mode 1
2353 #define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
2354 #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */
2357 #define ARIZONA_ACCDET_MODE_MASK 0x0007 /* ACCDET_MODE - [2:0] */
2358 #define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [2:0] */
2359 #define ARIZONA_ACCDET_MODE_WIDTH 3 /* ACCDET_MODE - [2:0] */
2362 * R667 (0x29B) - Headphone Detect 1
2364 #define ARIZONA_HP_IMPEDANCE_RANGE_MASK 0x0600 /* HP_IMPEDANCE_RANGE - [10:9] */
2367 #define ARIZONA_HP_STEP_SIZE 0x0100 /* HP_STEP_SIZE */
2368 #define ARIZONA_HP_STEP_SIZE_MASK 0x0100 /* HP_STEP_SIZE */
2371 #define ARIZONA_HP_HOLDTIME_MASK 0x00E0 /* HP_HOLDTIME - [7:5] */
2374 #define ARIZONA_HP_CLK_DIV_MASK 0x0018 /* HP_CLK_DIV - [4:3] */
2377 #define ARIZONA_HP_IDAC_STEER 0x0004 /* HP_IDAC_STEER */
2378 #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */
2381 #define WM8998_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */
2384 #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */
2385 #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */
2388 #define ARIZONA_HP_POLL 0x0001 /* HP_POLL */
2389 #define ARIZONA_HP_POLL_MASK 0x0001 /* HP_POLL */
2390 #define ARIZONA_HP_POLL_SHIFT 0 /* HP_POLL */
2394 * R668 (0x29C) - Headphone Detect 2
2396 #define ARIZONA_HP_DONE 0x0080 /* HP_DONE */
2397 #define ARIZONA_HP_DONE_MASK 0x0080 /* HP_DONE */
2400 #define ARIZONA_HP_LVL_MASK 0x007F /* HP_LVL - [6:0] */
2401 #define ARIZONA_HP_LVL_SHIFT 0 /* HP_LVL - [6:0] */
2402 #define ARIZONA_HP_LVL_WIDTH 7 /* HP_LVL - [6:0] */
2404 #define ARIZONA_HP_DONE_B 0x8000 /* HP_DONE */
2405 #define ARIZONA_HP_DONE_B_MASK 0x8000 /* HP_DONE */
2408 #define ARIZONA_HP_LVL_B_MASK 0x7FFF /* HP_LVL - [14:0] */
2409 #define ARIZONA_HP_LVL_B_SHIFT 0 /* HP_LVL - [14:0] */
2410 #define ARIZONA_HP_LVL_B_WIDTH 15 /* HP_LVL - [14:0] */
2413 * R674 (0x2A2) - MICD clamp control
2415 #define ARIZONA_MICD_CLAMP_MODE_MASK 0x000F /* MICD_CLAMP_MODE - [3:0] */
2416 #define ARIZONA_MICD_CLAMP_MODE_SHIFT 0 /* MICD_CLAMP_MODE - [3:0] */
2417 #define ARIZONA_MICD_CLAMP_MODE_WIDTH 4 /* MICD_CLAMP_MODE - [3:0] */
2420 * R675 (0x2A3) - Mic Detect 1
2422 #define ARIZONA_MICD_BIAS_STARTTIME_MASK 0xF000 /* MICD_BIAS_STARTTIME - [15:12] */
2425 #define ARIZONA_MICD_RATE_MASK 0x0F00 /* MICD_RATE - [11:8] */
2428 #define ARIZONA_MICD_BIAS_SRC_MASK 0x0030 /* MICD_BIAS_SRC - [5:4] */
2431 #define ARIZONA_MICD_DBTIME 0x0002 /* MICD_DBTIME */
2432 #define ARIZONA_MICD_DBTIME_MASK 0x0002 /* MICD_DBTIME */
2435 #define ARIZONA_MICD_ENA 0x0001 /* MICD_ENA */
2436 #define ARIZONA_MICD_ENA_MASK 0x0001 /* MICD_ENA */
2437 #define ARIZONA_MICD_ENA_SHIFT 0 /* MICD_ENA */
2441 * R676 (0x2A4) - Mic Detect 2
2443 #define ARIZONA_MICD_LVL_SEL_MASK 0x00FF /* MICD_LVL_SEL - [7:0] */
2444 #define ARIZONA_MICD_LVL_SEL_SHIFT 0 /* MICD_LVL_SEL - [7:0] */
2445 #define ARIZONA_MICD_LVL_SEL_WIDTH 8 /* MICD_LVL_SEL - [7:0] */
2448 * R677 (0x2A5) - Mic Detect 3
2450 #define ARIZONA_MICD_LVL_0 0x0004 /* MICD_LVL - [2] */
2451 #define ARIZONA_MICD_LVL_1 0x0008 /* MICD_LVL - [3] */
2452 #define ARIZONA_MICD_LVL_2 0x0010 /* MICD_LVL - [4] */
2453 #define ARIZONA_MICD_LVL_3 0x0020 /* MICD_LVL - [5] */
2454 #define ARIZONA_MICD_LVL_4 0x0040 /* MICD_LVL - [6] */
2455 #define ARIZONA_MICD_LVL_5 0x0080 /* MICD_LVL - [7] */
2456 #define ARIZONA_MICD_LVL_6 0x0100 /* MICD_LVL - [8] */
2457 #define ARIZONA_MICD_LVL_7 0x0200 /* MICD_LVL - [9] */
2458 #define ARIZONA_MICD_LVL_8 0x0400 /* MICD_LVL - [10] */
2459 #define ARIZONA_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */
2462 #define ARIZONA_MICD_VALID 0x0002 /* MICD_VALID */
2463 #define ARIZONA_MICD_VALID_MASK 0x0002 /* MICD_VALID */
2466 #define ARIZONA_MICD_STS 0x0001 /* MICD_STS */
2467 #define ARIZONA_MICD_STS_MASK 0x0001 /* MICD_STS */
2468 #define ARIZONA_MICD_STS_SHIFT 0 /* MICD_STS */
2472 * R683 (0x2AB) - Mic Detect 4
2474 #define ARIZONA_MICDET_ADCVAL_DIFF_MASK 0xFF00 /* MICDET_ADCVAL_DIFF - [15:8] */
2477 #define ARIZONA_MICDET_ADCVAL_MASK 0x007F /* MICDET_ADCVAL - [15:8] */
2478 #define ARIZONA_MICDET_ADCVAL_SHIFT 0 /* MICDET_ADCVAL - [15:8] */
2482 * R707 (0x2C3) - Mic noise mix control 1
2484 #define ARIZONA_MICMUTE_RATE_MASK 0x7800 /* MICMUTE_RATE - [14:11] */
2487 #define ARIZONA_MICMUTE_MIX_ENA 0x0040 /* MICMUTE_MIX_ENA */
2488 #define ARIZONA_MICMUTE_MIX_ENA_MASK 0x0040 /* MICMUTE_MIX_ENA */
2493 * R715 (0x2CB) - Isolation control
2495 #define ARIZONA_ISOLATE_DCVDD1 0x0001 /* ISOLATE_DCVDD1 */
2496 #define ARIZONA_ISOLATE_DCVDD1_MASK 0x0001 /* ISOLATE_DCVDD1 */
2497 #define ARIZONA_ISOLATE_DCVDD1_SHIFT 0 /* ISOLATE_DCVDD1 */
2501 * R723 (0x2D3) - Jack detect analogue
2503 #define ARIZONA_JD2_ENA 0x0002 /* JD2_ENA */
2504 #define ARIZONA_JD2_ENA_MASK 0x0002 /* JD2_ENA */
2507 #define ARIZONA_JD1_ENA 0x0001 /* JD1_ENA */
2508 #define ARIZONA_JD1_ENA_MASK 0x0001 /* JD1_ENA */
2509 #define ARIZONA_JD1_ENA_SHIFT 0 /* JD1_ENA */
2513 * R768 (0x300) - Input Enables
2515 #define ARIZONA_IN4L_ENA 0x0080 /* IN4L_ENA */
2516 #define ARIZONA_IN4L_ENA_MASK 0x0080 /* IN4L_ENA */
2519 #define ARIZONA_IN4R_ENA 0x0040 /* IN4R_ENA */
2520 #define ARIZONA_IN4R_ENA_MASK 0x0040 /* IN4R_ENA */
2523 #define ARIZONA_IN3L_ENA 0x0020 /* IN3L_ENA */
2524 #define ARIZONA_IN3L_ENA_MASK 0x0020 /* IN3L_ENA */
2527 #define ARIZONA_IN3R_ENA 0x0010 /* IN3R_ENA */
2528 #define ARIZONA_IN3R_ENA_MASK 0x0010 /* IN3R_ENA */
2531 #define ARIZONA_IN2L_ENA 0x0008 /* IN2L_ENA */
2532 #define ARIZONA_IN2L_ENA_MASK 0x0008 /* IN2L_ENA */
2535 #define ARIZONA_IN2R_ENA 0x0004 /* IN2R_ENA */
2536 #define ARIZONA_IN2R_ENA_MASK 0x0004 /* IN2R_ENA */
2539 #define ARIZONA_IN1L_ENA 0x0002 /* IN1L_ENA */
2540 #define ARIZONA_IN1L_ENA_MASK 0x0002 /* IN1L_ENA */
2543 #define ARIZONA_IN1R_ENA 0x0001 /* IN1R_ENA */
2544 #define ARIZONA_IN1R_ENA_MASK 0x0001 /* IN1R_ENA */
2545 #define ARIZONA_IN1R_ENA_SHIFT 0 /* IN1R_ENA */
2549 * R776 (0x308) - Input Rate
2551 #define ARIZONA_IN_RATE_MASK 0x7800 /* IN_RATE - [14:11] */
2556 * R777 (0x309) - Input Volume Ramp
2558 #define ARIZONA_IN_VD_RAMP_MASK 0x0070 /* IN_VD_RAMP - [6:4] */
2561 #define ARIZONA_IN_VI_RAMP_MASK 0x0007 /* IN_VI_RAMP - [2:0] */
2562 #define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */
2563 #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */
2566 * R780 (0x30C) - HPF Control
2568 #define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */
2569 #define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */
2570 #define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */
2573 * R784 (0x310) - IN1L Control
2575 #define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */
2578 #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */
2581 #define ARIZONA_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */
2584 #define ARIZONA_IN1_MODE_MASK 0x0400 /* IN1_MODE - [10] */
2587 #define ARIZONA_IN1_SINGLE_ENDED_MASK 0x0200 /* IN1_MODE - [9] */
2590 #define ARIZONA_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */
2595 * R785 (0x311) - ADC Digital Volume 1L
2597 #define ARIZONA_IN1L_SRC_MASK 0x4000 /* IN1L_SRC - [14] */
2600 #define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */
2603 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2604 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2607 #define ARIZONA_IN1L_MUTE 0x0100 /* IN1L_MUTE */
2608 #define ARIZONA_IN1L_MUTE_MASK 0x0100 /* IN1L_MUTE */
2611 #define ARIZONA_IN1L_DIG_VOL_MASK 0x00FF /* IN1L_DIG_VOL - [7:0] */
2612 #define ARIZONA_IN1L_DIG_VOL_SHIFT 0 /* IN1L_DIG_VOL - [7:0] */
2613 #define ARIZONA_IN1L_DIG_VOL_WIDTH 8 /* IN1L_DIG_VOL - [7:0] */
2616 * R786 (0x312) - DMIC1L Control
2618 #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */
2619 #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */
2620 #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */
2623 * R788 (0x314) - IN1R Control
2625 #define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */
2628 #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */
2633 * R789 (0x315) - ADC Digital Volume 1R
2635 #define ARIZONA_IN1R_SRC_MASK 0x4000 /* IN1R_SRC - [14] */
2638 #define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */
2641 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2642 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2645 #define ARIZONA_IN1R_MUTE 0x0100 /* IN1R_MUTE */
2646 #define ARIZONA_IN1R_MUTE_MASK 0x0100 /* IN1R_MUTE */
2649 #define ARIZONA_IN1R_DIG_VOL_MASK 0x00FF /* IN1R_DIG_VOL - [7:0] */
2650 #define ARIZONA_IN1R_DIG_VOL_SHIFT 0 /* IN1R_DIG_VOL - [7:0] */
2651 #define ARIZONA_IN1R_DIG_VOL_WIDTH 8 /* IN1R_DIG_VOL - [7:0] */
2654 * R790 (0x316) - DMIC1R Control
2656 #define ARIZONA_IN1_DMICR_DLY_MASK 0x003F /* IN1_DMICR_DLY - [5:0] */
2657 #define ARIZONA_IN1_DMICR_DLY_SHIFT 0 /* IN1_DMICR_DLY - [5:0] */
2658 #define ARIZONA_IN1_DMICR_DLY_WIDTH 6 /* IN1_DMICR_DLY - [5:0] */
2661 * R792 (0x318) - IN2L Control
2663 #define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */
2666 #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */
2669 #define ARIZONA_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */
2672 #define ARIZONA_IN2_MODE_MASK 0x0400 /* IN2_MODE - [10] */
2675 #define ARIZONA_IN2_SINGLE_ENDED_MASK 0x0200 /* IN2_MODE - [9] */
2678 #define ARIZONA_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */
2683 * R793 (0x319) - ADC Digital Volume 2L
2685 #define ARIZONA_IN2L_SRC_MASK 0x4000 /* IN2L_SRC - [14] */
2688 #define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */
2691 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2692 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2695 #define ARIZONA_IN2L_MUTE 0x0100 /* IN2L_MUTE */
2696 #define ARIZONA_IN2L_MUTE_MASK 0x0100 /* IN2L_MUTE */
2699 #define ARIZONA_IN2L_DIG_VOL_MASK 0x00FF /* IN2L_DIG_VOL - [7:0] */
2700 #define ARIZONA_IN2L_DIG_VOL_SHIFT 0 /* IN2L_DIG_VOL - [7:0] */
2701 #define ARIZONA_IN2L_DIG_VOL_WIDTH 8 /* IN2L_DIG_VOL - [7:0] */
2704 * R794 (0x31A) - DMIC2L Control
2706 #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */
2707 #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */
2708 #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */
2711 * R796 (0x31C) - IN2R Control
2713 #define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */
2716 #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */
2721 * R797 (0x31D) - ADC Digital Volume 2R
2723 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2724 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2727 #define ARIZONA_IN2R_MUTE 0x0100 /* IN2R_MUTE */
2728 #define ARIZONA_IN2R_MUTE_MASK 0x0100 /* IN2R_MUTE */
2731 #define ARIZONA_IN2R_DIG_VOL_MASK 0x00FF /* IN2R_DIG_VOL - [7:0] */
2732 #define ARIZONA_IN2R_DIG_VOL_SHIFT 0 /* IN2R_DIG_VOL - [7:0] */
2733 #define ARIZONA_IN2R_DIG_VOL_WIDTH 8 /* IN2R_DIG_VOL - [7:0] */
2736 * R798 (0x31E) - DMIC2R Control
2738 #define ARIZONA_IN2_DMICR_DLY_MASK 0x003F /* IN2_DMICR_DLY - [5:0] */
2739 #define ARIZONA_IN2_DMICR_DLY_SHIFT 0 /* IN2_DMICR_DLY - [5:0] */
2740 #define ARIZONA_IN2_DMICR_DLY_WIDTH 6 /* IN2_DMICR_DLY - [5:0] */
2743 * R800 (0x320) - IN3L Control
2745 #define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */
2748 #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */
2751 #define ARIZONA_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */
2754 #define ARIZONA_IN3_MODE_MASK 0x0400 /* IN3_MODE - [10] */
2757 #define ARIZONA_IN3_SINGLE_ENDED_MASK 0x0200 /* IN3_MODE - [9] */
2760 #define ARIZONA_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */
2765 * R801 (0x321) - ADC Digital Volume 3L
2767 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2768 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2771 #define ARIZONA_IN3L_MUTE 0x0100 /* IN3L_MUTE */
2772 #define ARIZONA_IN3L_MUTE_MASK 0x0100 /* IN3L_MUTE */
2775 #define ARIZONA_IN3L_DIG_VOL_MASK 0x00FF /* IN3L_DIG_VOL - [7:0] */
2776 #define ARIZONA_IN3L_DIG_VOL_SHIFT 0 /* IN3L_DIG_VOL - [7:0] */
2777 #define ARIZONA_IN3L_DIG_VOL_WIDTH 8 /* IN3L_DIG_VOL - [7:0] */
2780 * R802 (0x322) - DMIC3L Control
2782 #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */
2783 #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */
2784 #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */
2787 * R804 (0x324) - IN3R Control
2789 #define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */
2792 #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */
2797 * R805 (0x325) - ADC Digital Volume 3R
2799 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2800 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2803 #define ARIZONA_IN3R_MUTE 0x0100 /* IN3R_MUTE */
2804 #define ARIZONA_IN3R_MUTE_MASK 0x0100 /* IN3R_MUTE */
2807 #define ARIZONA_IN3R_DIG_VOL_MASK 0x00FF /* IN3R_DIG_VOL - [7:0] */
2808 #define ARIZONA_IN3R_DIG_VOL_SHIFT 0 /* IN3R_DIG_VOL - [7:0] */
2809 #define ARIZONA_IN3R_DIG_VOL_WIDTH 8 /* IN3R_DIG_VOL - [7:0] */
2812 * R806 (0x326) - DMIC3R Control
2814 #define ARIZONA_IN3_DMICR_DLY_MASK 0x003F /* IN3_DMICR_DLY - [5:0] */
2815 #define ARIZONA_IN3_DMICR_DLY_SHIFT 0 /* IN3_DMICR_DLY - [5:0] */
2816 #define ARIZONA_IN3_DMICR_DLY_WIDTH 6 /* IN3_DMICR_DLY - [5:0] */
2819 * R808 (0x328) - IN4 Control
2821 #define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */
2824 #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */
2827 #define ARIZONA_IN4_DMIC_SUP_MASK 0x1800 /* IN4_DMIC_SUP - [12:11] */
2832 * R809 (0x329) - ADC Digital Volume 4L
2834 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2835 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2838 #define ARIZONA_IN4L_MUTE 0x0100 /* IN4L_MUTE */
2839 #define ARIZONA_IN4L_MUTE_MASK 0x0100 /* IN4L_MUTE */
2842 #define ARIZONA_IN4L_DIG_VOL_MASK 0x00FF /* IN4L_DIG_VOL - [7:0] */
2843 #define ARIZONA_IN4L_DIG_VOL_SHIFT 0 /* IN4L_DIG_VOL - [7:0] */
2844 #define ARIZONA_IN4L_DIG_VOL_WIDTH 8 /* IN4L_DIG_VOL - [7:0] */
2847 * R810 (0x32A) - DMIC4L Control
2849 #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */
2850 #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */
2851 #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */
2854 * R812 (0x32C) - IN4R Control
2856 #define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */
2861 * R813 (0x32D) - ADC Digital Volume 4R
2863 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2864 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2867 #define ARIZONA_IN4R_MUTE 0x0100 /* IN4R_MUTE */
2868 #define ARIZONA_IN4R_MUTE_MASK 0x0100 /* IN4R_MUTE */
2871 #define ARIZONA_IN4R_DIG_VOL_MASK 0x00FF /* IN4R_DIG_VOL - [7:0] */
2872 #define ARIZONA_IN4R_DIG_VOL_SHIFT 0 /* IN4R_DIG_VOL - [7:0] */
2873 #define ARIZONA_IN4R_DIG_VOL_WIDTH 8 /* IN4R_DIG_VOL - [7:0] */
2876 * R814 (0x32E) - DMIC4R Control
2878 #define ARIZONA_IN4R_DMIC_DLY_MASK 0x003F /* IN4R_DMIC_DLY - [5:0] */
2879 #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */
2880 #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */
2883 * R1024 (0x400) - Output Enables 1
2885 #define ARIZONA_OUT6L_ENA 0x0800 /* OUT6L_ENA */
2886 #define ARIZONA_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */
2889 #define ARIZONA_OUT6R_ENA 0x0400 /* OUT6R_ENA */
2890 #define ARIZONA_OUT6R_ENA_MASK 0x0400 /* OUT6R_ENA */
2893 #define ARIZONA_OUT5L_ENA 0x0200 /* OUT5L_ENA */
2894 #define ARIZONA_OUT5L_ENA_MASK 0x0200 /* OUT5L_ENA */
2897 #define ARIZONA_OUT5R_ENA 0x0100 /* OUT5R_ENA */
2898 #define ARIZONA_OUT5R_ENA_MASK 0x0100 /* OUT5R_ENA */
2901 #define ARIZONA_OUT4L_ENA 0x0080 /* OUT4L_ENA */
2902 #define ARIZONA_OUT4L_ENA_MASK 0x0080 /* OUT4L_ENA */
2905 #define ARIZONA_OUT4R_ENA 0x0040 /* OUT4R_ENA */
2906 #define ARIZONA_OUT4R_ENA_MASK 0x0040 /* OUT4R_ENA */
2909 #define ARIZONA_OUT3L_ENA 0x0020 /* OUT3L_ENA */
2910 #define ARIZONA_OUT3L_ENA_MASK 0x0020 /* OUT3L_ENA */
2913 #define ARIZONA_OUT3R_ENA 0x0010 /* OUT3R_ENA */
2914 #define ARIZONA_OUT3R_ENA_MASK 0x0010 /* OUT3R_ENA */
2917 #define ARIZONA_OUT2L_ENA 0x0008 /* OUT2L_ENA */
2918 #define ARIZONA_OUT2L_ENA_MASK 0x0008 /* OUT2L_ENA */
2921 #define ARIZONA_OUT2R_ENA 0x0004 /* OUT2R_ENA */
2922 #define ARIZONA_OUT2R_ENA_MASK 0x0004 /* OUT2R_ENA */
2925 #define ARIZONA_OUT1L_ENA 0x0002 /* OUT1L_ENA */
2926 #define ARIZONA_OUT1L_ENA_MASK 0x0002 /* OUT1L_ENA */
2929 #define ARIZONA_OUT1R_ENA 0x0001 /* OUT1R_ENA */
2930 #define ARIZONA_OUT1R_ENA_MASK 0x0001 /* OUT1R_ENA */
2931 #define ARIZONA_OUT1R_ENA_SHIFT 0 /* OUT1R_ENA */
2935 * R1025 (0x401) - Output Status 1
2937 #define ARIZONA_OUT6L_ENA_STS 0x0800 /* OUT6L_ENA_STS */
2938 #define ARIZONA_OUT6L_ENA_STS_MASK 0x0800 /* OUT6L_ENA_STS */
2941 #define ARIZONA_OUT6R_ENA_STS 0x0400 /* OUT6R_ENA_STS */
2942 #define ARIZONA_OUT6R_ENA_STS_MASK 0x0400 /* OUT6R_ENA_STS */
2945 #define ARIZONA_OUT5L_ENA_STS 0x0200 /* OUT5L_ENA_STS */
2946 #define ARIZONA_OUT5L_ENA_STS_MASK 0x0200 /* OUT5L_ENA_STS */
2949 #define ARIZONA_OUT5R_ENA_STS 0x0100 /* OUT5R_ENA_STS */
2950 #define ARIZONA_OUT5R_ENA_STS_MASK 0x0100 /* OUT5R_ENA_STS */
2953 #define ARIZONA_OUT4L_ENA_STS 0x0080 /* OUT4L_ENA_STS */
2954 #define ARIZONA_OUT4L_ENA_STS_MASK 0x0080 /* OUT4L_ENA_STS */
2957 #define ARIZONA_OUT4R_ENA_STS 0x0040 /* OUT4R_ENA_STS */
2958 #define ARIZONA_OUT4R_ENA_STS_MASK 0x0040 /* OUT4R_ENA_STS */
2963 * R1032 (0x408) - Output Rate 1
2965 #define ARIZONA_OUT_RATE_MASK 0x7800 /* OUT_RATE - [14:11] */
2970 * R1033 (0x409) - Output Volume Ramp
2972 #define ARIZONA_OUT_VD_RAMP_MASK 0x0070 /* OUT_VD_RAMP - [6:4] */
2975 #define ARIZONA_OUT_VI_RAMP_MASK 0x0007 /* OUT_VI_RAMP - [2:0] */
2976 #define ARIZONA_OUT_VI_RAMP_SHIFT 0 /* OUT_VI_RAMP - [2:0] */
2977 #define ARIZONA_OUT_VI_RAMP_WIDTH 3 /* OUT_VI_RAMP - [2:0] */
2980 * R1040 (0x410) - Output Path Config 1L
2982 #define ARIZONA_OUT1_LP_MODE 0x8000 /* OUT1_LP_MODE */
2983 #define ARIZONA_OUT1_LP_MODE_MASK 0x8000 /* OUT1_LP_MODE */
2986 #define ARIZONA_OUT1_OSR 0x2000 /* OUT1_OSR */
2987 #define ARIZONA_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */
2990 #define ARIZONA_OUT1_MONO 0x1000 /* OUT1_MONO */
2991 #define ARIZONA_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */
2994 #define ARIZONA_OUT1L_ANC_SRC_MASK 0x0C00 /* OUT1L_ANC_SRC - [11:10] */
2997 #define ARIZONA_OUT1L_PGA_VOL_MASK 0x00FE /* OUT1L_PGA_VOL - [7:1] */
3002 * R1041 (0x411) - DAC Digital Volume 1L
3004 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3005 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3008 #define ARIZONA_OUT1L_MUTE 0x0100 /* OUT1L_MUTE */
3009 #define ARIZONA_OUT1L_MUTE_MASK 0x0100 /* OUT1L_MUTE */
3012 #define ARIZONA_OUT1L_VOL_MASK 0x00FF /* OUT1L_VOL - [7:0] */
3013 #define ARIZONA_OUT1L_VOL_SHIFT 0 /* OUT1L_VOL - [7:0] */
3014 #define ARIZONA_OUT1L_VOL_WIDTH 8 /* OUT1L_VOL - [7:0] */
3017 * R1042 (0x412) - DAC Volume Limit 1L
3019 #define ARIZONA_OUT1L_VOL_LIM_MASK 0x00FF /* OUT1L_VOL_LIM - [7:0] */
3020 #define ARIZONA_OUT1L_VOL_LIM_SHIFT 0 /* OUT1L_VOL_LIM - [7:0] */
3021 #define ARIZONA_OUT1L_VOL_LIM_WIDTH 8 /* OUT1L_VOL_LIM - [7:0] */
3024 * R1043 (0x413) - Noise Gate Select 1L
3026 #define ARIZONA_OUT1L_NGATE_SRC_MASK 0x0FFF /* OUT1L_NGATE_SRC - [11:0] */
3027 #define ARIZONA_OUT1L_NGATE_SRC_SHIFT 0 /* OUT1L_NGATE_SRC - [11:0] */
3028 #define ARIZONA_OUT1L_NGATE_SRC_WIDTH 12 /* OUT1L_NGATE_SRC - [11:0] */
3031 * R1044 (0x414) - Output Path Config 1R
3033 #define ARIZONA_OUT1R_ANC_SRC_MASK 0x0C00 /* OUT1R_ANC_SRC - [11:10] */
3036 #define ARIZONA_OUT1R_PGA_VOL_MASK 0x00FE /* OUT1R_PGA_VOL - [7:1] */
3041 * R1045 (0x415) - DAC Digital Volume 1R
3043 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3044 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3047 #define ARIZONA_OUT1R_MUTE 0x0100 /* OUT1R_MUTE */
3048 #define ARIZONA_OUT1R_MUTE_MASK 0x0100 /* OUT1R_MUTE */
3051 #define ARIZONA_OUT1R_VOL_MASK 0x00FF /* OUT1R_VOL - [7:0] */
3052 #define ARIZONA_OUT1R_VOL_SHIFT 0 /* OUT1R_VOL - [7:0] */
3053 #define ARIZONA_OUT1R_VOL_WIDTH 8 /* OUT1R_VOL - [7:0] */
3056 * R1046 (0x416) - DAC Volume Limit 1R
3058 #define ARIZONA_OUT1R_VOL_LIM_MASK 0x00FF /* OUT1R_VOL_LIM - [7:0] */
3059 #define ARIZONA_OUT1R_VOL_LIM_SHIFT 0 /* OUT1R_VOL_LIM - [7:0] */
3060 #define ARIZONA_OUT1R_VOL_LIM_WIDTH 8 /* OUT1R_VOL_LIM - [7:0] */
3063 * R1047 (0x417) - Noise Gate Select 1R
3065 #define ARIZONA_OUT1R_NGATE_SRC_MASK 0x0FFF /* OUT1R_NGATE_SRC - [11:0] */
3066 #define ARIZONA_OUT1R_NGATE_SRC_SHIFT 0 /* OUT1R_NGATE_SRC - [11:0] */
3067 #define ARIZONA_OUT1R_NGATE_SRC_WIDTH 12 /* OUT1R_NGATE_SRC - [11:0] */
3070 * R1048 (0x418) - Output Path Config 2L
3072 #define ARIZONA_OUT2_LP_MODE 0x8000 /* OUT2_LP_MODE */
3073 #define ARIZONA_OUT2_LP_MODE_MASK 0x8000 /* OUT2_LP_MODE */
3076 #define ARIZONA_OUT2_OSR 0x2000 /* OUT2_OSR */
3077 #define ARIZONA_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */
3080 #define ARIZONA_OUT2_MONO 0x1000 /* OUT2_MONO */
3081 #define ARIZONA_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */
3084 #define ARIZONA_OUT2L_ANC_SRC_MASK 0x0C00 /* OUT2L_ANC_SRC - [11:10] */
3087 #define ARIZONA_OUT2L_PGA_VOL_MASK 0x00FE /* OUT2L_PGA_VOL - [7:1] */
3092 * R1049 (0x419) - DAC Digital Volume 2L
3094 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3095 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3098 #define ARIZONA_OUT2L_MUTE 0x0100 /* OUT2L_MUTE */
3099 #define ARIZONA_OUT2L_MUTE_MASK 0x0100 /* OUT2L_MUTE */
3102 #define ARIZONA_OUT2L_VOL_MASK 0x00FF /* OUT2L_VOL - [7:0] */
3103 #define ARIZONA_OUT2L_VOL_SHIFT 0 /* OUT2L_VOL - [7:0] */
3104 #define ARIZONA_OUT2L_VOL_WIDTH 8 /* OUT2L_VOL - [7:0] */
3107 * R1050 (0x41A) - DAC Volume Limit 2L
3109 #define ARIZONA_OUT2L_VOL_LIM_MASK 0x00FF /* OUT2L_VOL_LIM - [7:0] */
3110 #define ARIZONA_OUT2L_VOL_LIM_SHIFT 0 /* OUT2L_VOL_LIM - [7:0] */
3111 #define ARIZONA_OUT2L_VOL_LIM_WIDTH 8 /* OUT2L_VOL_LIM - [7:0] */
3114 * R1051 (0x41B) - Noise Gate Select 2L
3116 #define ARIZONA_OUT2L_NGATE_SRC_MASK 0x0FFF /* OUT2L_NGATE_SRC - [11:0] */
3117 #define ARIZONA_OUT2L_NGATE_SRC_SHIFT 0 /* OUT2L_NGATE_SRC - [11:0] */
3118 #define ARIZONA_OUT2L_NGATE_SRC_WIDTH 12 /* OUT2L_NGATE_SRC - [11:0] */
3121 * R1052 (0x41C) - Output Path Config 2R
3123 #define ARIZONA_OUT2R_ANC_SRC_MASK 0x0C00 /* OUT2R_ANC_SRC - [11:10] */
3126 #define ARIZONA_OUT2R_PGA_VOL_MASK 0x00FE /* OUT2R_PGA_VOL - [7:1] */
3131 * R1053 (0x41D) - DAC Digital Volume 2R
3133 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3134 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3137 #define ARIZONA_OUT2R_MUTE 0x0100 /* OUT2R_MUTE */
3138 #define ARIZONA_OUT2R_MUTE_MASK 0x0100 /* OUT2R_MUTE */
3141 #define ARIZONA_OUT2R_VOL_MASK 0x00FF /* OUT2R_VOL - [7:0] */
3142 #define ARIZONA_OUT2R_VOL_SHIFT 0 /* OUT2R_VOL - [7:0] */
3143 #define ARIZONA_OUT2R_VOL_WIDTH 8 /* OUT2R_VOL - [7:0] */
3146 * R1054 (0x41E) - DAC Volume Limit 2R
3148 #define ARIZONA_OUT2R_VOL_LIM_MASK 0x00FF /* OUT2R_VOL_LIM - [7:0] */
3149 #define ARIZONA_OUT2R_VOL_LIM_SHIFT 0 /* OUT2R_VOL_LIM - [7:0] */
3150 #define ARIZONA_OUT2R_VOL_LIM_WIDTH 8 /* OUT2R_VOL_LIM - [7:0] */
3153 * R1055 (0x41F) - Noise Gate Select 2R
3155 #define ARIZONA_OUT2R_NGATE_SRC_MASK 0x0FFF /* OUT2R_NGATE_SRC - [11:0] */
3156 #define ARIZONA_OUT2R_NGATE_SRC_SHIFT 0 /* OUT2R_NGATE_SRC - [11:0] */
3157 #define ARIZONA_OUT2R_NGATE_SRC_WIDTH 12 /* OUT2R_NGATE_SRC - [11:0] */
3160 * R1056 (0x420) - Output Path Config 3L
3162 #define ARIZONA_OUT3_LP_MODE 0x8000 /* OUT3_LP_MODE */
3163 #define ARIZONA_OUT3_LP_MODE_MASK 0x8000 /* OUT3_LP_MODE */
3166 #define ARIZONA_OUT3_OSR 0x2000 /* OUT3_OSR */
3167 #define ARIZONA_OUT3_OSR_MASK 0x2000 /* OUT3_OSR */
3170 #define ARIZONA_OUT3_MONO 0x1000 /* OUT3_MONO */
3171 #define ARIZONA_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */
3174 #define ARIZONA_OUT3L_ANC_SRC_MASK 0x0C00 /* OUT3L_ANC_SRC - [11:10] */
3177 #define ARIZONA_OUT3L_PGA_VOL_MASK 0x00FE /* OUT3L_PGA_VOL - [7:1] */
3182 * R1057 (0x421) - DAC Digital Volume 3L
3184 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3185 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3188 #define ARIZONA_OUT3L_MUTE 0x0100 /* OUT3L_MUTE */
3189 #define ARIZONA_OUT3L_MUTE_MASK 0x0100 /* OUT3L_MUTE */
3192 #define ARIZONA_OUT3L_VOL_MASK 0x00FF /* OUT3L_VOL - [7:0] */
3193 #define ARIZONA_OUT3L_VOL_SHIFT 0 /* OUT3L_VOL - [7:0] */
3194 #define ARIZONA_OUT3L_VOL_WIDTH 8 /* OUT3L_VOL - [7:0] */
3197 * R1058 (0x422) - DAC Volume Limit 3L
3199 #define ARIZONA_OUT3L_VOL_LIM_MASK 0x00FF /* OUT3L_VOL_LIM - [7:0] */
3200 #define ARIZONA_OUT3L_VOL_LIM_SHIFT 0 /* OUT3L_VOL_LIM - [7:0] */
3201 #define ARIZONA_OUT3L_VOL_LIM_WIDTH 8 /* OUT3L_VOL_LIM - [7:0] */
3204 * R1059 (0x423) - Noise Gate Select 3L
3206 #define ARIZONA_OUT3_NGATE_SRC_MASK 0x0FFF /* OUT3_NGATE_SRC - [11:0] */
3207 #define ARIZONA_OUT3_NGATE_SRC_SHIFT 0 /* OUT3_NGATE_SRC - [11:0] */
3208 #define ARIZONA_OUT3_NGATE_SRC_WIDTH 12 /* OUT3_NGATE_SRC - [11:0] */
3211 * R1060 (0x424) - Output Path Config 3R
3213 #define ARIZONA_OUT3R_PGA_VOL_MASK 0x00FE /* OUT3R_PGA_VOL - [7:1] */
3218 * R1061 (0x425) - DAC Digital Volume 3R
3220 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3221 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3224 #define ARIZONA_OUT3R_MUTE 0x0100 /* OUT3R_MUTE */
3225 #define ARIZONA_OUT3R_MUTE_MASK 0x0100 /* OUT3R_MUTE */
3228 #define ARIZONA_OUT3R_VOL_MASK 0x00FF /* OUT3R_VOL - [7:0] */
3229 #define ARIZONA_OUT3R_VOL_SHIFT 0 /* OUT3R_VOL - [7:0] */
3230 #define ARIZONA_OUT3R_VOL_WIDTH 8 /* OUT3R_VOL - [7:0] */
3233 * R1062 (0x426) - DAC Volume Limit 3R
3235 #define ARIZONA_OUT3R_ANC_SRC_MASK 0x0C00 /* OUT3R_ANC_SRC - [11:10] */
3238 #define ARIZONA_OUT3R_VOL_LIM_MASK 0x00FF /* OUT3R_VOL_LIM - [7:0] */
3239 #define ARIZONA_OUT3R_VOL_LIM_SHIFT 0 /* OUT3R_VOL_LIM - [7:0] */
3240 #define ARIZONA_OUT3R_VOL_LIM_WIDTH 8 /* OUT3R_VOL_LIM - [7:0] */
3243 * R1064 (0x428) - Output Path Config 4L
3245 #define ARIZONA_OUT4_OSR 0x2000 /* OUT4_OSR */
3246 #define ARIZONA_OUT4_OSR_MASK 0x2000 /* OUT4_OSR */
3249 #define ARIZONA_OUT4L_ANC_SRC_MASK 0x0C00 /* OUT4L_ANC_SRC - [11:10] */
3254 * R1065 (0x429) - DAC Digital Volume 4L
3256 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3257 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3260 #define ARIZONA_OUT4L_MUTE 0x0100 /* OUT4L_MUTE */
3261 #define ARIZONA_OUT4L_MUTE_MASK 0x0100 /* OUT4L_MUTE */
3264 #define ARIZONA_OUT4L_VOL_MASK 0x00FF /* OUT4L_VOL - [7:0] */
3265 #define ARIZONA_OUT4L_VOL_SHIFT 0 /* OUT4L_VOL - [7:0] */
3266 #define ARIZONA_OUT4L_VOL_WIDTH 8 /* OUT4L_VOL - [7:0] */
3269 * R1066 (0x42A) - Out Volume 4L
3271 #define ARIZONA_OUT4L_VOL_LIM_MASK 0x00FF /* OUT4L_VOL_LIM - [7:0] */
3272 #define ARIZONA_OUT4L_VOL_LIM_SHIFT 0 /* OUT4L_VOL_LIM - [7:0] */
3273 #define ARIZONA_OUT4L_VOL_LIM_WIDTH 8 /* OUT4L_VOL_LIM - [7:0] */
3276 * R1067 (0x42B) - Noise Gate Select 4L
3278 #define ARIZONA_OUT4L_NGATE_SRC_MASK 0x0FFF /* OUT4L_NGATE_SRC - [11:0] */
3279 #define ARIZONA_OUT4L_NGATE_SRC_SHIFT 0 /* OUT4L_NGATE_SRC - [11:0] */
3280 #define ARIZONA_OUT4L_NGATE_SRC_WIDTH 12 /* OUT4L_NGATE_SRC - [11:0] */
3283 * R1068 (0x42C) - Output Path Config 4R
3285 #define ARIZONA_OUT4R_ANC_SRC_MASK 0x0C00 /* OUT4R_ANC_SRC - [11:10] */
3290 * R1069 (0x42D) - DAC Digital Volume 4R
3292 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3293 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3296 #define ARIZONA_OUT4R_MUTE 0x0100 /* OUT4R_MUTE */
3297 #define ARIZONA_OUT4R_MUTE_MASK 0x0100 /* OUT4R_MUTE */
3300 #define ARIZONA_OUT4R_VOL_MASK 0x00FF /* OUT4R_VOL - [7:0] */
3301 #define ARIZONA_OUT4R_VOL_SHIFT 0 /* OUT4R_VOL - [7:0] */
3302 #define ARIZONA_OUT4R_VOL_WIDTH 8 /* OUT4R_VOL - [7:0] */
3305 * R1070 (0x42E) - Out Volume 4R
3307 #define ARIZONA_OUT4R_VOL_LIM_MASK 0x00FF /* OUT4R_VOL_LIM - [7:0] */
3308 #define ARIZONA_OUT4R_VOL_LIM_SHIFT 0 /* OUT4R_VOL_LIM - [7:0] */
3309 #define ARIZONA_OUT4R_VOL_LIM_WIDTH 8 /* OUT4R_VOL_LIM - [7:0] */
3312 * R1071 (0x42F) - Noise Gate Select 4R
3314 #define ARIZONA_OUT4R_NGATE_SRC_MASK 0x0FFF /* OUT4R_NGATE_SRC - [11:0] */
3315 #define ARIZONA_OUT4R_NGATE_SRC_SHIFT 0 /* OUT4R_NGATE_SRC - [11:0] */
3316 #define ARIZONA_OUT4R_NGATE_SRC_WIDTH 12 /* OUT4R_NGATE_SRC - [11:0] */
3319 * R1072 (0x430) - Output Path Config 5L
3321 #define ARIZONA_OUT5_OSR 0x2000 /* OUT5_OSR */
3322 #define ARIZONA_OUT5_OSR_MASK 0x2000 /* OUT5_OSR */
3325 #define ARIZONA_OUT5L_ANC_SRC_MASK 0x0C00 /* OUT5L_ANC_SRC - [11:10] */
3330 * R1073 (0x431) - DAC Digital Volume 5L
3332 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3333 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3336 #define ARIZONA_OUT5L_MUTE 0x0100 /* OUT5L_MUTE */
3337 #define ARIZONA_OUT5L_MUTE_MASK 0x0100 /* OUT5L_MUTE */
3340 #define ARIZONA_OUT5L_VOL_MASK 0x00FF /* OUT5L_VOL - [7:0] */
3341 #define ARIZONA_OUT5L_VOL_SHIFT 0 /* OUT5L_VOL - [7:0] */
3342 #define ARIZONA_OUT5L_VOL_WIDTH 8 /* OUT5L_VOL - [7:0] */
3345 * R1074 (0x432) - DAC Volume Limit 5L
3347 #define ARIZONA_OUT5L_VOL_LIM_MASK 0x00FF /* OUT5L_VOL_LIM - [7:0] */
3348 #define ARIZONA_OUT5L_VOL_LIM_SHIFT 0 /* OUT5L_VOL_LIM - [7:0] */
3349 #define ARIZONA_OUT5L_VOL_LIM_WIDTH 8 /* OUT5L_VOL_LIM - [7:0] */
3352 * R1075 (0x433) - Noise Gate Select 5L
3354 #define ARIZONA_OUT5L_NGATE_SRC_MASK 0x0FFF /* OUT5L_NGATE_SRC - [11:0] */
3355 #define ARIZONA_OUT5L_NGATE_SRC_SHIFT 0 /* OUT5L_NGATE_SRC - [11:0] */
3356 #define ARIZONA_OUT5L_NGATE_SRC_WIDTH 12 /* OUT5L_NGATE_SRC - [11:0] */
3359 * R1076 (0x434) - Output Path Config 5R
3361 #define ARIZONA_OUT5R_ANC_SRC_MASK 0x0C00 /* OUT5R_ANC_SRC - [11:10] */
3366 * R1077 (0x435) - DAC Digital Volume 5R
3368 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3369 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3372 #define ARIZONA_OUT5R_MUTE 0x0100 /* OUT5R_MUTE */
3373 #define ARIZONA_OUT5R_MUTE_MASK 0x0100 /* OUT5R_MUTE */
3376 #define ARIZONA_OUT5R_VOL_MASK 0x00FF /* OUT5R_VOL - [7:0] */
3377 #define ARIZONA_OUT5R_VOL_SHIFT 0 /* OUT5R_VOL - [7:0] */
3378 #define ARIZONA_OUT5R_VOL_WIDTH 8 /* OUT5R_VOL - [7:0] */
3381 * R1078 (0x436) - DAC Volume Limit 5R
3383 #define ARIZONA_OUT5R_VOL_LIM_MASK 0x00FF /* OUT5R_VOL_LIM - [7:0] */
3384 #define ARIZONA_OUT5R_VOL_LIM_SHIFT 0 /* OUT5R_VOL_LIM - [7:0] */
3385 #define ARIZONA_OUT5R_VOL_LIM_WIDTH 8 /* OUT5R_VOL_LIM - [7:0] */
3388 * R1079 (0x437) - Noise Gate Select 5R
3390 #define ARIZONA_OUT5R_NGATE_SRC_MASK 0x0FFF /* OUT5R_NGATE_SRC - [11:0] */
3391 #define ARIZONA_OUT5R_NGATE_SRC_SHIFT 0 /* OUT5R_NGATE_SRC - [11:0] */
3392 #define ARIZONA_OUT5R_NGATE_SRC_WIDTH 12 /* OUT5R_NGATE_SRC - [11:0] */
3395 * R1080 (0x438) - Output Path Config 6L
3397 #define ARIZONA_OUT6_OSR 0x2000 /* OUT6_OSR */
3398 #define ARIZONA_OUT6_OSR_MASK 0x2000 /* OUT6_OSR */
3401 #define ARIZONA_OUT6L_ANC_SRC_MASK 0x0C00 /* OUT6L_ANC_SRC - [11:10] */
3406 * R1081 (0x439) - DAC Digital Volume 6L
3408 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3409 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3412 #define ARIZONA_OUT6L_MUTE 0x0100 /* OUT6L_MUTE */
3413 #define ARIZONA_OUT6L_MUTE_MASK 0x0100 /* OUT6L_MUTE */
3416 #define ARIZONA_OUT6L_VOL_MASK 0x00FF /* OUT6L_VOL - [7:0] */
3417 #define ARIZONA_OUT6L_VOL_SHIFT 0 /* OUT6L_VOL - [7:0] */
3418 #define ARIZONA_OUT6L_VOL_WIDTH 8 /* OUT6L_VOL - [7:0] */
3421 * R1082 (0x43A) - DAC Volume Limit 6L
3423 #define ARIZONA_OUT6L_VOL_LIM_MASK 0x00FF /* OUT6L_VOL_LIM - [7:0] */
3424 #define ARIZONA_OUT6L_VOL_LIM_SHIFT 0 /* OUT6L_VOL_LIM - [7:0] */
3425 #define ARIZONA_OUT6L_VOL_LIM_WIDTH 8 /* OUT6L_VOL_LIM - [7:0] */
3428 * R1083 (0x43B) - Noise Gate Select 6L
3430 #define ARIZONA_OUT6L_NGATE_SRC_MASK 0x0FFF /* OUT6L_NGATE_SRC - [11:0] */
3431 #define ARIZONA_OUT6L_NGATE_SRC_SHIFT 0 /* OUT6L_NGATE_SRC - [11:0] */
3432 #define ARIZONA_OUT6L_NGATE_SRC_WIDTH 12 /* OUT6L_NGATE_SRC - [11:0] */
3435 * R1084 (0x43C) - Output Path Config 6R
3437 #define ARIZONA_OUT6R_ANC_SRC_MASK 0x0C00 /* OUT6R_ANC_SRC - [11:10] */
3442 * R1085 (0x43D) - DAC Digital Volume 6R
3444 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3445 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3448 #define ARIZONA_OUT6R_MUTE 0x0100 /* OUT6R_MUTE */
3449 #define ARIZONA_OUT6R_MUTE_MASK 0x0100 /* OUT6R_MUTE */
3452 #define ARIZONA_OUT6R_VOL_MASK 0x00FF /* OUT6R_VOL - [7:0] */
3453 #define ARIZONA_OUT6R_VOL_SHIFT 0 /* OUT6R_VOL - [7:0] */
3454 #define ARIZONA_OUT6R_VOL_WIDTH 8 /* OUT6R_VOL - [7:0] */
3457 * R1086 (0x43E) - DAC Volume Limit 6R
3459 #define ARIZONA_OUT6R_VOL_LIM_MASK 0x00FF /* OUT6R_VOL_LIM - [7:0] */
3460 #define ARIZONA_OUT6R_VOL_LIM_SHIFT 0 /* OUT6R_VOL_LIM - [7:0] */
3461 #define ARIZONA_OUT6R_VOL_LIM_WIDTH 8 /* OUT6R_VOL_LIM - [7:0] */
3464 * R1087 (0x43F) - Noise Gate Select 6R
3466 #define ARIZONA_OUT6R_NGATE_SRC_MASK 0x0FFF /* OUT6R_NGATE_SRC - [11:0] */
3467 #define ARIZONA_OUT6R_NGATE_SRC_SHIFT 0 /* OUT6R_NGATE_SRC - [11:0] */
3468 #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */
3471 * R1088 (0x440) - DRE Enable
3473 #define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */
3474 #define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */
3477 #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */
3478 #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */
3481 #define ARIZONA_DRE2R_ENA 0x0008 /* DRE2R_ENA */
3482 #define ARIZONA_DRE2R_ENA_MASK 0x0008 /* DRE2R_ENA */
3485 #define ARIZONA_DRE2L_ENA 0x0004 /* DRE2L_ENA */
3486 #define ARIZONA_DRE2L_ENA_MASK 0x0004 /* DRE2L_ENA */
3489 #define ARIZONA_DRE1R_ENA 0x0002 /* DRE1R_ENA */
3490 #define ARIZONA_DRE1R_ENA_MASK 0x0002 /* DRE1R_ENA */
3493 #define ARIZONA_DRE1L_ENA 0x0001 /* DRE1L_ENA */
3494 #define ARIZONA_DRE1L_ENA_MASK 0x0001 /* DRE1L_ENA */
3495 #define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */
3499 * R1088 (0x440) - DRE Enable (WM8998)
3501 #define WM8998_DRE3L_ENA 0x0020 /* DRE3L_ENA */
3502 #define WM8998_DRE3L_ENA_MASK 0x0020 /* DRE3L_ENA */
3505 #define WM8998_DRE2L_ENA 0x0008 /* DRE2L_ENA */
3506 #define WM8998_DRE2L_ENA_MASK 0x0008 /* DRE2L_ENA */
3509 #define WM8998_DRE2R_ENA 0x0004 /* DRE2R_ENA */
3510 #define WM8998_DRE2R_ENA_MASK 0x0004 /* DRE2R_ENA */
3513 #define WM8998_DRE1L_ENA 0x0002 /* DRE1L_ENA */
3514 #define WM8998_DRE1L_ENA_MASK 0x0002 /* DRE1L_ENA */
3517 #define WM8998_DRE1R_ENA 0x0001 /* DRE1R_ENA */
3518 #define WM8998_DRE1R_ENA_MASK 0x0001 /* DRE1R_ENA */
3519 #define WM8998_DRE1R_ENA_SHIFT 0 /* DRE1R_ENA */
3523 * R1089 (0x441) - DRE Control 1
3525 #define ARIZONA_DRE_ENV_TC_FAST_MASK 0x0F00 /* DRE_ENV_TC_FAST - [11:8] */
3530 * R1090 (0x442) - DRE Control 2
3532 #define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */
3535 #define ARIZONA_DRE_ALOG_VOL_DELAY_MASK 0x000F /* DRE_ALOG_VOL_DELAY - [3:0] */
3536 #define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT 0 /* DRE_ALOG_VOL_DELAY - [3:0] */
3537 #define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH 4 /* DRE_ALOG_VOL_DELAY - [3:0] */
3540 * R1091 (0x443) - DRE Control 3
3542 #define ARIZONA_DRE_GAIN_SHIFT_MASK 0xC000 /* DRE_GAIN_SHIFT - [15:14] */
3545 #define ARIZONA_DRE_LOW_LEVEL_ABS_MASK 0x000F /* LOW_LEVEL_ABS - [3:0] */
3546 #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */
3547 #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */
3549 /* R486 (0x448) - EDRE_Enable
3551 #define ARIZONA_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */
3552 #define ARIZONA_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */
3555 #define ARIZONA_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */
3556 #define ARIZONA_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */
3559 #define ARIZONA_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */
3560 #define ARIZONA_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */
3563 #define ARIZONA_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */
3564 #define ARIZONA_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */
3567 #define ARIZONA_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */
3568 #define ARIZONA_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */
3571 #define ARIZONA_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */
3572 #define ARIZONA_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */
3575 #define ARIZONA_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */
3576 #define ARIZONA_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */
3579 #define ARIZONA_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */
3580 #define ARIZONA_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */
3583 #define ARIZONA_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */
3584 #define ARIZONA_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */
3587 #define ARIZONA_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */
3588 #define ARIZONA_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */
3589 #define ARIZONA_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */
3593 * R1104 (0x450) - DAC AEC Control 1
3595 #define ARIZONA_AEC_LOOPBACK_SRC_MASK 0x003C /* AEC_LOOPBACK_SRC - [5:2] */
3598 #define ARIZONA_AEC_ENA_STS 0x0002 /* AEC_ENA_STS */
3599 #define ARIZONA_AEC_ENA_STS_MASK 0x0002 /* AEC_ENA_STS */
3602 #define ARIZONA_AEC_LOOPBACK_ENA 0x0001 /* AEC_LOOPBACK_ENA */
3603 #define ARIZONA_AEC_LOOPBACK_ENA_MASK 0x0001 /* AEC_LOOPBACK_ENA */
3604 #define ARIZONA_AEC_LOOPBACK_ENA_SHIFT 0 /* AEC_LOOPBACK_ENA */
3608 * R1112 (0x458) - Noise Gate Control
3610 #define ARIZONA_NGATE_HOLD_MASK 0x0030 /* NGATE_HOLD - [5:4] */
3613 #define ARIZONA_NGATE_THR_MASK 0x000E /* NGATE_THR - [3:1] */
3616 #define ARIZONA_NGATE_ENA 0x0001 /* NGATE_ENA */
3617 #define ARIZONA_NGATE_ENA_MASK 0x0001 /* NGATE_ENA */
3618 #define ARIZONA_NGATE_ENA_SHIFT 0 /* NGATE_ENA */
3622 * R1168 (0x490) - PDM SPK1 CTRL 1
3624 #define ARIZONA_SPK1R_MUTE 0x2000 /* SPK1R_MUTE */
3625 #define ARIZONA_SPK1R_MUTE_MASK 0x2000 /* SPK1R_MUTE */
3628 #define ARIZONA_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */
3629 #define ARIZONA_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */
3632 #define ARIZONA_SPK1_MUTE_ENDIAN 0x0100 /* SPK1_MUTE_ENDIAN */
3633 #define ARIZONA_SPK1_MUTE_ENDIAN_MASK 0x0100 /* SPK1_MUTE_ENDIAN */
3636 #define ARIZONA_SPK1_MUTE_SEQ1_MASK 0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */
3637 #define ARIZONA_SPK1_MUTE_SEQ1_SHIFT 0 /* SPK1_MUTE_SEQ1 - [7:0] */
3638 #define ARIZONA_SPK1_MUTE_SEQ1_WIDTH 8 /* SPK1_MUTE_SEQ1 - [7:0] */
3641 * R1169 (0x491) - PDM SPK1 CTRL 2
3643 #define ARIZONA_SPK1_FMT 0x0001 /* SPK1_FMT */
3644 #define ARIZONA_SPK1_FMT_MASK 0x0001 /* SPK1_FMT */
3645 #define ARIZONA_SPK1_FMT_SHIFT 0 /* SPK1_FMT */
3649 * R1170 (0x492) - PDM SPK2 CTRL 1
3651 #define ARIZONA_SPK2R_MUTE 0x2000 /* SPK2R_MUTE */
3652 #define ARIZONA_SPK2R_MUTE_MASK 0x2000 /* SPK2R_MUTE */
3655 #define ARIZONA_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */
3656 #define ARIZONA_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUTE */
3659 #define ARIZONA_SPK2_MUTE_ENDIAN 0x0100 /* SPK2_MUTE_ENDIAN */
3660 #define ARIZONA_SPK2_MUTE_ENDIAN_MASK 0x0100 /* SPK2_MUTE_ENDIAN */
3663 #define ARIZONA_SPK2_MUTE_SEQ_MASK 0x00FF /* SPK2_MUTE_SEQ - [7:0] */
3664 #define ARIZONA_SPK2_MUTE_SEQ_SHIFT 0 /* SPK2_MUTE_SEQ - [7:0] */
3665 #define ARIZONA_SPK2_MUTE_SEQ_WIDTH 8 /* SPK2_MUTE_SEQ - [7:0] */
3668 * R1171 (0x493) - PDM SPK2 CTRL 2
3670 #define ARIZONA_SPK2_FMT 0x0001 /* SPK2_FMT */
3671 #define ARIZONA_SPK2_FMT_MASK 0x0001 /* SPK2_FMT */
3672 #define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */
3676 * R1184 (0x4A0) - HP1 Short Circuit Ctrl
3678 #define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */
3679 #define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */
3684 * R1185 (0x4A1) - HP2 Short Circuit Ctrl
3686 #define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */
3687 #define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */
3692 * R1186 (0x4A2) - HP3 Short Circuit Ctrl
3694 #define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */
3695 #define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */
3700 * R1188 (0x4A4) HP Test Ctrl 1
3702 #define ARIZONA_HP1_TST_CAP_SEL_MASK 0x0003 /* HP1_TST_CAP_SEL - [1:0] */
3703 #define ARIZONA_HP1_TST_CAP_SEL_SHIFT 0 /* HP1_TST_CAP_SEL - [1:0] */
3704 #define ARIZONA_HP1_TST_CAP_SEL_WIDTH 2 /* HP1_TST_CAP_SEL - [1:0] */
3707 * R1244 (0x4DC) - DAC comp 1
3709 #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */
3710 #define ARIZONA_OUT_COMP_COEFF_SHIFT 0 /* OUT_COMP_COEFF - [15:0] */
3711 #define ARIZONA_OUT_COMP_COEFF_WIDTH 16 /* OUT_COMP_COEFF - [15:0] */
3714 * R1245 (0x4DD) - DAC comp 2
3716 #define ARIZONA_OUT_COMP_COEFF_1 0x0002 /* OUT_COMP_COEFF */
3717 #define ARIZONA_OUT_COMP_COEFF_1_MASK 0x0002 /* OUT_COMP_COEFF */
3720 #define ARIZONA_OUT_COMP_COEFF_SEL 0x0001 /* OUT_COMP_COEFF_SEL */
3721 #define ARIZONA_OUT_COMP_COEFF_SEL_MASK 0x0001 /* OUT_COMP_COEFF_SEL */
3722 #define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT 0 /* OUT_COMP_COEFF_SEL */
3726 * R1246 (0x4DE) - DAC comp 3
3728 #define ARIZONA_AEC_COMP_COEFF_MASK 0xFFFF /* AEC_COMP_COEFF - [15:0] */
3729 #define ARIZONA_AEC_COMP_COEFF_SHIFT 0 /* AEC_COMP_COEFF - [15:0] */
3730 #define ARIZONA_AEC_COMP_COEFF_WIDTH 16 /* AEC_COMP_COEFF - [15:0] */
3733 * R1247 (0x4DF) - DAC comp 4
3735 #define ARIZONA_AEC_COMP_COEFF_1 0x0002 /* AEC_COMP_COEFF */
3736 #define ARIZONA_AEC_COMP_COEFF_1_MASK 0x0002 /* AEC_COMP_COEFF */
3739 #define ARIZONA_AEC_COMP_COEFF_SEL 0x0001 /* AEC_COMP_COEFF_SEL */
3740 #define ARIZONA_AEC_COMP_COEFF_SEL_MASK 0x0001 /* AEC_COMP_COEFF_SEL */
3741 #define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT 0 /* AEC_COMP_COEFF_SEL */
3745 * R1280 (0x500) - AIF1 BCLK Ctrl
3747 #define ARIZONA_AIF1_BCLK_INV 0x0080 /* AIF1_BCLK_INV */
3748 #define ARIZONA_AIF1_BCLK_INV_MASK 0x0080 /* AIF1_BCLK_INV */
3751 #define ARIZONA_AIF1_BCLK_FRC 0x0040 /* AIF1_BCLK_FRC */
3752 #define ARIZONA_AIF1_BCLK_FRC_MASK 0x0040 /* AIF1_BCLK_FRC */
3755 #define ARIZONA_AIF1_BCLK_MSTR 0x0020 /* AIF1_BCLK_MSTR */
3756 #define ARIZONA_AIF1_BCLK_MSTR_MASK 0x0020 /* AIF1_BCLK_MSTR */
3759 #define ARIZONA_AIF1_BCLK_FREQ_MASK 0x001F /* AIF1_BCLK_FREQ - [4:0] */
3760 #define ARIZONA_AIF1_BCLK_FREQ_SHIFT 0 /* AIF1_BCLK_FREQ - [4:0] */
3761 #define ARIZONA_AIF1_BCLK_FREQ_WIDTH 5 /* AIF1_BCLK_FREQ - [4:0] */
3764 * R1281 (0x501) - AIF1 Tx Pin Ctrl
3766 #define ARIZONA_AIF1TX_DAT_TRI 0x0020 /* AIF1TX_DAT_TRI */
3767 #define ARIZONA_AIF1TX_DAT_TRI_MASK 0x0020 /* AIF1TX_DAT_TRI */
3770 #define ARIZONA_AIF1TX_LRCLK_SRC 0x0008 /* AIF1TX_LRCLK_SRC */
3771 #define ARIZONA_AIF1TX_LRCLK_SRC_MASK 0x0008 /* AIF1TX_LRCLK_SRC */
3774 #define ARIZONA_AIF1TX_LRCLK_INV 0x0004 /* AIF1TX_LRCLK_INV */
3775 #define ARIZONA_AIF1TX_LRCLK_INV_MASK 0x0004 /* AIF1TX_LRCLK_INV */
3778 #define ARIZONA_AIF1TX_LRCLK_FRC 0x0002 /* AIF1TX_LRCLK_FRC */
3779 #define ARIZONA_AIF1TX_LRCLK_FRC_MASK 0x0002 /* AIF1TX_LRCLK_FRC */
3782 #define ARIZONA_AIF1TX_LRCLK_MSTR 0x0001 /* AIF1TX_LRCLK_MSTR */
3783 #define ARIZONA_AIF1TX_LRCLK_MSTR_MASK 0x0001 /* AIF1TX_LRCLK_MSTR */
3784 #define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT 0 /* AIF1TX_LRCLK_MSTR */
3788 * R1282 (0x502) - AIF1 Rx Pin Ctrl
3790 #define ARIZONA_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */
3791 #define ARIZONA_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */
3794 #define ARIZONA_AIF1RX_LRCLK_FRC 0x0002 /* AIF1RX_LRCLK_FRC */
3795 #define ARIZONA_AIF1RX_LRCLK_FRC_MASK 0x0002 /* AIF1RX_LRCLK_FRC */
3798 #define ARIZONA_AIF1RX_LRCLK_MSTR 0x0001 /* AIF1RX_LRCLK_MSTR */
3799 #define ARIZONA_AIF1RX_LRCLK_MSTR_MASK 0x0001 /* AIF1RX_LRCLK_MSTR */
3800 #define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT 0 /* AIF1RX_LRCLK_MSTR */
3804 * R1283 (0x503) - AIF1 Rate Ctrl
3806 #define ARIZONA_AIF1_RATE_MASK 0x7800 /* AIF1_RATE - [14:11] */
3809 #define ARIZONA_AIF1_TRI 0x0040 /* AIF1_TRI */
3810 #define ARIZONA_AIF1_TRI_MASK 0x0040 /* AIF1_TRI */
3815 * R1284 (0x504) - AIF1 Format
3817 #define ARIZONA_AIF1_FMT_MASK 0x0007 /* AIF1_FMT - [2:0] */
3818 #define ARIZONA_AIF1_FMT_SHIFT 0 /* AIF1_FMT - [2:0] */
3819 #define ARIZONA_AIF1_FMT_WIDTH 3 /* AIF1_FMT - [2:0] */
3822 * R1285 (0x505) - AIF1 Tx BCLK Rate
3824 #define ARIZONA_AIF1TX_BCPF_MASK 0x1FFF /* AIF1TX_BCPF - [12:0] */
3825 #define ARIZONA_AIF1TX_BCPF_SHIFT 0 /* AIF1TX_BCPF - [12:0] */
3826 #define ARIZONA_AIF1TX_BCPF_WIDTH 13 /* AIF1TX_BCPF - [12:0] */
3829 * R1286 (0x506) - AIF1 Rx BCLK Rate
3831 #define ARIZONA_AIF1RX_BCPF_MASK 0x1FFF /* AIF1RX_BCPF - [12:0] */
3832 #define ARIZONA_AIF1RX_BCPF_SHIFT 0 /* AIF1RX_BCPF - [12:0] */
3833 #define ARIZONA_AIF1RX_BCPF_WIDTH 13 /* AIF1RX_BCPF - [12:0] */
3836 * R1287 (0x507) - AIF1 Frame Ctrl 1
3838 #define ARIZONA_AIF1TX_WL_MASK 0x3F00 /* AIF1TX_WL - [13:8] */
3841 #define ARIZONA_AIF1TX_SLOT_LEN_MASK 0x00FF /* AIF1TX_SLOT_LEN - [7:0] */
3842 #define ARIZONA_AIF1TX_SLOT_LEN_SHIFT 0 /* AIF1TX_SLOT_LEN - [7:0] */
3843 #define ARIZONA_AIF1TX_SLOT_LEN_WIDTH 8 /* AIF1TX_SLOT_LEN - [7:0] */
3846 * R1288 (0x508) - AIF1 Frame Ctrl 2
3848 #define ARIZONA_AIF1RX_WL_MASK 0x3F00 /* AIF1RX_WL - [13:8] */
3851 #define ARIZONA_AIF1RX_SLOT_LEN_MASK 0x00FF /* AIF1RX_SLOT_LEN - [7:0] */
3852 #define ARIZONA_AIF1RX_SLOT_LEN_SHIFT 0 /* AIF1RX_SLOT_LEN - [7:0] */
3853 #define ARIZONA_AIF1RX_SLOT_LEN_WIDTH 8 /* AIF1RX_SLOT_LEN - [7:0] */
3856 * R1289 (0x509) - AIF1 Frame Ctrl 3
3858 #define ARIZONA_AIF1TX1_SLOT_MASK 0x003F /* AIF1TX1_SLOT - [5:0] */
3859 #define ARIZONA_AIF1TX1_SLOT_SHIFT 0 /* AIF1TX1_SLOT - [5:0] */
3860 #define ARIZONA_AIF1TX1_SLOT_WIDTH 6 /* AIF1TX1_SLOT - [5:0] */
3863 * R1290 (0x50A) - AIF1 Frame Ctrl 4
3865 #define ARIZONA_AIF1TX2_SLOT_MASK 0x003F /* AIF1TX2_SLOT - [5:0] */
3866 #define ARIZONA_AIF1TX2_SLOT_SHIFT 0 /* AIF1TX2_SLOT - [5:0] */
3867 #define ARIZONA_AIF1TX2_SLOT_WIDTH 6 /* AIF1TX2_SLOT - [5:0] */
3870 * R1291 (0x50B) - AIF1 Frame Ctrl 5
3872 #define ARIZONA_AIF1TX3_SLOT_MASK 0x003F /* AIF1TX3_SLOT - [5:0] */
3873 #define ARIZONA_AIF1TX3_SLOT_SHIFT 0 /* AIF1TX3_SLOT - [5:0] */
3874 #define ARIZONA_AIF1TX3_SLOT_WIDTH 6 /* AIF1TX3_SLOT - [5:0] */
3877 * R1292 (0x50C) - AIF1 Frame Ctrl 6
3879 #define ARIZONA_AIF1TX4_SLOT_MASK 0x003F /* AIF1TX4_SLOT - [5:0] */
3880 #define ARIZONA_AIF1TX4_SLOT_SHIFT 0 /* AIF1TX4_SLOT - [5:0] */
3881 #define ARIZONA_AIF1TX4_SLOT_WIDTH 6 /* AIF1TX4_SLOT - [5:0] */
3884 * R1293 (0x50D) - AIF1 Frame Ctrl 7
3886 #define ARIZONA_AIF1TX5_SLOT_MASK 0x003F /* AIF1TX5_SLOT - [5:0] */
3887 #define ARIZONA_AIF1TX5_SLOT_SHIFT 0 /* AIF1TX5_SLOT - [5:0] */
3888 #define ARIZONA_AIF1TX5_SLOT_WIDTH 6 /* AIF1TX5_SLOT - [5:0] */
3891 * R1294 (0x50E) - AIF1 Frame Ctrl 8
3893 #define ARIZONA_AIF1TX6_SLOT_MASK 0x003F /* AIF1TX6_SLOT - [5:0] */
3894 #define ARIZONA_AIF1TX6_SLOT_SHIFT 0 /* AIF1TX6_SLOT - [5:0] */
3895 #define ARIZONA_AIF1TX6_SLOT_WIDTH 6 /* AIF1TX6_SLOT - [5:0] */
3898 * R1295 (0x50F) - AIF1 Frame Ctrl 9
3900 #define ARIZONA_AIF1TX7_SLOT_MASK 0x003F /* AIF1TX7_SLOT - [5:0] */
3901 #define ARIZONA_AIF1TX7_SLOT_SHIFT 0 /* AIF1TX7_SLOT - [5:0] */
3902 #define ARIZONA_AIF1TX7_SLOT_WIDTH 6 /* AIF1TX7_SLOT - [5:0] */
3905 * R1296 (0x510) - AIF1 Frame Ctrl 10
3907 #define ARIZONA_AIF1TX8_SLOT_MASK 0x003F /* AIF1TX8_SLOT - [5:0] */
3908 #define ARIZONA_AIF1TX8_SLOT_SHIFT 0 /* AIF1TX8_SLOT - [5:0] */
3909 #define ARIZONA_AIF1TX8_SLOT_WIDTH 6 /* AIF1TX8_SLOT - [5:0] */
3912 * R1297 (0x511) - AIF1 Frame Ctrl 11
3914 #define ARIZONA_AIF1RX1_SLOT_MASK 0x003F /* AIF1RX1_SLOT - [5:0] */
3915 #define ARIZONA_AIF1RX1_SLOT_SHIFT 0 /* AIF1RX1_SLOT - [5:0] */
3916 #define ARIZONA_AIF1RX1_SLOT_WIDTH 6 /* AIF1RX1_SLOT - [5:0] */
3919 * R1298 (0x512) - AIF1 Frame Ctrl 12
3921 #define ARIZONA_AIF1RX2_SLOT_MASK 0x003F /* AIF1RX2_SLOT - [5:0] */
3922 #define ARIZONA_AIF1RX2_SLOT_SHIFT 0 /* AIF1RX2_SLOT - [5:0] */
3923 #define ARIZONA_AIF1RX2_SLOT_WIDTH 6 /* AIF1RX2_SLOT - [5:0] */
3926 * R1299 (0x513) - AIF1 Frame Ctrl 13
3928 #define ARIZONA_AIF1RX3_SLOT_MASK 0x003F /* AIF1RX3_SLOT - [5:0] */
3929 #define ARIZONA_AIF1RX3_SLOT_SHIFT 0 /* AIF1RX3_SLOT - [5:0] */
3930 #define ARIZONA_AIF1RX3_SLOT_WIDTH 6 /* AIF1RX3_SLOT - [5:0] */
3933 * R1300 (0x514) - AIF1 Frame Ctrl 14
3935 #define ARIZONA_AIF1RX4_SLOT_MASK 0x003F /* AIF1RX4_SLOT - [5:0] */
3936 #define ARIZONA_AIF1RX4_SLOT_SHIFT 0 /* AIF1RX4_SLOT - [5:0] */
3937 #define ARIZONA_AIF1RX4_SLOT_WIDTH 6 /* AIF1RX4_SLOT - [5:0] */
3940 * R1301 (0x515) - AIF1 Frame Ctrl 15
3942 #define ARIZONA_AIF1RX5_SLOT_MASK 0x003F /* AIF1RX5_SLOT - [5:0] */
3943 #define ARIZONA_AIF1RX5_SLOT_SHIFT 0 /* AIF1RX5_SLOT - [5:0] */
3944 #define ARIZONA_AIF1RX5_SLOT_WIDTH 6 /* AIF1RX5_SLOT - [5:0] */
3947 * R1302 (0x516) - AIF1 Frame Ctrl 16
3949 #define ARIZONA_AIF1RX6_SLOT_MASK 0x003F /* AIF1RX6_SLOT - [5:0] */
3950 #define ARIZONA_AIF1RX6_SLOT_SHIFT 0 /* AIF1RX6_SLOT - [5:0] */
3951 #define ARIZONA_AIF1RX6_SLOT_WIDTH 6 /* AIF1RX6_SLOT - [5:0] */
3954 * R1303 (0x517) - AIF1 Frame Ctrl 17
3956 #define ARIZONA_AIF1RX7_SLOT_MASK 0x003F /* AIF1RX7_SLOT - [5:0] */
3957 #define ARIZONA_AIF1RX7_SLOT_SHIFT 0 /* AIF1RX7_SLOT - [5:0] */
3958 #define ARIZONA_AIF1RX7_SLOT_WIDTH 6 /* AIF1RX7_SLOT - [5:0] */
3961 * R1304 (0x518) - AIF1 Frame Ctrl 18
3963 #define ARIZONA_AIF1RX8_SLOT_MASK 0x003F /* AIF1RX8_SLOT - [5:0] */
3964 #define ARIZONA_AIF1RX8_SLOT_SHIFT 0 /* AIF1RX8_SLOT - [5:0] */
3965 #define ARIZONA_AIF1RX8_SLOT_WIDTH 6 /* AIF1RX8_SLOT - [5:0] */
3968 * R1305 (0x519) - AIF1 Tx Enables
3970 #define ARIZONA_AIF1TX8_ENA 0x0080 /* AIF1TX8_ENA */
3971 #define ARIZONA_AIF1TX8_ENA_MASK 0x0080 /* AIF1TX8_ENA */
3974 #define ARIZONA_AIF1TX7_ENA 0x0040 /* AIF1TX7_ENA */
3975 #define ARIZONA_AIF1TX7_ENA_MASK 0x0040 /* AIF1TX7_ENA */
3978 #define ARIZONA_AIF1TX6_ENA 0x0020 /* AIF1TX6_ENA */
3979 #define ARIZONA_AIF1TX6_ENA_MASK 0x0020 /* AIF1TX6_ENA */
3982 #define ARIZONA_AIF1TX5_ENA 0x0010 /* AIF1TX5_ENA */
3983 #define ARIZONA_AIF1TX5_ENA_MASK 0x0010 /* AIF1TX5_ENA */
3986 #define ARIZONA_AIF1TX4_ENA 0x0008 /* AIF1TX4_ENA */
3987 #define ARIZONA_AIF1TX4_ENA_MASK 0x0008 /* AIF1TX4_ENA */
3990 #define ARIZONA_AIF1TX3_ENA 0x0004 /* AIF1TX3_ENA */
3991 #define ARIZONA_AIF1TX3_ENA_MASK 0x0004 /* AIF1TX3_ENA */
3994 #define ARIZONA_AIF1TX2_ENA 0x0002 /* AIF1TX2_ENA */
3995 #define ARIZONA_AIF1TX2_ENA_MASK 0x0002 /* AIF1TX2_ENA */
3998 #define ARIZONA_AIF1TX1_ENA 0x0001 /* AIF1TX1_ENA */
3999 #define ARIZONA_AIF1TX1_ENA_MASK 0x0001 /* AIF1TX1_ENA */
4000 #define ARIZONA_AIF1TX1_ENA_SHIFT 0 /* AIF1TX1_ENA */
4004 * R1306 (0x51A) - AIF1 Rx Enables
4006 #define ARIZONA_AIF1RX8_ENA 0x0080 /* AIF1RX8_ENA */
4007 #define ARIZONA_AIF1RX8_ENA_MASK 0x0080 /* AIF1RX8_ENA */
4010 #define ARIZONA_AIF1RX7_ENA 0x0040 /* AIF1RX7_ENA */
4011 #define ARIZONA_AIF1RX7_ENA_MASK 0x0040 /* AIF1RX7_ENA */
4014 #define ARIZONA_AIF1RX6_ENA 0x0020 /* AIF1RX6_ENA */
4015 #define ARIZONA_AIF1RX6_ENA_MASK 0x0020 /* AIF1RX6_ENA */
4018 #define ARIZONA_AIF1RX5_ENA 0x0010 /* AIF1RX5_ENA */
4019 #define ARIZONA_AIF1RX5_ENA_MASK 0x0010 /* AIF1RX5_ENA */
4022 #define ARIZONA_AIF1RX4_ENA 0x0008 /* AIF1RX4_ENA */
4023 #define ARIZONA_AIF1RX4_ENA_MASK 0x0008 /* AIF1RX4_ENA */
4026 #define ARIZONA_AIF1RX3_ENA 0x0004 /* AIF1RX3_ENA */
4027 #define ARIZONA_AIF1RX3_ENA_MASK 0x0004 /* AIF1RX3_ENA */
4030 #define ARIZONA_AIF1RX2_ENA 0x0002 /* AIF1RX2_ENA */
4031 #define ARIZONA_AIF1RX2_ENA_MASK 0x0002 /* AIF1RX2_ENA */
4034 #define ARIZONA_AIF1RX1_ENA 0x0001 /* AIF1RX1_ENA */
4035 #define ARIZONA_AIF1RX1_ENA_MASK 0x0001 /* AIF1RX1_ENA */
4036 #define ARIZONA_AIF1RX1_ENA_SHIFT 0 /* AIF1RX1_ENA */
4040 * R1307 (0x51B) - AIF1 Force Write
4042 #define ARIZONA_AIF1_FRC_WR 0x0001 /* AIF1_FRC_WR */
4043 #define ARIZONA_AIF1_FRC_WR_MASK 0x0001 /* AIF1_FRC_WR */
4044 #define ARIZONA_AIF1_FRC_WR_SHIFT 0 /* AIF1_FRC_WR */
4048 * R1344 (0x540) - AIF2 BCLK Ctrl
4050 #define ARIZONA_AIF2_BCLK_INV 0x0080 /* AIF2_BCLK_INV */
4051 #define ARIZONA_AIF2_BCLK_INV_MASK 0x0080 /* AIF2_BCLK_INV */
4054 #define ARIZONA_AIF2_BCLK_FRC 0x0040 /* AIF2_BCLK_FRC */
4055 #define ARIZONA_AIF2_BCLK_FRC_MASK 0x0040 /* AIF2_BCLK_FRC */
4058 #define ARIZONA_AIF2_BCLK_MSTR 0x0020 /* AIF2_BCLK_MSTR */
4059 #define ARIZONA_AIF2_BCLK_MSTR_MASK 0x0020 /* AIF2_BCLK_MSTR */
4062 #define ARIZONA_AIF2_BCLK_FREQ_MASK 0x001F /* AIF2_BCLK_FREQ - [4:0] */
4063 #define ARIZONA_AIF2_BCLK_FREQ_SHIFT 0 /* AIF2_BCLK_FREQ - [4:0] */
4064 #define ARIZONA_AIF2_BCLK_FREQ_WIDTH 5 /* AIF2_BCLK_FREQ - [4:0] */
4067 * R1345 (0x541) - AIF2 Tx Pin Ctrl
4069 #define ARIZONA_AIF2TX_DAT_TRI 0x0020 /* AIF2TX_DAT_TRI */
4070 #define ARIZONA_AIF2TX_DAT_TRI_MASK 0x0020 /* AIF2TX_DAT_TRI */
4073 #define ARIZONA_AIF2TX_LRCLK_SRC 0x0008 /* AIF2TX_LRCLK_SRC */
4074 #define ARIZONA_AIF2TX_LRCLK_SRC_MASK 0x0008 /* AIF2TX_LRCLK_SRC */
4077 #define ARIZONA_AIF2TX_LRCLK_INV 0x0004 /* AIF2TX_LRCLK_INV */
4078 #define ARIZONA_AIF2TX_LRCLK_INV_MASK 0x0004 /* AIF2TX_LRCLK_INV */
4081 #define ARIZONA_AIF2TX_LRCLK_FRC 0x0002 /* AIF2TX_LRCLK_FRC */
4082 #define ARIZONA_AIF2TX_LRCLK_FRC_MASK 0x0002 /* AIF2TX_LRCLK_FRC */
4085 #define ARIZONA_AIF2TX_LRCLK_MSTR 0x0001 /* AIF2TX_LRCLK_MSTR */
4086 #define ARIZONA_AIF2TX_LRCLK_MSTR_MASK 0x0001 /* AIF2TX_LRCLK_MSTR */
4087 #define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT 0 /* AIF2TX_LRCLK_MSTR */
4091 * R1346 (0x542) - AIF2 Rx Pin Ctrl
4093 #define ARIZONA_AIF2RX_LRCLK_INV 0x0004 /* AIF2RX_LRCLK_INV */
4094 #define ARIZONA_AIF2RX_LRCLK_INV_MASK 0x0004 /* AIF2RX_LRCLK_INV */
4097 #define ARIZONA_AIF2RX_LRCLK_FRC 0x0002 /* AIF2RX_LRCLK_FRC */
4098 #define ARIZONA_AIF2RX_LRCLK_FRC_MASK 0x0002 /* AIF2RX_LRCLK_FRC */
4101 #define ARIZONA_AIF2RX_LRCLK_MSTR 0x0001 /* AIF2RX_LRCLK_MSTR */
4102 #define ARIZONA_AIF2RX_LRCLK_MSTR_MASK 0x0001 /* AIF2RX_LRCLK_MSTR */
4103 #define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT 0 /* AIF2RX_LRCLK_MSTR */
4107 * R1347 (0x543) - AIF2 Rate Ctrl
4109 #define ARIZONA_AIF2_RATE_MASK 0x7800 /* AIF2_RATE - [14:11] */
4112 #define ARIZONA_AIF2_TRI 0x0040 /* AIF2_TRI */
4113 #define ARIZONA_AIF2_TRI_MASK 0x0040 /* AIF2_TRI */
4118 * R1348 (0x544) - AIF2 Format
4120 #define ARIZONA_AIF2_FMT_MASK 0x0007 /* AIF2_FMT - [2:0] */
4121 #define ARIZONA_AIF2_FMT_SHIFT 0 /* AIF2_FMT - [2:0] */
4122 #define ARIZONA_AIF2_FMT_WIDTH 3 /* AIF2_FMT - [2:0] */
4125 * R1349 (0x545) - AIF2 Tx BCLK Rate
4127 #define ARIZONA_AIF2TX_BCPF_MASK 0x1FFF /* AIF2TX_BCPF - [12:0] */
4128 #define ARIZONA_AIF2TX_BCPF_SHIFT 0 /* AIF2TX_BCPF - [12:0] */
4129 #define ARIZONA_AIF2TX_BCPF_WIDTH 13 /* AIF2TX_BCPF - [12:0] */
4132 * R1350 (0x546) - AIF2 Rx BCLK Rate
4134 #define ARIZONA_AIF2RX_BCPF_MASK 0x1FFF /* AIF2RX_BCPF - [12:0] */
4135 #define ARIZONA_AIF2RX_BCPF_SHIFT 0 /* AIF2RX_BCPF - [12:0] */
4136 #define ARIZONA_AIF2RX_BCPF_WIDTH 13 /* AIF2RX_BCPF - [12:0] */
4139 * R1351 (0x547) - AIF2 Frame Ctrl 1
4141 #define ARIZONA_AIF2TX_WL_MASK 0x3F00 /* AIF2TX_WL - [13:8] */
4144 #define ARIZONA_AIF2TX_SLOT_LEN_MASK 0x00FF /* AIF2TX_SLOT_LEN - [7:0] */
4145 #define ARIZONA_AIF2TX_SLOT_LEN_SHIFT 0 /* AIF2TX_SLOT_LEN - [7:0] */
4146 #define ARIZONA_AIF2TX_SLOT_LEN_WIDTH 8 /* AIF2TX_SLOT_LEN - [7:0] */
4149 * R1352 (0x548) - AIF2 Frame Ctrl 2
4151 #define ARIZONA_AIF2RX_WL_MASK 0x3F00 /* AIF2RX_WL - [13:8] */
4154 #define ARIZONA_AIF2RX_SLOT_LEN_MASK 0x00FF /* AIF2RX_SLOT_LEN - [7:0] */
4155 #define ARIZONA_AIF2RX_SLOT_LEN_SHIFT 0 /* AIF2RX_SLOT_LEN - [7:0] */
4156 #define ARIZONA_AIF2RX_SLOT_LEN_WIDTH 8 /* AIF2RX_SLOT_LEN - [7:0] */
4159 * R1353 (0x549) - AIF2 Frame Ctrl 3
4161 #define ARIZONA_AIF2TX1_SLOT_MASK 0x003F /* AIF2TX1_SLOT - [5:0] */
4162 #define ARIZONA_AIF2TX1_SLOT_SHIFT 0 /* AIF2TX1_SLOT - [5:0] */
4163 #define ARIZONA_AIF2TX1_SLOT_WIDTH 6 /* AIF2TX1_SLOT - [5:0] */
4166 * R1354 (0x54A) - AIF2 Frame Ctrl 4
4168 #define ARIZONA_AIF2TX2_SLOT_MASK 0x003F /* AIF2TX2_SLOT - [5:0] */
4169 #define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */
4170 #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */
4173 * R1355 (0x54B) - AIF2 Frame Ctrl 5
4175 #define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */
4176 #define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */
4177 #define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */
4180 * R1356 (0x54C) - AIF2 Frame Ctrl 6
4182 #define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */
4183 #define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */
4184 #define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */
4188 * R1357 (0x54D) - AIF2 Frame Ctrl 7
4190 #define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */
4191 #define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */
4192 #define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */
4195 * R1358 (0x54E) - AIF2 Frame Ctrl 8
4197 #define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */
4198 #define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */
4199 #define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */
4202 * R1361 (0x551) - AIF2 Frame Ctrl 11
4204 #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */
4205 #define ARIZONA_AIF2RX1_SLOT_SHIFT 0 /* AIF2RX1_SLOT - [5:0] */
4206 #define ARIZONA_AIF2RX1_SLOT_WIDTH 6 /* AIF2RX1_SLOT - [5:0] */
4209 * R1362 (0x552) - AIF2 Frame Ctrl 12
4211 #define ARIZONA_AIF2RX2_SLOT_MASK 0x003F /* AIF2RX2_SLOT - [5:0] */
4212 #define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */
4213 #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */
4216 * R1363 (0x553) - AIF2 Frame Ctrl 13
4218 #define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */
4219 #define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */
4220 #define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */
4223 * R1364 (0x554) - AIF2 Frame Ctrl 14
4225 #define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */
4226 #define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */
4227 #define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */
4230 * R1365 (0x555) - AIF2 Frame Ctrl 15
4232 #define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */
4233 #define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */
4234 #define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */
4237 * R1366 (0x556) - AIF2 Frame Ctrl 16
4239 #define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */
4240 #define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */
4241 #define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */
4244 * R1369 (0x559) - AIF2 Tx Enables
4246 #define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */
4247 #define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */
4250 #define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */
4251 #define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */
4254 #define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */
4255 #define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */
4258 #define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */
4259 #define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */
4262 #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */
4263 #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */
4266 #define ARIZONA_AIF2TX1_ENA 0x0001 /* AIF2TX1_ENA */
4267 #define ARIZONA_AIF2TX1_ENA_MASK 0x0001 /* AIF2TX1_ENA */
4268 #define ARIZONA_AIF2TX1_ENA_SHIFT 0 /* AIF2TX1_ENA */
4272 * R1370 (0x55A) - AIF2 Rx Enables
4274 #define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */
4275 #define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */
4278 #define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */
4279 #define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */
4282 #define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */
4283 #define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */
4286 #define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */
4287 #define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */
4290 #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */
4291 #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */
4294 #define ARIZONA_AIF2RX1_ENA 0x0001 /* AIF2RX1_ENA */
4295 #define ARIZONA_AIF2RX1_ENA_MASK 0x0001 /* AIF2RX1_ENA */
4296 #define ARIZONA_AIF2RX1_ENA_SHIFT 0 /* AIF2RX1_ENA */
4300 * R1371 (0x55B) - AIF2 Force Write
4302 #define ARIZONA_AIF2_FRC_WR 0x0001 /* AIF2_FRC_WR */
4303 #define ARIZONA_AIF2_FRC_WR_MASK 0x0001 /* AIF2_FRC_WR */
4304 #define ARIZONA_AIF2_FRC_WR_SHIFT 0 /* AIF2_FRC_WR */
4308 * R1408 (0x580) - AIF3 BCLK Ctrl
4310 #define ARIZONA_AIF3_BCLK_INV 0x0080 /* AIF3_BCLK_INV */
4311 #define ARIZONA_AIF3_BCLK_INV_MASK 0x0080 /* AIF3_BCLK_INV */
4314 #define ARIZONA_AIF3_BCLK_FRC 0x0040 /* AIF3_BCLK_FRC */
4315 #define ARIZONA_AIF3_BCLK_FRC_MASK 0x0040 /* AIF3_BCLK_FRC */
4318 #define ARIZONA_AIF3_BCLK_MSTR 0x0020 /* AIF3_BCLK_MSTR */
4319 #define ARIZONA_AIF3_BCLK_MSTR_MASK 0x0020 /* AIF3_BCLK_MSTR */
4322 #define ARIZONA_AIF3_BCLK_FREQ_MASK 0x001F /* AIF3_BCLK_FREQ - [4:0] */
4323 #define ARIZONA_AIF3_BCLK_FREQ_SHIFT 0 /* AIF3_BCLK_FREQ - [4:0] */
4324 #define ARIZONA_AIF3_BCLK_FREQ_WIDTH 5 /* AIF3_BCLK_FREQ - [4:0] */
4327 * R1409 (0x581) - AIF3 Tx Pin Ctrl
4329 #define ARIZONA_AIF3TX_DAT_TRI 0x0020 /* AIF3TX_DAT_TRI */
4330 #define ARIZONA_AIF3TX_DAT_TRI_MASK 0x0020 /* AIF3TX_DAT_TRI */
4333 #define ARIZONA_AIF3TX_LRCLK_SRC 0x0008 /* AIF3TX_LRCLK_SRC */
4334 #define ARIZONA_AIF3TX_LRCLK_SRC_MASK 0x0008 /* AIF3TX_LRCLK_SRC */
4337 #define ARIZONA_AIF3TX_LRCLK_INV 0x0004 /* AIF3TX_LRCLK_INV */
4338 #define ARIZONA_AIF3TX_LRCLK_INV_MASK 0x0004 /* AIF3TX_LRCLK_INV */
4341 #define ARIZONA_AIF3TX_LRCLK_FRC 0x0002 /* AIF3TX_LRCLK_FRC */
4342 #define ARIZONA_AIF3TX_LRCLK_FRC_MASK 0x0002 /* AIF3TX_LRCLK_FRC */
4345 #define ARIZONA_AIF3TX_LRCLK_MSTR 0x0001 /* AIF3TX_LRCLK_MSTR */
4346 #define ARIZONA_AIF3TX_LRCLK_MSTR_MASK 0x0001 /* AIF3TX_LRCLK_MSTR */
4347 #define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT 0 /* AIF3TX_LRCLK_MSTR */
4351 * R1410 (0x582) - AIF3 Rx Pin Ctrl
4353 #define ARIZONA_AIF3RX_LRCLK_INV 0x0004 /* AIF3RX_LRCLK_INV */
4354 #define ARIZONA_AIF3RX_LRCLK_INV_MASK 0x0004 /* AIF3RX_LRCLK_INV */
4357 #define ARIZONA_AIF3RX_LRCLK_FRC 0x0002 /* AIF3RX_LRCLK_FRC */
4358 #define ARIZONA_AIF3RX_LRCLK_FRC_MASK 0x0002 /* AIF3RX_LRCLK_FRC */
4361 #define ARIZONA_AIF3RX_LRCLK_MSTR 0x0001 /* AIF3RX_LRCLK_MSTR */
4362 #define ARIZONA_AIF3RX_LRCLK_MSTR_MASK 0x0001 /* AIF3RX_LRCLK_MSTR */
4363 #define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT 0 /* AIF3RX_LRCLK_MSTR */
4367 * R1411 (0x583) - AIF3 Rate Ctrl
4369 #define ARIZONA_AIF3_RATE_MASK 0x7800 /* AIF3_RATE - [14:11] */
4372 #define ARIZONA_AIF3_TRI 0x0040 /* AIF3_TRI */
4373 #define ARIZONA_AIF3_TRI_MASK 0x0040 /* AIF3_TRI */
4378 * R1412 (0x584) - AIF3 Format
4380 #define ARIZONA_AIF3_FMT_MASK 0x0007 /* AIF3_FMT - [2:0] */
4381 #define ARIZONA_AIF3_FMT_SHIFT 0 /* AIF3_FMT - [2:0] */
4382 #define ARIZONA_AIF3_FMT_WIDTH 3 /* AIF3_FMT - [2:0] */
4385 * R1413 (0x585) - AIF3 Tx BCLK Rate
4387 #define ARIZONA_AIF3TX_BCPF_MASK 0x1FFF /* AIF3TX_BCPF - [12:0] */
4388 #define ARIZONA_AIF3TX_BCPF_SHIFT 0 /* AIF3TX_BCPF - [12:0] */
4389 #define ARIZONA_AIF3TX_BCPF_WIDTH 13 /* AIF3TX_BCPF - [12:0] */
4392 * R1414 (0x586) - AIF3 Rx BCLK Rate
4394 #define ARIZONA_AIF3RX_BCPF_MASK 0x1FFF /* AIF3RX_BCPF - [12:0] */
4395 #define ARIZONA_AIF3RX_BCPF_SHIFT 0 /* AIF3RX_BCPF - [12:0] */
4396 #define ARIZONA_AIF3RX_BCPF_WIDTH 13 /* AIF3RX_BCPF - [12:0] */
4399 * R1415 (0x587) - AIF3 Frame Ctrl 1
4401 #define ARIZONA_AIF3TX_WL_MASK 0x3F00 /* AIF3TX_WL - [13:8] */
4404 #define ARIZONA_AIF3TX_SLOT_LEN_MASK 0x00FF /* AIF3TX_SLOT_LEN - [7:0] */
4405 #define ARIZONA_AIF3TX_SLOT_LEN_SHIFT 0 /* AIF3TX_SLOT_LEN - [7:0] */
4406 #define ARIZONA_AIF3TX_SLOT_LEN_WIDTH 8 /* AIF3TX_SLOT_LEN - [7:0] */
4409 * R1416 (0x588) - AIF3 Frame Ctrl 2
4411 #define ARIZONA_AIF3RX_WL_MASK 0x3F00 /* AIF3RX_WL - [13:8] */
4414 #define ARIZONA_AIF3RX_SLOT_LEN_MASK 0x00FF /* AIF3RX_SLOT_LEN - [7:0] */
4415 #define ARIZONA_AIF3RX_SLOT_LEN_SHIFT 0 /* AIF3RX_SLOT_LEN - [7:0] */
4416 #define ARIZONA_AIF3RX_SLOT_LEN_WIDTH 8 /* AIF3RX_SLOT_LEN - [7:0] */
4419 * R1417 (0x589) - AIF3 Frame Ctrl 3
4421 #define ARIZONA_AIF3TX1_SLOT_MASK 0x003F /* AIF3TX1_SLOT - [5:0] */
4422 #define ARIZONA_AIF3TX1_SLOT_SHIFT 0 /* AIF3TX1_SLOT - [5:0] */
4423 #define ARIZONA_AIF3TX1_SLOT_WIDTH 6 /* AIF3TX1_SLOT - [5:0] */
4426 * R1418 (0x58A) - AIF3 Frame Ctrl 4
4428 #define ARIZONA_AIF3TX2_SLOT_MASK 0x003F /* AIF3TX2_SLOT - [5:0] */
4429 #define ARIZONA_AIF3TX2_SLOT_SHIFT 0 /* AIF3TX2_SLOT - [5:0] */
4430 #define ARIZONA_AIF3TX2_SLOT_WIDTH 6 /* AIF3TX2_SLOT - [5:0] */
4433 * R1425 (0x591) - AIF3 Frame Ctrl 11
4435 #define ARIZONA_AIF3RX1_SLOT_MASK 0x003F /* AIF3RX1_SLOT - [5:0] */
4436 #define ARIZONA_AIF3RX1_SLOT_SHIFT 0 /* AIF3RX1_SLOT - [5:0] */
4437 #define ARIZONA_AIF3RX1_SLOT_WIDTH 6 /* AIF3RX1_SLOT - [5:0] */
4440 * R1426 (0x592) - AIF3 Frame Ctrl 12
4442 #define ARIZONA_AIF3RX2_SLOT_MASK 0x003F /* AIF3RX2_SLOT - [5:0] */
4443 #define ARIZONA_AIF3RX2_SLOT_SHIFT 0 /* AIF3RX2_SLOT - [5:0] */
4444 #define ARIZONA_AIF3RX2_SLOT_WIDTH 6 /* AIF3RX2_SLOT - [5:0] */
4447 * R1433 (0x599) - AIF3 Tx Enables
4449 #define ARIZONA_AIF3TX2_ENA 0x0002 /* AIF3TX2_ENA */
4450 #define ARIZONA_AIF3TX2_ENA_MASK 0x0002 /* AIF3TX2_ENA */
4453 #define ARIZONA_AIF3TX1_ENA 0x0001 /* AIF3TX1_ENA */
4454 #define ARIZONA_AIF3TX1_ENA_MASK 0x0001 /* AIF3TX1_ENA */
4455 #define ARIZONA_AIF3TX1_ENA_SHIFT 0 /* AIF3TX1_ENA */
4459 * R1434 (0x59A) - AIF3 Rx Enables
4461 #define ARIZONA_AIF3RX2_ENA 0x0002 /* AIF3RX2_ENA */
4462 #define ARIZONA_AIF3RX2_ENA_MASK 0x0002 /* AIF3RX2_ENA */
4465 #define ARIZONA_AIF3RX1_ENA 0x0001 /* AIF3RX1_ENA */
4466 #define ARIZONA_AIF3RX1_ENA_MASK 0x0001 /* AIF3RX1_ENA */
4467 #define ARIZONA_AIF3RX1_ENA_SHIFT 0 /* AIF3RX1_ENA */
4471 * R1435 (0x59B) - AIF3 Force Write
4473 #define ARIZONA_AIF3_FRC_WR 0x0001 /* AIF3_FRC_WR */
4474 #define ARIZONA_AIF3_FRC_WR_MASK 0x0001 /* AIF3_FRC_WR */
4475 #define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */
4479 * R1474 (0x5C2) - SPD1 TX Control
4481 #define ARIZONA_SPD1_VAL2 0x2000 /* SPD1_VAL2 */
4482 #define ARIZONA_SPD1_VAL2_MASK 0x2000 /* SPD1_VAL2 */
4485 #define ARIZONA_SPD1_VAL1 0x1000 /* SPD1_VAL1 */
4486 #define ARIZONA_SPD1_VAL1_MASK 0x1000 /* SPD1_VAL1 */
4489 #define ARIZONA_SPD1_RATE_MASK 0x00F0 /* SPD1_RATE */
4492 #define ARIZONA_SPD1_ENA 0x0001 /* SPD1_ENA */
4493 #define ARIZONA_SPD1_ENA_MASK 0x0001 /* SPD1_ENA */
4494 #define ARIZONA_SPD1_ENA_SHIFT 0 /* SPD1_ENA */
4498 * R1475 (0x5C3) - SPD1 TX Channel Status 1
4500 #define ARIZONA_SPD1_CATCODE_MASK 0xFF00 /* SPD1_CATCODE */
4503 #define ARIZONA_SPD1_CHSTMODE_MASK 0x00C0 /* SPD1_CHSTMODE */
4506 #define ARIZONA_SPD1_PREEMPH_MASK 0x0038 /* SPD1_PREEMPH */
4509 #define ARIZONA_SPD1_NOCOPY 0x0004 /* SPD1_NOCOPY */
4510 #define ARIZONA_SPD1_NOCOPY_MASK 0x0004 /* SPD1_NOCOPY */
4513 #define ARIZONA_SPD1_NOAUDIO 0x0002 /* SPD1_NOAUDIO */
4514 #define ARIZONA_SPD1_NOAUDIO_MASK 0x0002 /* SPD1_NOAUDIO */
4517 #define ARIZONA_SPD1_PRO 0x0001 /* SPD1_PRO */
4518 #define ARIZONA_SPD1_PRO_MASK 0x0001 /* SPD1_PRO */
4519 #define ARIZONA_SPD1_PRO_SHIFT 0 /* SPD1_PRO */
4523 * R1475 (0x5C4) - SPD1 TX Channel Status 2
4525 #define ARIZONA_SPD1_FREQ_MASK 0xF000 /* SPD1_FREQ */
4528 #define ARIZONA_SPD1_CHNUM2_MASK 0x0F00 /* SPD1_CHNUM2 */
4531 #define ARIZONA_SPD1_CHNUM1_MASK 0x00F0 /* SPD1_CHNUM1 */
4534 #define ARIZONA_SPD1_SRCNUM_MASK 0x000F /* SPD1_SRCNUM */
4535 #define ARIZONA_SPD1_SRCNUM_SHIFT 0 /* SPD1_SRCNUM */
4539 * R1475 (0x5C5) - SPD1 TX Channel Status 3
4541 #define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */
4544 #define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */
4547 #define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */
4548 #define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */
4551 #define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */
4554 #define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */
4556 #define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */
4559 * R1507 (0x5E3) - SLIMbus Framer Ref Gear
4561 #define ARIZONA_SLIMCLK_SRC 0x0010 /* SLIMCLK_SRC */
4562 #define ARIZONA_SLIMCLK_SRC_MASK 0x0010 /* SLIMCLK_SRC */
4565 #define ARIZONA_FRAMER_REF_GEAR_MASK 0x000F /* FRAMER_REF_GEAR - [3:0] */
4566 #define ARIZONA_FRAMER_REF_GEAR_SHIFT 0 /* FRAMER_REF_GEAR - [3:0] */
4567 #define ARIZONA_FRAMER_REF_GEAR_WIDTH 4 /* FRAMER_REF_GEAR - [3:0] */
4570 * R1509 (0x5E5) - SLIMbus Rates 1
4572 #define ARIZONA_SLIMRX2_RATE_MASK 0x7800 /* SLIMRX2_RATE - [14:11] */
4575 #define ARIZONA_SLIMRX1_RATE_MASK 0x0078 /* SLIMRX1_RATE - [6:3] */
4580 * R1510 (0x5E6) - SLIMbus Rates 2
4582 #define ARIZONA_SLIMRX4_RATE_MASK 0x7800 /* SLIMRX4_RATE - [14:11] */
4585 #define ARIZONA_SLIMRX3_RATE_MASK 0x0078 /* SLIMRX3_RATE - [6:3] */
4590 * R1511 (0x5E7) - SLIMbus Rates 3
4592 #define ARIZONA_SLIMRX6_RATE_MASK 0x7800 /* SLIMRX6_RATE - [14:11] */
4595 #define ARIZONA_SLIMRX5_RATE_MASK 0x0078 /* SLIMRX5_RATE - [6:3] */
4600 * R1512 (0x5E8) - SLIMbus Rates 4
4602 #define ARIZONA_SLIMRX8_RATE_MASK 0x7800 /* SLIMRX8_RATE - [14:11] */
4605 #define ARIZONA_SLIMRX7_RATE_MASK 0x0078 /* SLIMRX7_RATE - [6:3] */
4610 * R1513 (0x5E9) - SLIMbus Rates 5
4612 #define ARIZONA_SLIMTX2_RATE_MASK 0x7800 /* SLIMTX2_RATE - [14:11] */
4615 #define ARIZONA_SLIMTX1_RATE_MASK 0x0078 /* SLIMTX1_RATE - [6:3] */
4620 * R1514 (0x5EA) - SLIMbus Rates 6
4622 #define ARIZONA_SLIMTX4_RATE_MASK 0x7800 /* SLIMTX4_RATE - [14:11] */
4625 #define ARIZONA_SLIMTX3_RATE_MASK 0x0078 /* SLIMTX3_RATE - [6:3] */
4630 * R1515 (0x5EB) - SLIMbus Rates 7
4632 #define ARIZONA_SLIMTX6_RATE_MASK 0x7800 /* SLIMTX6_RATE - [14:11] */
4635 #define ARIZONA_SLIMTX5_RATE_MASK 0x0078 /* SLIMTX5_RATE - [6:3] */
4640 * R1516 (0x5EC) - SLIMbus Rates 8
4642 #define ARIZONA_SLIMTX8_RATE_MASK 0x7800 /* SLIMTX8_RATE - [14:11] */
4645 #define ARIZONA_SLIMTX7_RATE_MASK 0x0078 /* SLIMTX7_RATE - [6:3] */
4650 * R1525 (0x5F5) - SLIMbus RX Channel Enable
4652 #define ARIZONA_SLIMRX8_ENA 0x0080 /* SLIMRX8_ENA */
4653 #define ARIZONA_SLIMRX8_ENA_MASK 0x0080 /* SLIMRX8_ENA */
4656 #define ARIZONA_SLIMRX7_ENA 0x0040 /* SLIMRX7_ENA */
4657 #define ARIZONA_SLIMRX7_ENA_MASK 0x0040 /* SLIMRX7_ENA */
4660 #define ARIZONA_SLIMRX6_ENA 0x0020 /* SLIMRX6_ENA */
4661 #define ARIZONA_SLIMRX6_ENA_MASK 0x0020 /* SLIMRX6_ENA */
4664 #define ARIZONA_SLIMRX5_ENA 0x0010 /* SLIMRX5_ENA */
4665 #define ARIZONA_SLIMRX5_ENA_MASK 0x0010 /* SLIMRX5_ENA */
4668 #define ARIZONA_SLIMRX4_ENA 0x0008 /* SLIMRX4_ENA */
4669 #define ARIZONA_SLIMRX4_ENA_MASK 0x0008 /* SLIMRX4_ENA */
4672 #define ARIZONA_SLIMRX3_ENA 0x0004 /* SLIMRX3_ENA */
4673 #define ARIZONA_SLIMRX3_ENA_MASK 0x0004 /* SLIMRX3_ENA */
4676 #define ARIZONA_SLIMRX2_ENA 0x0002 /* SLIMRX2_ENA */
4677 #define ARIZONA_SLIMRX2_ENA_MASK 0x0002 /* SLIMRX2_ENA */
4680 #define ARIZONA_SLIMRX1_ENA 0x0001 /* SLIMRX1_ENA */
4681 #define ARIZONA_SLIMRX1_ENA_MASK 0x0001 /* SLIMRX1_ENA */
4682 #define ARIZONA_SLIMRX1_ENA_SHIFT 0 /* SLIMRX1_ENA */
4686 * R1526 (0x5F6) - SLIMbus TX Channel Enable
4688 #define ARIZONA_SLIMTX8_ENA 0x0080 /* SLIMTX8_ENA */
4689 #define ARIZONA_SLIMTX8_ENA_MASK 0x0080 /* SLIMTX8_ENA */
4692 #define ARIZONA_SLIMTX7_ENA 0x0040 /* SLIMTX7_ENA */
4693 #define ARIZONA_SLIMTX7_ENA_MASK 0x0040 /* SLIMTX7_ENA */
4696 #define ARIZONA_SLIMTX6_ENA 0x0020 /* SLIMTX6_ENA */
4697 #define ARIZONA_SLIMTX6_ENA_MASK 0x0020 /* SLIMTX6_ENA */
4700 #define ARIZONA_SLIMTX5_ENA 0x0010 /* SLIMTX5_ENA */
4701 #define ARIZONA_SLIMTX5_ENA_MASK 0x0010 /* SLIMTX5_ENA */
4704 #define ARIZONA_SLIMTX4_ENA 0x0008 /* SLIMTX4_ENA */
4705 #define ARIZONA_SLIMTX4_ENA_MASK 0x0008 /* SLIMTX4_ENA */
4708 #define ARIZONA_SLIMTX3_ENA 0x0004 /* SLIMTX3_ENA */
4709 #define ARIZONA_SLIMTX3_ENA_MASK 0x0004 /* SLIMTX3_ENA */
4712 #define ARIZONA_SLIMTX2_ENA 0x0002 /* SLIMTX2_ENA */
4713 #define ARIZONA_SLIMTX2_ENA_MASK 0x0002 /* SLIMTX2_ENA */
4716 #define ARIZONA_SLIMTX1_ENA 0x0001 /* SLIMTX1_ENA */
4717 #define ARIZONA_SLIMTX1_ENA_MASK 0x0001 /* SLIMTX1_ENA */
4718 #define ARIZONA_SLIMTX1_ENA_SHIFT 0 /* SLIMTX1_ENA */
4722 * R1527 (0x5F7) - SLIMbus RX Port Status
4724 #define ARIZONA_SLIMRX8_PORT_STS 0x0080 /* SLIMRX8_PORT_STS */
4725 #define ARIZONA_SLIMRX8_PORT_STS_MASK 0x0080 /* SLIMRX8_PORT_STS */
4728 #define ARIZONA_SLIMRX7_PORT_STS 0x0040 /* SLIMRX7_PORT_STS */
4729 #define ARIZONA_SLIMRX7_PORT_STS_MASK 0x0040 /* SLIMRX7_PORT_STS */
4732 #define ARIZONA_SLIMRX6_PORT_STS 0x0020 /* SLIMRX6_PORT_STS */
4733 #define ARIZONA_SLIMRX6_PORT_STS_MASK 0x0020 /* SLIMRX6_PORT_STS */
4736 #define ARIZONA_SLIMRX5_PORT_STS 0x0010 /* SLIMRX5_PORT_STS */
4737 #define ARIZONA_SLIMRX5_PORT_STS_MASK 0x0010 /* SLIMRX5_PORT_STS */
4740 #define ARIZONA_SLIMRX4_PORT_STS 0x0008 /* SLIMRX4_PORT_STS */
4741 #define ARIZONA_SLIMRX4_PORT_STS_MASK 0x0008 /* SLIMRX4_PORT_STS */
4744 #define ARIZONA_SLIMRX3_PORT_STS 0x0004 /* SLIMRX3_PORT_STS */
4745 #define ARIZONA_SLIMRX3_PORT_STS_MASK 0x0004 /* SLIMRX3_PORT_STS */
4748 #define ARIZONA_SLIMRX2_PORT_STS 0x0002 /* SLIMRX2_PORT_STS */
4749 #define ARIZONA_SLIMRX2_PORT_STS_MASK 0x0002 /* SLIMRX2_PORT_STS */
4752 #define ARIZONA_SLIMRX1_PORT_STS 0x0001 /* SLIMRX1_PORT_STS */
4753 #define ARIZONA_SLIMRX1_PORT_STS_MASK 0x0001 /* SLIMRX1_PORT_STS */
4754 #define ARIZONA_SLIMRX1_PORT_STS_SHIFT 0 /* SLIMRX1_PORT_STS */
4758 * R1528 (0x5F8) - SLIMbus TX Port Status
4760 #define ARIZONA_SLIMTX8_PORT_STS 0x0080 /* SLIMTX8_PORT_STS */
4761 #define ARIZONA_SLIMTX8_PORT_STS_MASK 0x0080 /* SLIMTX8_PORT_STS */
4764 #define ARIZONA_SLIMTX7_PORT_STS 0x0040 /* SLIMTX7_PORT_STS */
4765 #define ARIZONA_SLIMTX7_PORT_STS_MASK 0x0040 /* SLIMTX7_PORT_STS */
4768 #define ARIZONA_SLIMTX6_PORT_STS 0x0020 /* SLIMTX6_PORT_STS */
4769 #define ARIZONA_SLIMTX6_PORT_STS_MASK 0x0020 /* SLIMTX6_PORT_STS */
4772 #define ARIZONA_SLIMTX5_PORT_STS 0x0010 /* SLIMTX5_PORT_STS */
4773 #define ARIZONA_SLIMTX5_PORT_STS_MASK 0x0010 /* SLIMTX5_PORT_STS */
4776 #define ARIZONA_SLIMTX4_PORT_STS 0x0008 /* SLIMTX4_PORT_STS */
4777 #define ARIZONA_SLIMTX4_PORT_STS_MASK 0x0008 /* SLIMTX4_PORT_STS */
4780 #define ARIZONA_SLIMTX3_PORT_STS 0x0004 /* SLIMTX3_PORT_STS */
4781 #define ARIZONA_SLIMTX3_PORT_STS_MASK 0x0004 /* SLIMTX3_PORT_STS */
4784 #define ARIZONA_SLIMTX2_PORT_STS 0x0002 /* SLIMTX2_PORT_STS */
4785 #define ARIZONA_SLIMTX2_PORT_STS_MASK 0x0002 /* SLIMTX2_PORT_STS */
4788 #define ARIZONA_SLIMTX1_PORT_STS 0x0001 /* SLIMTX1_PORT_STS */
4789 #define ARIZONA_SLIMTX1_PORT_STS_MASK 0x0001 /* SLIMTX1_PORT_STS */
4790 #define ARIZONA_SLIMTX1_PORT_STS_SHIFT 0 /* SLIMTX1_PORT_STS */
4794 * R3087 (0xC0F) - IRQ CTRL 1
4796 #define ARIZONA_IRQ_POL 0x0400 /* IRQ_POL */
4797 #define ARIZONA_IRQ_POL_MASK 0x0400 /* IRQ_POL */
4800 #define ARIZONA_IRQ_OP_CFG 0x0200 /* IRQ_OP_CFG */
4801 #define ARIZONA_IRQ_OP_CFG_MASK 0x0200 /* IRQ_OP_CFG */
4806 * R3088 (0xC10) - GPIO Debounce Config
4808 #define ARIZONA_GP_DBTIME_MASK 0xF000 /* GP_DBTIME - [15:12] */
4813 * R3096 (0xC18) - GP Switch 1
4815 #define ARIZONA_SW1_MODE_MASK 0x0003 /* SW1_MODE - [1:0] */
4816 #define ARIZONA_SW1_MODE_SHIFT 0 /* SW1_MODE - [1:0] */
4817 #define ARIZONA_SW1_MODE_WIDTH 2 /* SW1_MODE - [1:0] */
4820 * R3104 (0xC20) - Misc Pad Ctrl 1
4822 #define ARIZONA_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */
4823 #define ARIZONA_LDO1ENA_PD_MASK 0x8000 /* LDO1ENA_PD */
4826 #define ARIZONA_MCLK2_PD 0x2000 /* MCLK2_PD */
4827 #define ARIZONA_MCLK2_PD_MASK 0x2000 /* MCLK2_PD */
4830 #define ARIZONA_RSTB_PU 0x0002 /* RSTB_PU */
4831 #define ARIZONA_RSTB_PU_MASK 0x0002 /* RSTB_PU */
4836 * R3105 (0xC21) - Misc Pad Ctrl 2
4838 #define ARIZONA_MCLK1_PD 0x1000 /* MCLK1_PD */
4839 #define ARIZONA_MCLK1_PD_MASK 0x1000 /* MCLK1_PD */
4842 #define ARIZONA_MICD_PD 0x0100 /* MICD_PD */
4843 #define ARIZONA_MICD_PD_MASK 0x0100 /* MICD_PD */
4846 #define ARIZONA_ADDR_PD 0x0001 /* ADDR_PD */
4847 #define ARIZONA_ADDR_PD_MASK 0x0001 /* ADDR_PD */
4848 #define ARIZONA_ADDR_PD_SHIFT 0 /* ADDR_PD */
4852 * R3106 (0xC22) - Misc Pad Ctrl 3
4854 #define ARIZONA_DMICDAT4_PD 0x0008 /* DMICDAT4_PD */
4855 #define ARIZONA_DMICDAT4_PD_MASK 0x0008 /* DMICDAT4_PD */
4858 #define ARIZONA_DMICDAT3_PD 0x0004 /* DMICDAT3_PD */
4859 #define ARIZONA_DMICDAT3_PD_MASK 0x0004 /* DMICDAT3_PD */
4862 #define ARIZONA_DMICDAT2_PD 0x0002 /* DMICDAT2_PD */
4863 #define ARIZONA_DMICDAT2_PD_MASK 0x0002 /* DMICDAT2_PD */
4866 #define ARIZONA_DMICDAT1_PD 0x0001 /* DMICDAT1_PD */
4867 #define ARIZONA_DMICDAT1_PD_MASK 0x0001 /* DMICDAT1_PD */
4868 #define ARIZONA_DMICDAT1_PD_SHIFT 0 /* DMICDAT1_PD */
4872 * R3107 (0xC23) - Misc Pad Ctrl 4
4874 #define ARIZONA_AIF1RXLRCLK_PU 0x0020 /* AIF1RXLRCLK_PU */
4875 #define ARIZONA_AIF1RXLRCLK_PU_MASK 0x0020 /* AIF1RXLRCLK_PU */
4878 #define ARIZONA_AIF1RXLRCLK_PD 0x0010 /* AIF1RXLRCLK_PD */
4879 #define ARIZONA_AIF1RXLRCLK_PD_MASK 0x0010 /* AIF1RXLRCLK_PD */
4882 #define ARIZONA_AIF1BCLK_PU 0x0008 /* AIF1BCLK_PU */
4883 #define ARIZONA_AIF1BCLK_PU_MASK 0x0008 /* AIF1BCLK_PU */
4886 #define ARIZONA_AIF1BCLK_PD 0x0004 /* AIF1BCLK_PD */
4887 #define ARIZONA_AIF1BCLK_PD_MASK 0x0004 /* AIF1BCLK_PD */
4890 #define ARIZONA_AIF1RXDAT_PU 0x0002 /* AIF1RXDAT_PU */
4891 #define ARIZONA_AIF1RXDAT_PU_MASK 0x0002 /* AIF1RXDAT_PU */
4894 #define ARIZONA_AIF1RXDAT_PD 0x0001 /* AIF1RXDAT_PD */
4895 #define ARIZONA_AIF1RXDAT_PD_MASK 0x0001 /* AIF1RXDAT_PD */
4896 #define ARIZONA_AIF1RXDAT_PD_SHIFT 0 /* AIF1RXDAT_PD */
4900 * R3108 (0xC24) - Misc Pad Ctrl 5
4902 #define ARIZONA_AIF2RXLRCLK_PU 0x0020 /* AIF2RXLRCLK_PU */
4903 #define ARIZONA_AIF2RXLRCLK_PU_MASK 0x0020 /* AIF2RXLRCLK_PU */
4906 #define ARIZONA_AIF2RXLRCLK_PD 0x0010 /* AIF2RXLRCLK_PD */
4907 #define ARIZONA_AIF2RXLRCLK_PD_MASK 0x0010 /* AIF2RXLRCLK_PD */
4910 #define ARIZONA_AIF2BCLK_PU 0x0008 /* AIF2BCLK_PU */
4911 #define ARIZONA_AIF2BCLK_PU_MASK 0x0008 /* AIF2BCLK_PU */
4914 #define ARIZONA_AIF2BCLK_PD 0x0004 /* AIF2BCLK_PD */
4915 #define ARIZONA_AIF2BCLK_PD_MASK 0x0004 /* AIF2BCLK_PD */
4918 #define ARIZONA_AIF2RXDAT_PU 0x0002 /* AIF2RXDAT_PU */
4919 #define ARIZONA_AIF2RXDAT_PU_MASK 0x0002 /* AIF2RXDAT_PU */
4922 #define ARIZONA_AIF2RXDAT_PD 0x0001 /* AIF2RXDAT_PD */
4923 #define ARIZONA_AIF2RXDAT_PD_MASK 0x0001 /* AIF2RXDAT_PD */
4924 #define ARIZONA_AIF2RXDAT_PD_SHIFT 0 /* AIF2RXDAT_PD */
4928 * R3109 (0xC25) - Misc Pad Ctrl 6
4930 #define ARIZONA_AIF3RXLRCLK_PU 0x0020 /* AIF3RXLRCLK_PU */
4931 #define ARIZONA_AIF3RXLRCLK_PU_MASK 0x0020 /* AIF3RXLRCLK_PU */
4934 #define ARIZONA_AIF3RXLRCLK_PD 0x0010 /* AIF3RXLRCLK_PD */
4935 #define ARIZONA_AIF3RXLRCLK_PD_MASK 0x0010 /* AIF3RXLRCLK_PD */
4938 #define ARIZONA_AIF3BCLK_PU 0x0008 /* AIF3BCLK_PU */
4939 #define ARIZONA_AIF3BCLK_PU_MASK 0x0008 /* AIF3BCLK_PU */
4942 #define ARIZONA_AIF3BCLK_PD 0x0004 /* AIF3BCLK_PD */
4943 #define ARIZONA_AIF3BCLK_PD_MASK 0x0004 /* AIF3BCLK_PD */
4946 #define ARIZONA_AIF3RXDAT_PU 0x0002 /* AIF3RXDAT_PU */
4947 #define ARIZONA_AIF3RXDAT_PU_MASK 0x0002 /* AIF3RXDAT_PU */
4950 #define ARIZONA_AIF3RXDAT_PD 0x0001 /* AIF3RXDAT_PD */
4951 #define ARIZONA_AIF3RXDAT_PD_MASK 0x0001 /* AIF3RXDAT_PD */
4952 #define ARIZONA_AIF3RXDAT_PD_SHIFT 0 /* AIF3RXDAT_PD */
4956 * R3328 (0xD00) - Interrupt Status 1
4958 #define ARIZONA_GP4_EINT1 0x0008 /* GP4_EINT1 */
4959 #define ARIZONA_GP4_EINT1_MASK 0x0008 /* GP4_EINT1 */
4962 #define ARIZONA_GP3_EINT1 0x0004 /* GP3_EINT1 */
4963 #define ARIZONA_GP3_EINT1_MASK 0x0004 /* GP3_EINT1 */
4966 #define ARIZONA_GP2_EINT1 0x0002 /* GP2_EINT1 */
4967 #define ARIZONA_GP2_EINT1_MASK 0x0002 /* GP2_EINT1 */
4970 #define ARIZONA_GP1_EINT1 0x0001 /* GP1_EINT1 */
4971 #define ARIZONA_GP1_EINT1_MASK 0x0001 /* GP1_EINT1 */
4972 #define ARIZONA_GP1_EINT1_SHIFT 0 /* GP1_EINT1 */
4976 * R3329 (0xD01) - Interrupt Status 2
4978 #define ARIZONA_DSP4_RAM_RDY_EINT1 0x0800 /* DSP4_RAM_RDY_EINT1 */
4979 #define ARIZONA_DSP4_RAM_RDY_EINT1_MASK 0x0800 /* DSP4_RAM_RDY_EINT1 */
4982 #define ARIZONA_DSP3_RAM_RDY_EINT1 0x0400 /* DSP3_RAM_RDY_EINT1 */
4983 #define ARIZONA_DSP3_RAM_RDY_EINT1_MASK 0x0400 /* DSP3_RAM_RDY_EINT1 */
4986 #define ARIZONA_DSP2_RAM_RDY_EINT1 0x0200 /* DSP2_RAM_RDY_EINT1 */
4987 #define ARIZONA_DSP2_RAM_RDY_EINT1_MASK 0x0200 /* DSP2_RAM_RDY_EINT1 */
4990 #define ARIZONA_DSP1_RAM_RDY_EINT1 0x0100 /* DSP1_RAM_RDY_EINT1 */
4991 #define ARIZONA_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* DSP1_RAM_RDY_EINT1 */
4994 #define ARIZONA_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */
4995 #define ARIZONA_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */
4998 #define ARIZONA_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */
4999 #define ARIZONA_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */
5002 #define ARIZONA_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */
5003 #define ARIZONA_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */
5006 #define ARIZONA_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */
5007 #define ARIZONA_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */
5010 #define ARIZONA_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */
5011 #define ARIZONA_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */
5014 #define ARIZONA_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */
5015 #define ARIZONA_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */
5018 #define ARIZONA_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */
5019 #define ARIZONA_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */
5022 #define ARIZONA_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */
5023 #define ARIZONA_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */
5024 #define ARIZONA_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */
5028 * R3330 (0xD02) - Interrupt Status 3
5030 #define ARIZONA_SPK_OVERHEAT_WARN_EINT1 0x8000 /* SPK_OVERHEAT_WARN_EINT1 */
5031 #define ARIZONA_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* SPK_OVERHEAD_WARN_EINT1 */
5034 #define ARIZONA_SPK_OVERHEAT_EINT1 0x4000 /* SPK_OVERHEAT_EINT1 */
5035 #define ARIZONA_SPK_OVERHEAT_EINT1_MASK 0x4000 /* SPK_OVERHEAT_EINT1 */
5038 #define ARIZONA_HPDET_EINT1 0x2000 /* HPDET_EINT1 */
5039 #define ARIZONA_HPDET_EINT1_MASK 0x2000 /* HPDET_EINT1 */
5042 #define ARIZONA_MICDET_EINT1 0x1000 /* MICDET_EINT1 */
5043 #define ARIZONA_MICDET_EINT1_MASK 0x1000 /* MICDET_EINT1 */
5046 #define ARIZONA_WSEQ_DONE_EINT1 0x0800 /* WSEQ_DONE_EINT1 */
5047 #define ARIZONA_WSEQ_DONE_EINT1_MASK 0x0800 /* WSEQ_DONE_EINT1 */
5050 #define ARIZONA_DRC2_SIG_DET_EINT1 0x0400 /* DRC2_SIG_DET_EINT1 */
5051 #define ARIZONA_DRC2_SIG_DET_EINT1_MASK 0x0400 /* DRC2_SIG_DET_EINT1 */
5054 #define ARIZONA_DRC1_SIG_DET_EINT1 0x0200 /* DRC1_SIG_DET_EINT1 */
5055 #define ARIZONA_DRC1_SIG_DET_EINT1_MASK 0x0200 /* DRC1_SIG_DET_EINT1 */
5058 #define ARIZONA_ASRC2_LOCK_EINT1 0x0100 /* ASRC2_LOCK_EINT1 */
5059 #define ARIZONA_ASRC2_LOCK_EINT1_MASK 0x0100 /* ASRC2_LOCK_EINT1 */
5062 #define ARIZONA_ASRC1_LOCK_EINT1 0x0080 /* ASRC1_LOCK_EINT1 */
5063 #define ARIZONA_ASRC1_LOCK_EINT1_MASK 0x0080 /* ASRC1_LOCK_EINT1 */
5066 #define ARIZONA_UNDERCLOCKED_EINT1 0x0040 /* UNDERCLOCKED_EINT1 */
5067 #define ARIZONA_UNDERCLOCKED_EINT1_MASK 0x0040 /* UNDERCLOCKED_EINT1 */
5070 #define ARIZONA_OVERCLOCKED_EINT1 0x0020 /* OVERCLOCKED_EINT1 */
5071 #define ARIZONA_OVERCLOCKED_EINT1_MASK 0x0020 /* OVERCLOCKED_EINT1 */
5074 #define ARIZONA_FLL2_LOCK_EINT1 0x0008 /* FLL2_LOCK_EINT1 */
5075 #define ARIZONA_FLL2_LOCK_EINT1_MASK 0x0008 /* FLL2_LOCK_EINT1 */
5078 #define ARIZONA_FLL1_LOCK_EINT1 0x0004 /* FLL1_LOCK_EINT1 */
5079 #define ARIZONA_FLL1_LOCK_EINT1_MASK 0x0004 /* FLL1_LOCK_EINT1 */
5082 #define ARIZONA_CLKGEN_ERR_EINT1 0x0002 /* CLKGEN_ERR_EINT1 */
5083 #define ARIZONA_CLKGEN_ERR_EINT1_MASK 0x0002 /* CLKGEN_ERR_EINT1 */
5086 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
5087 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
5088 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT1 */
5092 * R3331 (0xD03) - Interrupt Status 4
5094 #define ARIZONA_ASRC_CFG_ERR_EINT1 0x8000 /* ASRC_CFG_ERR_EINT1 */
5095 #define ARIZONA_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* ASRC_CFG_ERR_EINT1 */
5098 #define ARIZONA_AIF3_ERR_EINT1 0x4000 /* AIF3_ERR_EINT1 */
5099 #define ARIZONA_AIF3_ERR_EINT1_MASK 0x4000 /* AIF3_ERR_EINT1 */
5102 #define ARIZONA_AIF2_ERR_EINT1 0x2000 /* AIF2_ERR_EINT1 */
5103 #define ARIZONA_AIF2_ERR_EINT1_MASK 0x2000 /* AIF2_ERR_EINT1 */
5106 #define ARIZONA_AIF1_ERR_EINT1 0x1000 /* AIF1_ERR_EINT1 */
5107 #define ARIZONA_AIF1_ERR_EINT1_MASK 0x1000 /* AIF1_ERR_EINT1 */
5110 #define ARIZONA_CTRLIF_ERR_EINT1 0x0800 /* CTRLIF_ERR_EINT1 */
5111 #define ARIZONA_CTRLIF_ERR_EINT1_MASK 0x0800 /* CTRLIF_ERR_EINT1 */
5114 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
5115 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
5118 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
5119 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
5122 #define ARIZONA_SYSCLK_ENA_LOW_EINT1 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
5123 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
5126 #define ARIZONA_ISRC1_CFG_ERR_EINT1 0x0080 /* ISRC1_CFG_ERR_EINT1 */
5127 #define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* ISRC1_CFG_ERR_EINT1 */
5130 #define ARIZONA_ISRC2_CFG_ERR_EINT1 0x0040 /* ISRC2_CFG_ERR_EINT1 */
5131 #define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* ISRC2_CFG_ERR_EINT1 */
5134 #define ARIZONA_HP3R_DONE_EINT1 0x0020 /* HP3R_DONE_EINT1 */
5135 #define ARIZONA_HP3R_DONE_EINT1_MASK 0x0020 /* HP3R_DONE_EINT1 */
5138 #define ARIZONA_HP3L_DONE_EINT1 0x0010 /* HP3L_DONE_EINT1 */
5139 #define ARIZONA_HP3L_DONE_EINT1_MASK 0x0010 /* HP3L_DONE_EINT1 */
5142 #define ARIZONA_HP2R_DONE_EINT1 0x0008 /* HP2R_DONE_EINT1 */
5143 #define ARIZONA_HP2R_DONE_EINT1_MASK 0x0008 /* HP2R_DONE_EINT1 */
5146 #define ARIZONA_HP2L_DONE_EINT1 0x0004 /* HP2L_DONE_EINT1 */
5147 #define ARIZONA_HP2L_DONE_EINT1_MASK 0x0004 /* HP2L_DONE_EINT1 */
5150 #define ARIZONA_HP1R_DONE_EINT1 0x0002 /* HP1R_DONE_EINT1 */
5151 #define ARIZONA_HP1R_DONE_EINT1_MASK 0x0002 /* HP1R_DONE_EINT1 */
5154 #define ARIZONA_HP1L_DONE_EINT1 0x0001 /* HP1L_DONE_EINT1 */
5155 #define ARIZONA_HP1L_DONE_EINT1_MASK 0x0001 /* HP1L_DONE_EINT1 */
5156 #define ARIZONA_HP1L_DONE_EINT1_SHIFT 0 /* HP1L_DONE_EINT1 */
5160 * R3331 (0xD03) - Interrupt Status 4 (Alternate layout)
5165 #define ARIZONA_V2_AIF3_ERR_EINT1 0x8000 /* AIF3_ERR_EINT1 */
5166 #define ARIZONA_V2_AIF3_ERR_EINT1_MASK 0x8000 /* AIF3_ERR_EINT1 */
5169 #define ARIZONA_V2_AIF2_ERR_EINT1 0x4000 /* AIF2_ERR_EINT1 */
5170 #define ARIZONA_V2_AIF2_ERR_EINT1_MASK 0x4000 /* AIF2_ERR_EINT1 */
5173 #define ARIZONA_V2_AIF1_ERR_EINT1 0x2000 /* AIF1_ERR_EINT1 */
5174 #define ARIZONA_V2_AIF1_ERR_EINT1_MASK 0x2000 /* AIF1_ERR_EINT1 */
5177 #define ARIZONA_V2_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */
5178 #define ARIZONA_V2_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */
5181 #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */
5182 #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */
5185 #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */
5186 #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */
5189 #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 0x0200 /* SYSCLK_ENA_LOW_EINT1 */
5190 #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT1 */
5193 #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1 0x0100 /* ISRC1_CFG_ERR_EINT1 */
5194 #define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* ISRC1_CFG_ERR_EINT1 */
5197 #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1 0x0080 /* ISRC2_CFG_ERR_EINT1 */
5198 #define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* ISRC2_CFG_ERR_EINT1 */
5201 #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1 0x0040 /* ISRC3_CFG_ERR_EINT1 */
5202 #define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* ISRC3_CFG_ERR_EINT1 */
5207 * R3332 (0xD04) - Interrupt Status 5
5209 #define ARIZONA_BOOT_DONE_EINT1 0x0100 /* BOOT_DONE_EINT1 */
5210 #define ARIZONA_BOOT_DONE_EINT1_MASK 0x0100 /* BOOT_DONE_EINT1 */
5213 #define ARIZONA_DCS_DAC_DONE_EINT1 0x0080 /* DCS_DAC_DONE_EINT1 */
5214 #define ARIZONA_DCS_DAC_DONE_EINT1_MASK 0x0080 /* DCS_DAC_DONE_EINT1 */
5217 #define ARIZONA_DCS_HP_DONE_EINT1 0x0040 /* DCS_HP_DONE_EINT1 */
5218 #define ARIZONA_DCS_HP_DONE_EINT1_MASK 0x0040 /* DCS_HP_DONE_EINT1 */
5221 #define ARIZONA_FLL2_CLOCK_OK_EINT1 0x0002 /* FLL2_CLOCK_OK_EINT1 */
5222 #define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* FLL2_CLOCK_OK_EINT1 */
5225 #define ARIZONA_FLL1_CLOCK_OK_EINT1 0x0001 /* FLL1_CLOCK_OK_EINT1 */
5226 #define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* FLL1_CLOCK_OK_EINT1 */
5227 #define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* FLL1_CLOCK_OK_EINT1 */
5231 * R3332 (0xD05) - Interrupt Status 5 (Alternate layout)
5236 #define ARIZONA_V2_ASRC_CFG_ERR_EINT1 0x0008 /* ASRC_CFG_ERR_EINT1 */
5237 #define ARIZONA_V2_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* ASRC_CFG_ERR_EINT1 */
5242 * R3333 (0xD05) - Interrupt Status 6
5244 #define ARIZONA_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */
5245 #define ARIZONA_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */
5248 #define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */
5249 #define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */
5252 #define ARIZONA_SPK1R_SHORT_EINT1 0x2000 /* SPK1R_SHORT_EINT1 */
5253 #define ARIZONA_SPK1R_SHORT_EINT1_MASK 0x2000 /* SPK1R_SHORT_EINT1 */
5256 #define ARIZONA_SPK1L_SHORT_EINT1 0x1000 /* SPK1L_SHORT_EINT1 */
5257 #define ARIZONA_SPK1L_SHORT_EINT1_MASK 0x1000 /* SPK1L_SHORT_EINT1 */
5260 #define ARIZONA_HP3R_SC_NEG_EINT1 0x0800 /* HP3R_SC_NEG_EINT1 */
5261 #define ARIZONA_HP3R_SC_NEG_EINT1_MASK 0x0800 /* HP3R_SC_NEG_EINT1 */
5264 #define ARIZONA_HP3R_SC_POS_EINT1 0x0400 /* HP3R_SC_POS_EINT1 */
5265 #define ARIZONA_HP3R_SC_POS_EINT1_MASK 0x0400 /* HP3R_SC_POS_EINT1 */
5268 #define ARIZONA_HP3L_SC_NEG_EINT1 0x0200 /* HP3L_SC_NEG_EINT1 */
5269 #define ARIZONA_HP3L_SC_NEG_EINT1_MASK 0x0200 /* HP3L_SC_NEG_EINT1 */
5272 #define ARIZONA_HP3L_SC_POS_EINT1 0x0100 /* HP3L_SC_POS_EINT1 */
5273 #define ARIZONA_HP3L_SC_POS_EINT1_MASK 0x0100 /* HP3L_SC_POS_EINT1 */
5276 #define ARIZONA_HP2R_SC_NEG_EINT1 0x0080 /* HP2R_SC_NEG_EINT1 */
5277 #define ARIZONA_HP2R_SC_NEG_EINT1_MASK 0x0080 /* HP2R_SC_NEG_EINT1 */
5280 #define ARIZONA_HP2R_SC_POS_EINT1 0x0040 /* HP2R_SC_POS_EINT1 */
5281 #define ARIZONA_HP2R_SC_POS_EINT1_MASK 0x0040 /* HP2R_SC_POS_EINT1 */
5284 #define ARIZONA_HP2L_SC_NEG_EINT1 0x0020 /* HP2L_SC_NEG_EINT1 */
5285 #define ARIZONA_HP2L_SC_NEG_EINT1_MASK 0x0020 /* HP2L_SC_NEG_EINT1 */
5288 #define ARIZONA_HP2L_SC_POS_EINT1 0x0010 /* HP2L_SC_POS_EINT1 */
5289 #define ARIZONA_HP2L_SC_POS_EINT1_MASK 0x0010 /* HP2L_SC_POS_EINT1 */
5292 #define ARIZONA_HP1R_SC_NEG_EINT1 0x0008 /* HP1R_SC_NEG_EINT1 */
5293 #define ARIZONA_HP1R_SC_NEG_EINT1_MASK 0x0008 /* HP1R_SC_NEG_EINT1 */
5296 #define ARIZONA_HP1R_SC_POS_EINT1 0x0004 /* HP1R_SC_POS_EINT1 */
5297 #define ARIZONA_HP1R_SC_POS_EINT1_MASK 0x0004 /* HP1R_SC_POS_EINT1 */
5300 #define ARIZONA_HP1L_SC_NEG_EINT1 0x0002 /* HP1L_SC_NEG_EINT1 */
5301 #define ARIZONA_HP1L_SC_NEG_EINT1_MASK 0x0002 /* HP1L_SC_NEG_EINT1 */
5304 #define ARIZONA_HP1L_SC_POS_EINT1 0x0001 /* HP1L_SC_POS_EINT1 */
5305 #define ARIZONA_HP1L_SC_POS_EINT1_MASK 0x0001 /* HP1L_SC_POS_EINT1 */
5306 #define ARIZONA_HP1L_SC_POS_EINT1_SHIFT 0 /* HP1L_SC_POS_EINT1 */
5310 * R3336 (0xD08) - Interrupt Status 1 Mask
5312 #define ARIZONA_IM_GP4_EINT1 0x0008 /* IM_GP4_EINT1 */
5313 #define ARIZONA_IM_GP4_EINT1_MASK 0x0008 /* IM_GP4_EINT1 */
5316 #define ARIZONA_IM_GP3_EINT1 0x0004 /* IM_GP3_EINT1 */
5317 #define ARIZONA_IM_GP3_EINT1_MASK 0x0004 /* IM_GP3_EINT1 */
5320 #define ARIZONA_IM_GP2_EINT1 0x0002 /* IM_GP2_EINT1 */
5321 #define ARIZONA_IM_GP2_EINT1_MASK 0x0002 /* IM_GP2_EINT1 */
5324 #define ARIZONA_IM_GP1_EINT1 0x0001 /* IM_GP1_EINT1 */
5325 #define ARIZONA_IM_GP1_EINT1_MASK 0x0001 /* IM_GP1_EINT1 */
5326 #define ARIZONA_IM_GP1_EINT1_SHIFT 0 /* IM_GP1_EINT1 */
5330 * R3337 (0xD09) - Interrupt Status 2 Mask
5332 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
5333 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
5336 #define ARIZONA_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */
5337 #define ARIZONA_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */
5340 #define ARIZONA_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */
5341 #define ARIZONA_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */
5342 #define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */
5346 * R3338 (0xD0A) - Interrupt Status 3 Mask
5348 #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */
5349 #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */
5352 #define ARIZONA_IM_SPK_OVERHEAT_EINT1 0x4000 /* IM_SPK_OVERHEAT_EINT1 */
5353 #define ARIZONA_IM_SPK_OVERHEAT_EINT1_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT1 */
5356 #define ARIZONA_IM_HPDET_EINT1 0x2000 /* IM_HPDET_EINT1 */
5357 #define ARIZONA_IM_HPDET_EINT1_MASK 0x2000 /* IM_HPDET_EINT1 */
5360 #define ARIZONA_IM_MICDET_EINT1 0x1000 /* IM_MICDET_EINT1 */
5361 #define ARIZONA_IM_MICDET_EINT1_MASK 0x1000 /* IM_MICDET_EINT1 */
5364 #define ARIZONA_IM_WSEQ_DONE_EINT1 0x0800 /* IM_WSEQ_DONE_EINT1 */
5365 #define ARIZONA_IM_WSEQ_DONE_EINT1_MASK 0x0800 /* IM_WSEQ_DONE_EINT1 */
5368 #define ARIZONA_IM_DRC2_SIG_DET_EINT1 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
5369 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
5372 #define ARIZONA_IM_DRC1_SIG_DET_EINT1 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
5373 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
5376 #define ARIZONA_IM_ASRC2_LOCK_EINT1 0x0100 /* IM_ASRC2_LOCK_EINT1 */
5377 #define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK 0x0100 /* IM_ASRC2_LOCK_EINT1 */
5380 #define ARIZONA_IM_ASRC1_LOCK_EINT1 0x0080 /* IM_ASRC1_LOCK_EINT1 */
5381 #define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK 0x0080 /* IM_ASRC1_LOCK_EINT1 */
5384 #define ARIZONA_IM_UNDERCLOCKED_EINT1 0x0040 /* IM_UNDERCLOCKED_EINT1 */
5385 #define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK 0x0040 /* IM_UNDERCLOCKED_EINT1 */
5388 #define ARIZONA_IM_OVERCLOCKED_EINT1 0x0020 /* IM_OVERCLOCKED_EINT1 */
5389 #define ARIZONA_IM_OVERCLOCKED_EINT1_MASK 0x0020 /* IM_OVERCLOCKED_EINT1 */
5392 #define ARIZONA_IM_FLL2_LOCK_EINT1 0x0008 /* IM_FLL2_LOCK_EINT1 */
5393 #define ARIZONA_IM_FLL2_LOCK_EINT1_MASK 0x0008 /* IM_FLL2_LOCK_EINT1 */
5396 #define ARIZONA_IM_FLL1_LOCK_EINT1 0x0004 /* IM_FLL1_LOCK_EINT1 */
5397 #define ARIZONA_IM_FLL1_LOCK_EINT1_MASK 0x0004 /* IM_FLL1_LOCK_EINT1 */
5400 #define ARIZONA_IM_CLKGEN_ERR_EINT1 0x0002 /* IM_CLKGEN_ERR_EINT1 */
5401 #define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK 0x0002 /* IM_CLKGEN_ERR_EINT1 */
5404 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5405 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5406 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
5410 * R3339 (0xD0B) - Interrupt Status 4 Mask
5412 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
5413 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
5416 #define ARIZONA_IM_AIF3_ERR_EINT1 0x4000 /* IM_AIF3_ERR_EINT1 */
5417 #define ARIZONA_IM_AIF3_ERR_EINT1_MASK 0x4000 /* IM_AIF3_ERR_EINT1 */
5420 #define ARIZONA_IM_AIF2_ERR_EINT1 0x2000 /* IM_AIF2_ERR_EINT1 */
5421 #define ARIZONA_IM_AIF2_ERR_EINT1_MASK 0x2000 /* IM_AIF2_ERR_EINT1 */
5424 #define ARIZONA_IM_AIF1_ERR_EINT1 0x1000 /* IM_AIF1_ERR_EINT1 */
5425 #define ARIZONA_IM_AIF1_ERR_EINT1_MASK 0x1000 /* IM_AIF1_ERR_EINT1 */
5428 #define ARIZONA_IM_CTRLIF_ERR_EINT1 0x0800 /* IM_CTRLIF_ERR_EINT1 */
5429 #define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK 0x0800 /* IM_CTRLIF_ERR_EINT1 */
5432 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5433 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5436 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5437 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5440 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
5441 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
5444 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
5445 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
5448 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
5449 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
5452 #define ARIZONA_IM_HP3R_DONE_EINT1 0x0020 /* IM_HP3R_DONE_EINT1 */
5453 #define ARIZONA_IM_HP3R_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DONE_EINT1 */
5456 #define ARIZONA_IM_HP3L_DONE_EINT1 0x0010 /* IM_HP3L_DONE_EINT1 */
5457 #define ARIZONA_IM_HP3L_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DONE_EINT1 */
5460 #define ARIZONA_IM_HP2R_DONE_EINT1 0x0008 /* IM_HP2R_DONE_EINT1 */
5461 #define ARIZONA_IM_HP2R_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DONE_EINT1 */
5464 #define ARIZONA_IM_HP2L_DONE_EINT1 0x0004 /* IM_HP2L_DONE_EINT1 */
5465 #define ARIZONA_IM_HP2L_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DONE_EINT1 */
5468 #define ARIZONA_IM_HP1R_DONE_EINT1 0x0002 /* IM_HP1R_DONE_EINT1 */
5469 #define ARIZONA_IM_HP1R_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DONE_EINT1 */
5472 #define ARIZONA_IM_HP1L_DONE_EINT1 0x0001 /* IM_HP1L_DONE_EINT1 */
5473 #define ARIZONA_IM_HP1L_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DONE_EINT1 */
5474 #define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */
5478 * R3339 (0xD0B) - Interrupt Status 4 Mask (Alternate layout)
5483 #define ARIZONA_V2_IM_AIF3_ERR_EINT1 0x8000 /* IM_AIF3_ERR_EINT1 */
5484 #define ARIZONA_V2_IM_AIF3_ERR_EINT1_MASK 0x8000 /* IM_AIF3_ERR_EINT1 */
5487 #define ARIZONA_V2_IM_AIF2_ERR_EINT1 0x4000 /* IM_AIF2_ERR_EINT1 */
5488 #define ARIZONA_V2_IM_AIF2_ERR_EINT1_MASK 0x4000 /* IM_AIF2_ERR_EINT1 */
5491 #define ARIZONA_V2_IM_AIF1_ERR_EINT1 0x2000 /* IM_AIF1_ERR_EINT1 */
5492 #define ARIZONA_V2_IM_AIF1_ERR_EINT1_MASK 0x2000 /* IM_AIF1_ERR_EINT1 */
5495 #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */
5496 #define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */
5499 #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5500 #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
5503 #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5504 #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
5507 #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */
5508 #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */
5511 #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */
5512 #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */
5515 #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */
5516 #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */
5519 #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */
5520 #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */
5525 * R3340 (0xD0C) - Interrupt Status 5 Mask
5527 #define ARIZONA_IM_BOOT_DONE_EINT1 0x0100 /* IM_BOOT_DONE_EINT1 */
5528 #define ARIZONA_IM_BOOT_DONE_EINT1_MASK 0x0100 /* IM_BOOT_DONE_EINT1 */
5531 #define ARIZONA_IM_DCS_DAC_DONE_EINT1 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
5532 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
5535 #define ARIZONA_IM_DCS_HP_DONE_EINT1 0x0040 /* IM_DCS_HP_DONE_EINT1 */
5536 #define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK 0x0040 /* IM_DCS_HP_DONE_EINT1 */
5539 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
5540 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
5543 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
5544 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
5545 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT1 */
5549 * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
5554 #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */
5555 #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */
5560 * R3341 (0xD0D) - Interrupt Status 6 Mask
5562 #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */
5563 #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */
5566 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
5567 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
5570 #define ARIZONA_IM_SPK1R_SHORT_EINT1 0x2000 /* IM_SPK1R_SHORT_EINT1 */
5571 #define ARIZONA_IM_SPK1R_SHORT_EINT1_MASK 0x2000 /* IM_SPK1R_SHORT_EINT1 */
5574 #define ARIZONA_IM_SPK1L_SHORT_EINT1 0x1000 /* IM_SPK1L_SHORT_EINT1 */
5575 #define ARIZONA_IM_SPK1L_SHORT_EINT1_MASK 0x1000 /* IM_SPK1L_SHORT_EINT1 */
5578 #define ARIZONA_IM_HP3R_SC_NEG_EINT1 0x0800 /* IM_HP3R_SC_NEG_EINT1 */
5579 #define ARIZONA_IM_HP3R_SC_NEG_EINT1_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT1 */
5582 #define ARIZONA_IM_HP3R_SC_POS_EINT1 0x0400 /* IM_HP3R_SC_POS_EINT1 */
5583 #define ARIZONA_IM_HP3R_SC_POS_EINT1_MASK 0x0400 /* IM_HP3R_SC_POS_EINT1 */
5586 #define ARIZONA_IM_HP3L_SC_NEG_EINT1 0x0200 /* IM_HP3L_SC_NEG_EINT1 */
5587 #define ARIZONA_IM_HP3L_SC_NEG_EINT1_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT1 */
5590 #define ARIZONA_IM_HP3L_SC_POS_EINT1 0x0100 /* IM_HP3L_SC_POS_EINT1 */
5591 #define ARIZONA_IM_HP3L_SC_POS_EINT1_MASK 0x0100 /* IM_HP3L_SC_POS_EINT1 */
5594 #define ARIZONA_IM_HP2R_SC_NEG_EINT1 0x0080 /* IM_HP2R_SC_NEG_EINT1 */
5595 #define ARIZONA_IM_HP2R_SC_NEG_EINT1_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT1 */
5598 #define ARIZONA_IM_HP2R_SC_POS_EINT1 0x0040 /* IM_HP2R_SC_POS_EINT1 */
5599 #define ARIZONA_IM_HP2R_SC_POS_EINT1_MASK 0x0040 /* IM_HP2R_SC_POS_EINT1 */
5602 #define ARIZONA_IM_HP2L_SC_NEG_EINT1 0x0020 /* IM_HP2L_SC_NEG_EINT1 */
5603 #define ARIZONA_IM_HP2L_SC_NEG_EINT1_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT1 */
5606 #define ARIZONA_IM_HP2L_SC_POS_EINT1 0x0010 /* IM_HP2L_SC_POS_EINT1 */
5607 #define ARIZONA_IM_HP2L_SC_POS_EINT1_MASK 0x0010 /* IM_HP2L_SC_POS_EINT1 */
5610 #define ARIZONA_IM_HP1R_SC_NEG_EINT1 0x0008 /* IM_HP1R_SC_NEG_EINT1 */
5611 #define ARIZONA_IM_HP1R_SC_NEG_EINT1_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT1 */
5614 #define ARIZONA_IM_HP1R_SC_POS_EINT1 0x0004 /* IM_HP1R_SC_POS_EINT1 */
5615 #define ARIZONA_IM_HP1R_SC_POS_EINT1_MASK 0x0004 /* IM_HP1R_SC_POS_EINT1 */
5618 #define ARIZONA_IM_HP1L_SC_NEG_EINT1 0x0002 /* IM_HP1L_SC_NEG_EINT1 */
5619 #define ARIZONA_IM_HP1L_SC_NEG_EINT1_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT1 */
5622 #define ARIZONA_IM_HP1L_SC_POS_EINT1 0x0001 /* IM_HP1L_SC_POS_EINT1 */
5623 #define ARIZONA_IM_HP1L_SC_POS_EINT1_MASK 0x0001 /* IM_HP1L_SC_POS_EINT1 */
5624 #define ARIZONA_IM_HP1L_SC_POS_EINT1_SHIFT 0 /* IM_HP1L_SC_POS_EINT1 */
5628 * R3343 (0xD0F) - Interrupt Control
5630 #define ARIZONA_IM_IRQ1 0x0001 /* IM_IRQ1 */
5631 #define ARIZONA_IM_IRQ1_MASK 0x0001 /* IM_IRQ1 */
5632 #define ARIZONA_IM_IRQ1_SHIFT 0 /* IM_IRQ1 */
5636 * R3344 (0xD10) - IRQ2 Status 1
5638 #define ARIZONA_GP4_EINT2 0x0008 /* GP4_EINT2 */
5639 #define ARIZONA_GP4_EINT2_MASK 0x0008 /* GP4_EINT2 */
5642 #define ARIZONA_GP3_EINT2 0x0004 /* GP3_EINT2 */
5643 #define ARIZONA_GP3_EINT2_MASK 0x0004 /* GP3_EINT2 */
5646 #define ARIZONA_GP2_EINT2 0x0002 /* GP2_EINT2 */
5647 #define ARIZONA_GP2_EINT2_MASK 0x0002 /* GP2_EINT2 */
5650 #define ARIZONA_GP1_EINT2 0x0001 /* GP1_EINT2 */
5651 #define ARIZONA_GP1_EINT2_MASK 0x0001 /* GP1_EINT2 */
5652 #define ARIZONA_GP1_EINT2_SHIFT 0 /* GP1_EINT2 */
5656 * R3345 (0xD11) - IRQ2 Status 2
5658 #define ARIZONA_DSP1_RAM_RDY_EINT2 0x0100 /* DSP1_RAM_RDY_EINT2 */
5659 #define ARIZONA_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* DSP1_RAM_RDY_EINT2 */
5662 #define ARIZONA_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */
5663 #define ARIZONA_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */
5666 #define ARIZONA_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */
5667 #define ARIZONA_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */
5668 #define ARIZONA_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */
5672 * R3346 (0xD12) - IRQ2 Status 3
5674 #define ARIZONA_SPK_OVERHEAT_WARN_EINT2 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */
5675 #define ARIZONA_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */
5678 #define ARIZONA_SPK_OVERHEAT_EINT2 0x4000 /* SPK_OVERHEAT_EINT2 */
5679 #define ARIZONA_SPK_OVERHEAT_EINT2_MASK 0x4000 /* SPK_OVERHEAT_EINT2 */
5682 #define ARIZONA_HPDET_EINT2 0x2000 /* HPDET_EINT2 */
5683 #define ARIZONA_HPDET_EINT2_MASK 0x2000 /* HPDET_EINT2 */
5686 #define ARIZONA_MICDET_EINT2 0x1000 /* MICDET_EINT2 */
5687 #define ARIZONA_MICDET_EINT2_MASK 0x1000 /* MICDET_EINT2 */
5690 #define ARIZONA_WSEQ_DONE_EINT2 0x0800 /* WSEQ_DONE_EINT2 */
5691 #define ARIZONA_WSEQ_DONE_EINT2_MASK 0x0800 /* WSEQ_DONE_EINT2 */
5694 #define ARIZONA_DRC2_SIG_DET_EINT2 0x0400 /* DRC2_SIG_DET_EINT2 */
5695 #define ARIZONA_DRC2_SIG_DET_EINT2_MASK 0x0400 /* DRC2_SIG_DET_EINT2 */
5698 #define ARIZONA_DRC1_SIG_DET_EINT2 0x0200 /* DRC1_SIG_DET_EINT2 */
5699 #define ARIZONA_DRC1_SIG_DET_EINT2_MASK 0x0200 /* DRC1_SIG_DET_EINT2 */
5702 #define ARIZONA_ASRC2_LOCK_EINT2 0x0100 /* ASRC2_LOCK_EINT2 */
5703 #define ARIZONA_ASRC2_LOCK_EINT2_MASK 0x0100 /* ASRC2_LOCK_EINT2 */
5706 #define ARIZONA_ASRC1_LOCK_EINT2 0x0080 /* ASRC1_LOCK_EINT2 */
5707 #define ARIZONA_ASRC1_LOCK_EINT2_MASK 0x0080 /* ASRC1_LOCK_EINT2 */
5710 #define ARIZONA_UNDERCLOCKED_EINT2 0x0040 /* UNDERCLOCKED_EINT2 */
5711 #define ARIZONA_UNDERCLOCKED_EINT2_MASK 0x0040 /* UNDERCLOCKED_EINT2 */
5714 #define ARIZONA_OVERCLOCKED_EINT2 0x0020 /* OVERCLOCKED_EINT2 */
5715 #define ARIZONA_OVERCLOCKED_EINT2_MASK 0x0020 /* OVERCLOCKED_EINT2 */
5718 #define ARIZONA_FLL2_LOCK_EINT2 0x0008 /* FLL2_LOCK_EINT2 */
5719 #define ARIZONA_FLL2_LOCK_EINT2_MASK 0x0008 /* FLL2_LOCK_EINT2 */
5722 #define ARIZONA_FLL1_LOCK_EINT2 0x0004 /* FLL1_LOCK_EINT2 */
5723 #define ARIZONA_FLL1_LOCK_EINT2_MASK 0x0004 /* FLL1_LOCK_EINT2 */
5726 #define ARIZONA_CLKGEN_ERR_EINT2 0x0002 /* CLKGEN_ERR_EINT2 */
5727 #define ARIZONA_CLKGEN_ERR_EINT2_MASK 0x0002 /* CLKGEN_ERR_EINT2 */
5730 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
5731 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
5732 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT2 */
5736 * R3347 (0xD13) - IRQ2 Status 4
5738 #define ARIZONA_ASRC_CFG_ERR_EINT2 0x8000 /* ASRC_CFG_ERR_EINT2 */
5739 #define ARIZONA_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* ASRC_CFG_ERR_EINT2 */
5742 #define ARIZONA_AIF3_ERR_EINT2 0x4000 /* AIF3_ERR_EINT2 */
5743 #define ARIZONA_AIF3_ERR_EINT2_MASK 0x4000 /* AIF3_ERR_EINT2 */
5746 #define ARIZONA_AIF2_ERR_EINT2 0x2000 /* AIF2_ERR_EINT2 */
5747 #define ARIZONA_AIF2_ERR_EINT2_MASK 0x2000 /* AIF2_ERR_EINT2 */
5750 #define ARIZONA_AIF1_ERR_EINT2 0x1000 /* AIF1_ERR_EINT2 */
5751 #define ARIZONA_AIF1_ERR_EINT2_MASK 0x1000 /* AIF1_ERR_EINT2 */
5754 #define ARIZONA_CTRLIF_ERR_EINT2 0x0800 /* CTRLIF_ERR_EINT2 */
5755 #define ARIZONA_CTRLIF_ERR_EINT2_MASK 0x0800 /* CTRLIF_ERR_EINT2 */
5758 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
5759 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
5762 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
5763 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
5766 #define ARIZONA_SYSCLK_ENA_LOW_EINT2 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
5767 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
5770 #define ARIZONA_ISRC1_CFG_ERR_EINT2 0x0080 /* ISRC1_CFG_ERR_EINT2 */
5771 #define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* ISRC1_CFG_ERR_EINT2 */
5774 #define ARIZONA_ISRC2_CFG_ERR_EINT2 0x0040 /* ISRC2_CFG_ERR_EINT2 */
5775 #define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* ISRC2_CFG_ERR_EINT2 */
5778 #define ARIZONA_HP3R_DONE_EINT2 0x0020 /* HP3R_DONE_EINT2 */
5779 #define ARIZONA_HP3R_DONE_EINT2_MASK 0x0020 /* HP3R_DONE_EINT2 */
5782 #define ARIZONA_HP3L_DONE_EINT2 0x0010 /* HP3L_DONE_EINT2 */
5783 #define ARIZONA_HP3L_DONE_EINT2_MASK 0x0010 /* HP3L_DONE_EINT2 */
5786 #define ARIZONA_HP2R_DONE_EINT2 0x0008 /* HP2R_DONE_EINT2 */
5787 #define ARIZONA_HP2R_DONE_EINT2_MASK 0x0008 /* HP2R_DONE_EINT2 */
5790 #define ARIZONA_HP2L_DONE_EINT2 0x0004 /* HP2L_DONE_EINT2 */
5791 #define ARIZONA_HP2L_DONE_EINT2_MASK 0x0004 /* HP2L_DONE_EINT2 */
5794 #define ARIZONA_HP1R_DONE_EINT2 0x0002 /* HP1R_DONE_EINT2 */
5795 #define ARIZONA_HP1R_DONE_EINT2_MASK 0x0002 /* HP1R_DONE_EINT2 */
5798 #define ARIZONA_HP1L_DONE_EINT2 0x0001 /* HP1L_DONE_EINT2 */
5799 #define ARIZONA_HP1L_DONE_EINT2_MASK 0x0001 /* HP1L_DONE_EINT2 */
5800 #define ARIZONA_HP1L_DONE_EINT2_SHIFT 0 /* HP1L_DONE_EINT2 */
5804 * R3347 (0xD13) - IRQ2 Status 4 (Alternate layout)
5809 #define ARIZONA_V2_AIF3_ERR_EINT2 0x8000 /* AIF3_ERR_EINT2 */
5810 #define ARIZONA_V2_AIF3_ERR_EINT2_MASK 0x8000 /* AIF3_ERR_EINT2 */
5813 #define ARIZONA_V2_AIF2_ERR_EINT2 0x4000 /* AIF2_ERR_EINT2 */
5814 #define ARIZONA_V2_AIF2_ERR_EINT2_MASK 0x4000 /* AIF2_ERR_EINT2 */
5817 #define ARIZONA_V2_AIF1_ERR_EINT2 0x2000 /* AIF1_ERR_EINT2 */
5818 #define ARIZONA_V2_AIF1_ERR_EINT2_MASK 0x2000 /* AIF1_ERR_EINT2 */
5821 #define ARIZONA_V2_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */
5822 #define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */
5825 #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */
5826 #define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */
5829 #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */
5830 #define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */
5833 #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2 0x0200 /* SYSCLK_ENA_LOW_EINT2 */
5834 #define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT2 */
5837 #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2 0x0100 /* ISRC1_CFG_ERR_EINT2 */
5838 #define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* ISRC1_CFG_ERR_EINT2 */
5841 #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2 0x0080 /* ISRC2_CFG_ERR_EINT2 */
5842 #define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* ISRC2_CFG_ERR_EINT2 */
5845 #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2 0x0040 /* ISRC3_CFG_ERR_EINT2 */
5846 #define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* ISRC3_CFG_ERR_EINT2 */
5851 * R3348 (0xD14) - IRQ2 Status 5
5853 #define ARIZONA_BOOT_DONE_EINT2 0x0100 /* BOOT_DONE_EINT2 */
5854 #define ARIZONA_BOOT_DONE_EINT2_MASK 0x0100 /* BOOT_DONE_EINT2 */
5857 #define ARIZONA_DCS_DAC_DONE_EINT2 0x0080 /* DCS_DAC_DONE_EINT2 */
5858 #define ARIZONA_DCS_DAC_DONE_EINT2_MASK 0x0080 /* DCS_DAC_DONE_EINT2 */
5861 #define ARIZONA_DCS_HP_DONE_EINT2 0x0040 /* DCS_HP_DONE_EINT2 */
5862 #define ARIZONA_DCS_HP_DONE_EINT2_MASK 0x0040 /* DCS_HP_DONE_EINT2 */
5865 #define ARIZONA_FLL2_CLOCK_OK_EINT2 0x0002 /* FLL2_CLOCK_OK_EINT2 */
5866 #define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* FLL2_CLOCK_OK_EINT2 */
5869 #define ARIZONA_FLL1_CLOCK_OK_EINT2 0x0001 /* FLL1_CLOCK_OK_EINT2 */
5870 #define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* FLL1_CLOCK_OK_EINT2 */
5871 #define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* FLL1_CLOCK_OK_EINT2 */
5875 * R3348 (0xD14) - IRQ2 Status 5 (Alternate layout)
5880 #define ARIZONA_V2_ASRC_CFG_ERR_EINT2 0x0008 /* ASRC_CFG_ERR_EINT2 */
5881 #define ARIZONA_V2_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* ASRC_CFG_ERR_EINT2 */
5886 * R3349 (0xD15) - IRQ2 Status 6
5888 #define ARIZONA_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */
5889 #define ARIZONA_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */
5892 #define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */
5893 #define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */
5896 #define ARIZONA_SPK1R_SHORT_EINT2 0x2000 /* SPK1R_SHORT_EINT2 */
5897 #define ARIZONA_SPK1R_SHORT_EINT2_MASK 0x2000 /* SPK1R_SHORT_EINT2 */
5900 #define ARIZONA_SPK1L_SHORT_EINT2 0x1000 /* SPK1L_SHORT_EINT2 */
5901 #define ARIZONA_SPK1L_SHORT_EINT2_MASK 0x1000 /* SPK1L_SHORT_EINT2 */
5904 #define ARIZONA_HP3R_SC_NEG_EINT2 0x0800 /* HP3R_SC_NEG_EINT2 */
5905 #define ARIZONA_HP3R_SC_NEG_EINT2_MASK 0x0800 /* HP3R_SC_NEG_EINT2 */
5908 #define ARIZONA_HP3R_SC_POS_EINT2 0x0400 /* HP3R_SC_POS_EINT2 */
5909 #define ARIZONA_HP3R_SC_POS_EINT2_MASK 0x0400 /* HP3R_SC_POS_EINT2 */
5912 #define ARIZONA_HP3L_SC_NEG_EINT2 0x0200 /* HP3L_SC_NEG_EINT2 */
5913 #define ARIZONA_HP3L_SC_NEG_EINT2_MASK 0x0200 /* HP3L_SC_NEG_EINT2 */
5916 #define ARIZONA_HP3L_SC_POS_EINT2 0x0100 /* HP3L_SC_POS_EINT2 */
5917 #define ARIZONA_HP3L_SC_POS_EINT2_MASK 0x0100 /* HP3L_SC_POS_EINT2 */
5920 #define ARIZONA_HP2R_SC_NEG_EINT2 0x0080 /* HP2R_SC_NEG_EINT2 */
5921 #define ARIZONA_HP2R_SC_NEG_EINT2_MASK 0x0080 /* HP2R_SC_NEG_EINT2 */
5924 #define ARIZONA_HP2R_SC_POS_EINT2 0x0040 /* HP2R_SC_POS_EINT2 */
5925 #define ARIZONA_HP2R_SC_POS_EINT2_MASK 0x0040 /* HP2R_SC_POS_EINT2 */
5928 #define ARIZONA_HP2L_SC_NEG_EINT2 0x0020 /* HP2L_SC_NEG_EINT2 */
5929 #define ARIZONA_HP2L_SC_NEG_EINT2_MASK 0x0020 /* HP2L_SC_NEG_EINT2 */
5932 #define ARIZONA_HP2L_SC_POS_EINT2 0x0010 /* HP2L_SC_POS_EINT2 */
5933 #define ARIZONA_HP2L_SC_POS_EINT2_MASK 0x0010 /* HP2L_SC_POS_EINT2 */
5936 #define ARIZONA_HP1R_SC_NEG_EINT2 0x0008 /* HP1R_SC_NEG_EINT2 */
5937 #define ARIZONA_HP1R_SC_NEG_EINT2_MASK 0x0008 /* HP1R_SC_NEG_EINT2 */
5940 #define ARIZONA_HP1R_SC_POS_EINT2 0x0004 /* HP1R_SC_POS_EINT2 */
5941 #define ARIZONA_HP1R_SC_POS_EINT2_MASK 0x0004 /* HP1R_SC_POS_EINT2 */
5944 #define ARIZONA_HP1L_SC_NEG_EINT2 0x0002 /* HP1L_SC_NEG_EINT2 */
5945 #define ARIZONA_HP1L_SC_NEG_EINT2_MASK 0x0002 /* HP1L_SC_NEG_EINT2 */
5948 #define ARIZONA_HP1L_SC_POS_EINT2 0x0001 /* HP1L_SC_POS_EINT2 */
5949 #define ARIZONA_HP1L_SC_POS_EINT2_MASK 0x0001 /* HP1L_SC_POS_EINT2 */
5950 #define ARIZONA_HP1L_SC_POS_EINT2_SHIFT 0 /* HP1L_SC_POS_EINT2 */
5954 * R3352 (0xD18) - IRQ2 Status 1 Mask
5956 #define ARIZONA_IM_GP4_EINT2 0x0008 /* IM_GP4_EINT2 */
5957 #define ARIZONA_IM_GP4_EINT2_MASK 0x0008 /* IM_GP4_EINT2 */
5960 #define ARIZONA_IM_GP3_EINT2 0x0004 /* IM_GP3_EINT2 */
5961 #define ARIZONA_IM_GP3_EINT2_MASK 0x0004 /* IM_GP3_EINT2 */
5964 #define ARIZONA_IM_GP2_EINT2 0x0002 /* IM_GP2_EINT2 */
5965 #define ARIZONA_IM_GP2_EINT2_MASK 0x0002 /* IM_GP2_EINT2 */
5968 #define ARIZONA_IM_GP1_EINT2 0x0001 /* IM_GP1_EINT2 */
5969 #define ARIZONA_IM_GP1_EINT2_MASK 0x0001 /* IM_GP1_EINT2 */
5970 #define ARIZONA_IM_GP1_EINT2_SHIFT 0 /* IM_GP1_EINT2 */
5974 * R3353 (0xD19) - IRQ2 Status 2 Mask
5976 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
5977 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
5980 #define ARIZONA_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */
5981 #define ARIZONA_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */
5984 #define ARIZONA_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */
5985 #define ARIZONA_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */
5986 #define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */
5990 * R3354 (0xD1A) - IRQ2 Status 3 Mask
5992 #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */
5993 #define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */
5996 #define ARIZONA_IM_SPK_OVERHEAT_EINT2 0x4000 /* IM_SPK_OVERHEAT_EINT2 */
5997 #define ARIZONA_IM_SPK_OVERHEAT_EINT2_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT2 */
6000 #define ARIZONA_IM_HPDET_EINT2 0x2000 /* IM_HPDET_EINT2 */
6001 #define ARIZONA_IM_HPDET_EINT2_MASK 0x2000 /* IM_HPDET_EINT2 */
6004 #define ARIZONA_IM_MICDET_EINT2 0x1000 /* IM_MICDET_EINT2 */
6005 #define ARIZONA_IM_MICDET_EINT2_MASK 0x1000 /* IM_MICDET_EINT2 */
6008 #define ARIZONA_IM_WSEQ_DONE_EINT2 0x0800 /* IM_WSEQ_DONE_EINT2 */
6009 #define ARIZONA_IM_WSEQ_DONE_EINT2_MASK 0x0800 /* IM_WSEQ_DONE_EINT2 */
6012 #define ARIZONA_IM_DRC2_SIG_DET_EINT2 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
6013 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
6016 #define ARIZONA_IM_DRC1_SIG_DET_EINT2 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
6017 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
6020 #define ARIZONA_IM_ASRC2_LOCK_EINT2 0x0100 /* IM_ASRC2_LOCK_EINT2 */
6021 #define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK 0x0100 /* IM_ASRC2_LOCK_EINT2 */
6024 #define ARIZONA_IM_ASRC1_LOCK_EINT2 0x0080 /* IM_ASRC1_LOCK_EINT2 */
6025 #define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK 0x0080 /* IM_ASRC1_LOCK_EINT2 */
6028 #define ARIZONA_IM_UNDERCLOCKED_EINT2 0x0040 /* IM_UNDERCLOCKED_EINT2 */
6029 #define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK 0x0040 /* IM_UNDERCLOCKED_EINT2 */
6032 #define ARIZONA_IM_OVERCLOCKED_EINT2 0x0020 /* IM_OVERCLOCKED_EINT2 */
6033 #define ARIZONA_IM_OVERCLOCKED_EINT2_MASK 0x0020 /* IM_OVERCLOCKED_EINT2 */
6036 #define ARIZONA_IM_FLL2_LOCK_EINT2 0x0008 /* IM_FLL2_LOCK_EINT2 */
6037 #define ARIZONA_IM_FLL2_LOCK_EINT2_MASK 0x0008 /* IM_FLL2_LOCK_EINT2 */
6040 #define ARIZONA_IM_FLL1_LOCK_EINT2 0x0004 /* IM_FLL1_LOCK_EINT2 */
6041 #define ARIZONA_IM_FLL1_LOCK_EINT2_MASK 0x0004 /* IM_FLL1_LOCK_EINT2 */
6044 #define ARIZONA_IM_CLKGEN_ERR_EINT2 0x0002 /* IM_CLKGEN_ERR_EINT2 */
6045 #define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK 0x0002 /* IM_CLKGEN_ERR_EINT2 */
6048 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6049 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6050 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
6054 * R3355 (0xD1B) - IRQ2 Status 4 Mask
6056 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
6057 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
6060 #define ARIZONA_IM_AIF3_ERR_EINT2 0x4000 /* IM_AIF3_ERR_EINT2 */
6061 #define ARIZONA_IM_AIF3_ERR_EINT2_MASK 0x4000 /* IM_AIF3_ERR_EINT2 */
6064 #define ARIZONA_IM_AIF2_ERR_EINT2 0x2000 /* IM_AIF2_ERR_EINT2 */
6065 #define ARIZONA_IM_AIF2_ERR_EINT2_MASK 0x2000 /* IM_AIF2_ERR_EINT2 */
6068 #define ARIZONA_IM_AIF1_ERR_EINT2 0x1000 /* IM_AIF1_ERR_EINT2 */
6069 #define ARIZONA_IM_AIF1_ERR_EINT2_MASK 0x1000 /* IM_AIF1_ERR_EINT2 */
6072 #define ARIZONA_IM_CTRLIF_ERR_EINT2 0x0800 /* IM_CTRLIF_ERR_EINT2 */
6073 #define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK 0x0800 /* IM_CTRLIF_ERR_EINT2 */
6076 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6077 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6080 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6081 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6084 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
6085 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
6088 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
6089 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
6092 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
6093 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
6096 #define ARIZONA_IM_HP3R_DONE_EINT2 0x0020 /* IM_HP3R_DONE_EINT2 */
6097 #define ARIZONA_IM_HP3R_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DONE_EINT2 */
6100 #define ARIZONA_IM_HP3L_DONE_EINT2 0x0010 /* IM_HP3L_DONE_EINT2 */
6101 #define ARIZONA_IM_HP3L_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DONE_EINT2 */
6104 #define ARIZONA_IM_HP2R_DONE_EINT2 0x0008 /* IM_HP2R_DONE_EINT2 */
6105 #define ARIZONA_IM_HP2R_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DONE_EINT2 */
6108 #define ARIZONA_IM_HP2L_DONE_EINT2 0x0004 /* IM_HP2L_DONE_EINT2 */
6109 #define ARIZONA_IM_HP2L_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DONE_EINT2 */
6112 #define ARIZONA_IM_HP1R_DONE_EINT2 0x0002 /* IM_HP1R_DONE_EINT2 */
6113 #define ARIZONA_IM_HP1R_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DONE_EINT2 */
6116 #define ARIZONA_IM_HP1L_DONE_EINT2 0x0001 /* IM_HP1L_DONE_EINT2 */
6117 #define ARIZONA_IM_HP1L_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DONE_EINT2 */
6118 #define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */
6122 * R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout)
6127 #define ARIZONA_V2_IM_AIF3_ERR_EINT2 0x8000 /* IM_AIF3_ERR_EINT2 */
6128 #define ARIZONA_V2_IM_AIF3_ERR_EINT2_MASK 0x8000 /* IM_AIF3_ERR_EINT2 */
6131 #define ARIZONA_V2_IM_AIF2_ERR_EINT2 0x4000 /* IM_AIF2_ERR_EINT2 */
6132 #define ARIZONA_V2_IM_AIF2_ERR_EINT2_MASK 0x4000 /* IM_AIF2_ERR_EINT2 */
6135 #define ARIZONA_V2_IM_AIF1_ERR_EINT2 0x2000 /* IM_AIF1_ERR_EINT2 */
6136 #define ARIZONA_V2_IM_AIF1_ERR_EINT2_MASK 0x2000 /* IM_AIF1_ERR_EINT2 */
6139 #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */
6140 #define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */
6143 #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6144 #define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
6147 #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6148 #define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
6151 #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */
6152 #define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */
6155 #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */
6156 #define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */
6159 #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */
6160 #define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */
6163 #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */
6164 #define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */
6169 * R3356 (0xD1C) - IRQ2 Status 5 Mask
6172 #define ARIZONA_IM_BOOT_DONE_EINT2 0x0100 /* IM_BOOT_DONE_EINT2 */
6173 #define ARIZONA_IM_BOOT_DONE_EINT2_MASK 0x0100 /* IM_BOOT_DONE_EINT2 */
6176 #define ARIZONA_IM_DCS_DAC_DONE_EINT2 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
6177 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
6180 #define ARIZONA_IM_DCS_HP_DONE_EINT2 0x0040 /* IM_DCS_HP_DONE_EINT2 */
6181 #define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK 0x0040 /* IM_DCS_HP_DONE_EINT2 */
6184 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
6185 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
6188 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
6189 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
6190 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT2 */
6194 * R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
6199 #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */
6200 #define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */
6205 * R3357 (0xD1D) - IRQ2 Status 6 Mask
6207 #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */
6208 #define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */
6211 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
6212 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
6215 #define ARIZONA_IM_SPK1R_SHORT_EINT2 0x2000 /* IM_SPK1R_SHORT_EINT2 */
6216 #define ARIZONA_IM_SPK1R_SHORT_EINT2_MASK 0x2000 /* IM_SPK1R_SHORT_EINT2 */
6219 #define ARIZONA_IM_SPK1L_SHORT_EINT2 0x1000 /* IM_SPK1L_SHORT_EINT2 */
6220 #define ARIZONA_IM_SPK1L_SHORT_EINT2_MASK 0x1000 /* IM_SPK1L_SHORT_EINT2 */
6223 #define ARIZONA_IM_HP3R_SC_NEG_EINT2 0x0800 /* IM_HP3R_SC_NEG_EINT2 */
6224 #define ARIZONA_IM_HP3R_SC_NEG_EINT2_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT2 */
6227 #define ARIZONA_IM_HP3R_SC_POS_EINT2 0x0400 /* IM_HP3R_SC_POS_EINT2 */
6228 #define ARIZONA_IM_HP3R_SC_POS_EINT2_MASK 0x0400 /* IM_HP3R_SC_POS_EINT2 */
6231 #define ARIZONA_IM_HP3L_SC_NEG_EINT2 0x0200 /* IM_HP3L_SC_NEG_EINT2 */
6232 #define ARIZONA_IM_HP3L_SC_NEG_EINT2_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT2 */
6235 #define ARIZONA_IM_HP3L_SC_POS_EINT2 0x0100 /* IM_HP3L_SC_POS_EINT2 */
6236 #define ARIZONA_IM_HP3L_SC_POS_EINT2_MASK 0x0100 /* IM_HP3L_SC_POS_EINT2 */
6239 #define ARIZONA_IM_HP2R_SC_NEG_EINT2 0x0080 /* IM_HP2R_SC_NEG_EINT2 */
6240 #define ARIZONA_IM_HP2R_SC_NEG_EINT2_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT2 */
6243 #define ARIZONA_IM_HP2R_SC_POS_EINT2 0x0040 /* IM_HP2R_SC_POS_EINT2 */
6244 #define ARIZONA_IM_HP2R_SC_POS_EINT2_MASK 0x0040 /* IM_HP2R_SC_POS_EINT2 */
6247 #define ARIZONA_IM_HP2L_SC_NEG_EINT2 0x0020 /* IM_HP2L_SC_NEG_EINT2 */
6248 #define ARIZONA_IM_HP2L_SC_NEG_EINT2_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT2 */
6251 #define ARIZONA_IM_HP2L_SC_POS_EINT2 0x0010 /* IM_HP2L_SC_POS_EINT2 */
6252 #define ARIZONA_IM_HP2L_SC_POS_EINT2_MASK 0x0010 /* IM_HP2L_SC_POS_EINT2 */
6255 #define ARIZONA_IM_HP1R_SC_NEG_EINT2 0x0008 /* IM_HP1R_SC_NEG_EINT2 */
6256 #define ARIZONA_IM_HP1R_SC_NEG_EINT2_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT2 */
6259 #define ARIZONA_IM_HP1R_SC_POS_EINT2 0x0004 /* IM_HP1R_SC_POS_EINT2 */
6260 #define ARIZONA_IM_HP1R_SC_POS_EINT2_MASK 0x0004 /* IM_HP1R_SC_POS_EINT2 */
6263 #define ARIZONA_IM_HP1L_SC_NEG_EINT2 0x0002 /* IM_HP1L_SC_NEG_EINT2 */
6264 #define ARIZONA_IM_HP1L_SC_NEG_EINT2_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT2 */
6267 #define ARIZONA_IM_HP1L_SC_POS_EINT2 0x0001 /* IM_HP1L_SC_POS_EINT2 */
6268 #define ARIZONA_IM_HP1L_SC_POS_EINT2_MASK 0x0001 /* IM_HP1L_SC_POS_EINT2 */
6269 #define ARIZONA_IM_HP1L_SC_POS_EINT2_SHIFT 0 /* IM_HP1L_SC_POS_EINT2 */
6273 * R3359 (0xD1F) - IRQ2 Control
6275 #define ARIZONA_IM_IRQ2 0x0001 /* IM_IRQ2 */
6276 #define ARIZONA_IM_IRQ2_MASK 0x0001 /* IM_IRQ2 */
6277 #define ARIZONA_IM_IRQ2_SHIFT 0 /* IM_IRQ2 */
6281 * R3360 (0xD20) - Interrupt Raw Status 2
6283 #define ARIZONA_DSP1_RAM_RDY_STS 0x0100 /* DSP1_RAM_RDY_STS */
6284 #define ARIZONA_DSP1_RAM_RDY_STS_MASK 0x0100 /* DSP1_RAM_RDY_STS */
6287 #define ARIZONA_DSP_IRQ2_STS 0x0002 /* DSP_IRQ2_STS */
6288 #define ARIZONA_DSP_IRQ2_STS_MASK 0x0002 /* DSP_IRQ2_STS */
6291 #define ARIZONA_DSP_IRQ1_STS 0x0001 /* DSP_IRQ1_STS */
6292 #define ARIZONA_DSP_IRQ1_STS_MASK 0x0001 /* DSP_IRQ1_STS */
6293 #define ARIZONA_DSP_IRQ1_STS_SHIFT 0 /* DSP_IRQ1_STS */
6297 * R3361 (0xD21) - Interrupt Raw Status 3
6299 #define ARIZONA_SPK_OVERHEAT_WARN_STS 0x8000 /* SPK_OVERHEAT_WARN_STS */
6300 #define ARIZONA_SPK_OVERHEAT_WARN_STS_MASK 0x8000 /* SPK_OVERHEAT_WARN_STS */
6303 #define ARIZONA_SPK_OVERHEAT_STS 0x4000 /* SPK_OVERHEAT_STS */
6304 #define ARIZONA_SPK_OVERHEAT_STS_MASK 0x4000 /* SPK_OVERHEAT_STS */
6307 #define ARIZONA_HPDET_STS 0x2000 /* HPDET_STS */
6308 #define ARIZONA_HPDET_STS_MASK 0x2000 /* HPDET_STS */
6311 #define ARIZONA_MICDET_STS 0x1000 /* MICDET_STS */
6312 #define ARIZONA_MICDET_STS_MASK 0x1000 /* MICDET_STS */
6315 #define ARIZONA_WSEQ_DONE_STS 0x0800 /* WSEQ_DONE_STS */
6316 #define ARIZONA_WSEQ_DONE_STS_MASK 0x0800 /* WSEQ_DONE_STS */
6319 #define ARIZONA_DRC2_SIG_DET_STS 0x0400 /* DRC2_SIG_DET_STS */
6320 #define ARIZONA_DRC2_SIG_DET_STS_MASK 0x0400 /* DRC2_SIG_DET_STS */
6323 #define ARIZONA_DRC1_SIG_DET_STS 0x0200 /* DRC1_SIG_DET_STS */
6324 #define ARIZONA_DRC1_SIG_DET_STS_MASK 0x0200 /* DRC1_SIG_DET_STS */
6327 #define ARIZONA_ASRC2_LOCK_STS 0x0100 /* ASRC2_LOCK_STS */
6328 #define ARIZONA_ASRC2_LOCK_STS_MASK 0x0100 /* ASRC2_LOCK_STS */
6331 #define ARIZONA_ASRC1_LOCK_STS 0x0080 /* ASRC1_LOCK_STS */
6332 #define ARIZONA_ASRC1_LOCK_STS_MASK 0x0080 /* ASRC1_LOCK_STS */
6335 #define ARIZONA_UNDERCLOCKED_STS 0x0040 /* UNDERCLOCKED_STS */
6336 #define ARIZONA_UNDERCLOCKED_STS_MASK 0x0040 /* UNDERCLOCKED_STS */
6339 #define ARIZONA_OVERCLOCKED_STS 0x0020 /* OVERCLOCKED_STS */
6340 #define ARIZONA_OVERCLOCKED_STS_MASK 0x0020 /* OVERCLOCKED_STS */
6343 #define ARIZONA_FLL2_LOCK_STS 0x0008 /* FLL2_LOCK_STS */
6344 #define ARIZONA_FLL2_LOCK_STS_MASK 0x0008 /* FLL2_LOCK_STS */
6347 #define ARIZONA_FLL1_LOCK_STS 0x0004 /* FLL1_LOCK_STS */
6348 #define ARIZONA_FLL1_LOCK_STS_MASK 0x0004 /* FLL1_LOCK_STS */
6351 #define ARIZONA_CLKGEN_ERR_STS 0x0002 /* CLKGEN_ERR_STS */
6352 #define ARIZONA_CLKGEN_ERR_STS_MASK 0x0002 /* CLKGEN_ERR_STS */
6355 #define ARIZONA_CLKGEN_ERR_ASYNC_STS 0x0001 /* CLKGEN_ERR_ASYNC_STS */
6356 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK 0x0001 /* CLKGEN_ERR_ASYNC_STS */
6357 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT 0 /* CLKGEN_ERR_ASYNC_STS */
6361 * R3362 (0xD22) - Interrupt Raw Status 4
6363 #define ARIZONA_ASRC_CFG_ERR_STS 0x8000 /* ASRC_CFG_ERR_STS */
6364 #define ARIZONA_ASRC_CFG_ERR_STS_MASK 0x8000 /* ASRC_CFG_ERR_STS */
6367 #define ARIZONA_AIF3_ERR_STS 0x4000 /* AIF3_ERR_STS */
6368 #define ARIZONA_AIF3_ERR_STS_MASK 0x4000 /* AIF3_ERR_STS */
6371 #define ARIZONA_AIF2_ERR_STS 0x2000 /* AIF2_ERR_STS */
6372 #define ARIZONA_AIF2_ERR_STS_MASK 0x2000 /* AIF2_ERR_STS */
6375 #define ARIZONA_AIF1_ERR_STS 0x1000 /* AIF1_ERR_STS */
6376 #define ARIZONA_AIF1_ERR_STS_MASK 0x1000 /* AIF1_ERR_STS */
6379 #define ARIZONA_CTRLIF_ERR_STS 0x0800 /* CTRLIF_ERR_STS */
6380 #define ARIZONA_CTRLIF_ERR_STS_MASK 0x0800 /* CTRLIF_ERR_STS */
6383 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
6384 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
6387 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
6388 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
6391 #define ARIZONA_SYSCLK_ENA_LOW_STS 0x0100 /* SYSCLK_ENA_LOW_STS */
6392 #define ARIZONA_SYSCLK_ENA_LOW_STS_MASK 0x0100 /* SYSCLK_ENA_LOW_STS */
6395 #define ARIZONA_ISRC1_CFG_ERR_STS 0x0080 /* ISRC1_CFG_ERR_STS */
6396 #define ARIZONA_ISRC1_CFG_ERR_STS_MASK 0x0080 /* ISRC1_CFG_ERR_STS */
6399 #define ARIZONA_ISRC2_CFG_ERR_STS 0x0040 /* ISRC2_CFG_ERR_STS */
6400 #define ARIZONA_ISRC2_CFG_ERR_STS_MASK 0x0040 /* ISRC2_CFG_ERR_STS */
6403 #define ARIZONA_HP3R_DONE_STS 0x0020 /* HP3R_DONE_STS */
6404 #define ARIZONA_HP3R_DONE_STS_MASK 0x0020 /* HP3R_DONE_STS */
6407 #define ARIZONA_HP3L_DONE_STS 0x0010 /* HP3L_DONE_STS */
6408 #define ARIZONA_HP3L_DONE_STS_MASK 0x0010 /* HP3L_DONE_STS */
6411 #define ARIZONA_HP2R_DONE_STS 0x0008 /* HP2R_DONE_STS */
6412 #define ARIZONA_HP2R_DONE_STS_MASK 0x0008 /* HP2R_DONE_STS */
6415 #define ARIZONA_HP2L_DONE_STS 0x0004 /* HP2L_DONE_STS */
6416 #define ARIZONA_HP2L_DONE_STS_MASK 0x0004 /* HP2L_DONE_STS */
6419 #define ARIZONA_HP1R_DONE_STS 0x0002 /* HP1R_DONE_STS */
6420 #define ARIZONA_HP1R_DONE_STS_MASK 0x0002 /* HP1R_DONE_STS */
6423 #define ARIZONA_HP1L_DONE_STS 0x0001 /* HP1L_DONE_STS */
6424 #define ARIZONA_HP1L_DONE_STS_MASK 0x0001 /* HP1L_DONE_STS */
6425 #define ARIZONA_HP1L_DONE_STS_SHIFT 0 /* HP1L_DONE_STS */
6429 * R3363 (0xD23) - Interrupt Raw Status 5
6431 #define ARIZONA_BOOT_DONE_STS 0x0100 /* BOOT_DONE_STS */
6432 #define ARIZONA_BOOT_DONE_STS_MASK 0x0100 /* BOOT_DONE_STS */
6435 #define ARIZONA_DCS_DAC_DONE_STS 0x0080 /* DCS_DAC_DONE_STS */
6436 #define ARIZONA_DCS_DAC_DONE_STS_MASK 0x0080 /* DCS_DAC_DONE_STS */
6439 #define ARIZONA_DCS_HP_DONE_STS 0x0040 /* DCS_HP_DONE_STS */
6440 #define ARIZONA_DCS_HP_DONE_STS_MASK 0x0040 /* DCS_HP_DONE_STS */
6443 #define ARIZONA_FLL2_CLOCK_OK_STS 0x0002 /* FLL2_CLOCK_OK_STS */
6444 #define ARIZONA_FLL2_CLOCK_OK_STS_MASK 0x0002 /* FLL2_CLOCK_OK_STS */
6447 #define ARIZONA_FLL1_CLOCK_OK_STS 0x0001 /* FLL1_CLOCK_OK_STS */
6448 #define ARIZONA_FLL1_CLOCK_OK_STS_MASK 0x0001 /* FLL1_CLOCK_OK_STS */
6449 #define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT 0 /* FLL1_CLOCK_OK_STS */
6453 * R3364 (0xD24) - Interrupt Raw Status 6
6455 #define ARIZONA_PWM_OVERCLOCKED_STS 0x2000 /* PWM_OVERCLOCKED_STS */
6456 #define ARIZONA_PWM_OVERCLOCKED_STS_MASK 0x2000 /* PWM_OVERCLOCKED_STS */
6459 #define ARIZONA_FX_CORE_OVERCLOCKED_STS 0x1000 /* FX_CORE_OVERCLOCKED_STS */
6460 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK 0x1000 /* FX_CORE_OVERCLOCKED_STS */
6463 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
6464 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
6467 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
6468 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
6471 #define ARIZONA_ADC_OVERCLOCKED_STS 0x0100 /* ADC_OVERCLOCKED_STS */
6472 #define ARIZONA_ADC_OVERCLOCKED_STS_MASK 0x0100 /* ADC_OVERCLOCKED_STS */
6475 #define ARIZONA_MIXER_OVERCLOCKED_STS 0x0080 /* MIXER_OVERCLOCKED_STS */
6476 #define ARIZONA_MIXER_OVERCLOCKED_STS_MASK 0x0080 /* MIXER_OVERCLOCKED_STS */
6479 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
6480 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
6483 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
6484 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
6487 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
6488 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
6491 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
6492 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
6495 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
6496 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
6499 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
6500 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
6503 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
6504 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
6505 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT 0 /* PAD_CTRL_OVERCLOCKED_STS */
6509 * R3365 (0xD25) - Interrupt Raw Status 7
6511 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6512 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
6515 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6516 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
6519 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6520 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
6523 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6524 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
6527 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6528 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
6531 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6532 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
6535 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6536 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
6539 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
6540 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
6543 #define ARIZONA_ISRC3_OVERCLOCKED_STS 0x0004 /* ISRC3_OVERCLOCKED_STS */
6544 #define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK 0x0004 /* ISRC3_OVERCLOCKED_STS */
6547 #define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */
6548 #define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */
6551 #define ARIZONA_ISRC1_OVERCLOCKED_STS 0x0001 /* ISRC1_OVERCLOCKED_STS */
6552 #define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK 0x0001 /* ISRC1_OVERCLOCKED_STS */
6553 #define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT 0 /* ISRC1_OVERCLOCKED_STS */
6557 * R3366 (0xD26) - Interrupt Raw Status 8
6559 #define ARIZONA_SPDIF_OVERCLOCKED_STS 0x8000 /* SPDIF_OVERCLOCKED_STS */
6560 #define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK 0x8000 /* SPDIF_OVERCLOCKED_STS */
6563 #define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */
6564 #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */
6567 #define ARIZONA_AIF2_UNDERCLOCKED_STS 0x0200 /* AIF2_UNDERCLOCKED_STS */
6568 #define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK 0x0200 /* AIF2_UNDERCLOCKED_STS */
6571 #define ARIZONA_AIF1_UNDERCLOCKED_STS 0x0100 /* AIF1_UNDERCLOCKED_STS */
6572 #define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK 0x0100 /* AIF1_UNDERCLOCKED_STS */
6575 #define ARIZONA_ISRC3_UNDERCLOCKED_STS 0x0080 /* ISRC3_UNDERCLOCKED_STS */
6576 #define ARIZONA_ISRC3_UNDERCLOCKED_STS_MASK 0x0080 /* ISRC3_UNDERCLOCKED_STS */
6579 #define ARIZONA_ISRC2_UNDERCLOCKED_STS 0x0040 /* ISRC2_UNDERCLOCKED_STS */
6580 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK 0x0040 /* ISRC2_UNDERCLOCKED_STS */
6583 #define ARIZONA_ISRC1_UNDERCLOCKED_STS 0x0020 /* ISRC1_UNDERCLOCKED_STS */
6584 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK 0x0020 /* ISRC1_UNDERCLOCKED_STS */
6587 #define ARIZONA_FX_UNDERCLOCKED_STS 0x0010 /* FX_UNDERCLOCKED_STS */
6588 #define ARIZONA_FX_UNDERCLOCKED_STS_MASK 0x0010 /* FX_UNDERCLOCKED_STS */
6591 #define ARIZONA_ASRC_UNDERCLOCKED_STS 0x0008 /* ASRC_UNDERCLOCKED_STS */
6592 #define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK 0x0008 /* ASRC_UNDERCLOCKED_STS */
6595 #define ARIZONA_DAC_UNDERCLOCKED_STS 0x0004 /* DAC_UNDERCLOCKED_STS */
6596 #define ARIZONA_DAC_UNDERCLOCKED_STS_MASK 0x0004 /* DAC_UNDERCLOCKED_STS */
6599 #define ARIZONA_ADC_UNDERCLOCKED_STS 0x0002 /* ADC_UNDERCLOCKED_STS */
6600 #define ARIZONA_ADC_UNDERCLOCKED_STS_MASK 0x0002 /* ADC_UNDERCLOCKED_STS */
6603 #define ARIZONA_MIXER_UNDERCLOCKED_STS 0x0001 /* MIXER_UNDERCLOCKED_STS */
6604 #define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK 0x0001 /* MIXER_UNDERCLOCKED_STS */
6605 #define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */
6609 * R3368 (0xD28) - Interrupt Raw Status 9
6611 #define ARIZONA_DSP_SHARED_WR_COLL_STS 0x8000 /* DSP_SHARED_WR_COLL_STS */
6612 #define ARIZONA_DSP_SHARED_WR_COLL_STS_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS */
6615 #define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */
6616 #define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */
6619 #define ARIZONA_SPK1R_SHORT_STS 0x2000 /* SPK1R_SHORT_STS */
6620 #define ARIZONA_SPK1R_SHORT_STS_MASK 0x2000 /* SPK1R_SHORT_STS */
6623 #define ARIZONA_SPK1L_SHORT_STS 0x1000 /* SPK1L_SHORT_STS */
6624 #define ARIZONA_SPK1L_SHORT_STS_MASK 0x1000 /* SPK1L_SHORT_STS */
6627 #define ARIZONA_HP3R_SC_NEG_STS 0x0800 /* HP3R_SC_NEG_STS */
6628 #define ARIZONA_HP3R_SC_NEG_STS_MASK 0x0800 /* HP3R_SC_NEG_STS */
6631 #define ARIZONA_HP3R_SC_POS_STS 0x0400 /* HP3R_SC_POS_STS */
6632 #define ARIZONA_HP3R_SC_POS_STS_MASK 0x0400 /* HP3R_SC_POS_STS */
6635 #define ARIZONA_HP3L_SC_NEG_STS 0x0200 /* HP3L_SC_NEG_STS */
6636 #define ARIZONA_HP3L_SC_NEG_STS_MASK 0x0200 /* HP3L_SC_NEG_STS */
6639 #define ARIZONA_HP3L_SC_POS_STS 0x0100 /* HP3L_SC_POS_STS */
6640 #define ARIZONA_HP3L_SC_POS_STS_MASK 0x0100 /* HP3L_SC_POS_STS */
6643 #define ARIZONA_HP2R_SC_NEG_STS 0x0080 /* HP2R_SC_NEG_STS */
6644 #define ARIZONA_HP2R_SC_NEG_STS_MASK 0x0080 /* HP2R_SC_NEG_STS */
6647 #define ARIZONA_HP2R_SC_POS_STS 0x0040 /* HP2R_SC_POS_STS */
6648 #define ARIZONA_HP2R_SC_POS_STS_MASK 0x0040 /* HP2R_SC_POS_STS */
6651 #define ARIZONA_HP2L_SC_NEG_STS 0x0020 /* HP2L_SC_NEG_STS */
6652 #define ARIZONA_HP2L_SC_NEG_STS_MASK 0x0020 /* HP2L_SC_NEG_STS */
6655 #define ARIZONA_HP2L_SC_POS_STS 0x0010 /* HP2L_SC_POS_STS */
6656 #define ARIZONA_HP2L_SC_POS_STS_MASK 0x0010 /* HP2L_SC_POS_STS */
6659 #define ARIZONA_HP1R_SC_NEG_STS 0x0008 /* HP1R_SC_NEG_STS */
6660 #define ARIZONA_HP1R_SC_NEG_STS_MASK 0x0008 /* HP1R_SC_NEG_STS */
6663 #define ARIZONA_HP1R_SC_POS_STS 0x0004 /* HP1R_SC_POS_STS */
6664 #define ARIZONA_HP1R_SC_POS_STS_MASK 0x0004 /* HP1R_SC_POS_STS */
6667 #define ARIZONA_HP1L_SC_NEG_STS 0x0002 /* HP1L_SC_NEG_STS */
6668 #define ARIZONA_HP1L_SC_NEG_STS_MASK 0x0002 /* HP1L_SC_NEG_STS */
6671 #define ARIZONA_HP1L_SC_POS_STS 0x0001 /* HP1L_SC_POS_STS */
6672 #define ARIZONA_HP1L_SC_POS_STS_MASK 0x0001 /* HP1L_SC_POS_STS */
6673 #define ARIZONA_HP1L_SC_POS_STS_SHIFT 0 /* HP1L_SC_POS_STS */
6677 * R3392 (0xD40) - IRQ Pin Status
6679 #define ARIZONA_IRQ2_STS 0x0002 /* IRQ2_STS */
6680 #define ARIZONA_IRQ2_STS_MASK 0x0002 /* IRQ2_STS */
6683 #define ARIZONA_IRQ1_STS 0x0001 /* IRQ1_STS */
6684 #define ARIZONA_IRQ1_STS_MASK 0x0001 /* IRQ1_STS */
6685 #define ARIZONA_IRQ1_STS_SHIFT 0 /* IRQ1_STS */
6689 * R3393 (0xD41) - ADSP2 IRQ0
6691 #define ARIZONA_DSP_IRQ2 0x0002 /* DSP_IRQ2 */
6692 #define ARIZONA_DSP_IRQ2_MASK 0x0002 /* DSP_IRQ2 */
6695 #define ARIZONA_DSP_IRQ1 0x0001 /* DSP_IRQ1 */
6696 #define ARIZONA_DSP_IRQ1_MASK 0x0001 /* DSP_IRQ1 */
6697 #define ARIZONA_DSP_IRQ1_SHIFT 0 /* DSP_IRQ1 */
6701 * R3408 (0xD50) - AOD wkup and trig
6703 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS 0x0080 /* MICD_CLAMP_FALL_TRIG_STS */
6704 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_MASK 0x0080 /* MICD_CLAMP_FALL_TRIG_STS */
6707 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS 0x0040 /* MICD_CLAMP_RISE_TRIG_STS */
6708 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_MASK 0x0040 /* MICD_CLAMP_RISE_TRIG_STS */
6711 #define ARIZONA_GP5_FALL_TRIG_STS 0x0020 /* GP5_FALL_TRIG_STS */
6712 #define ARIZONA_GP5_FALL_TRIG_STS_MASK 0x0020 /* GP5_FALL_TRIG_STS */
6715 #define ARIZONA_GP5_RISE_TRIG_STS 0x0010 /* GP5_RISE_TRIG_STS */
6716 #define ARIZONA_GP5_RISE_TRIG_STS_MASK 0x0010 /* GP5_RISE_TRIG_STS */
6719 #define ARIZONA_JD1_FALL_TRIG_STS 0x0008 /* JD1_FALL_TRIG_STS */
6720 #define ARIZONA_JD1_FALL_TRIG_STS_MASK 0x0008 /* JD1_FALL_TRIG_STS */
6723 #define ARIZONA_JD1_RISE_TRIG_STS 0x0004 /* JD1_RISE_TRIG_STS */
6724 #define ARIZONA_JD1_RISE_TRIG_STS_MASK 0x0004 /* JD1_RISE_TRIG_STS */
6727 #define ARIZONA_JD2_FALL_TRIG_STS 0x0002 /* JD2_FALL_TRIG_STS */
6728 #define ARIZONA_JD2_FALL_TRIG_STS_MASK 0x0002 /* JD2_FALL_TRIG_STS */
6731 #define ARIZONA_JD2_RISE_TRIG_STS 0x0001 /* JD2_RISE_TRIG_STS */
6732 #define ARIZONA_JD2_RISE_TRIG_STS_MASK 0x0001 /* JD2_RISE_TRIG_STS */
6733 #define ARIZONA_JD2_RISE_TRIG_STS_SHIFT 0 /* JD2_RISE_TRIG_STS */
6737 * R3409 (0xD51) - AOD IRQ1
6739 #define ARIZONA_MICD_CLAMP_FALL_EINT1 0x0080 /* MICD_CLAMP_FALL_EINT1 */
6740 #define ARIZONA_MICD_CLAMP_FALL_EINT1_MASK 0x0080 /* MICD_CLAMP_FALL_EINT1 */
6742 #define ARIZONA_MICD_CLAMP_RISE_EINT1 0x0040 /* MICD_CLAMP_RISE_EINT1 */
6743 #define ARIZONA_MICD_CLAMP_RISE_EINT1_MASK 0x0040 /* MICD_CLAMP_RISE_EINT1 */
6745 #define ARIZONA_GP5_FALL_EINT1 0x0020 /* GP5_FALL_EINT1 */
6746 #define ARIZONA_GP5_FALL_EINT1_MASK 0x0020 /* GP5_FALL_EINT1 */
6749 #define ARIZONA_GP5_RISE_EINT1 0x0010 /* GP5_RISE_EINT1 */
6750 #define ARIZONA_GP5_RISE_EINT1_MASK 0x0010 /* GP5_RISE_EINT1 */
6753 #define ARIZONA_JD1_FALL_EINT1 0x0008 /* JD1_FALL_EINT1 */
6754 #define ARIZONA_JD1_FALL_EINT1_MASK 0x0008 /* JD1_FALL_EINT1 */
6757 #define ARIZONA_JD1_RISE_EINT1 0x0004 /* JD1_RISE_EINT1 */
6758 #define ARIZONA_JD1_RISE_EINT1_MASK 0x0004 /* JD1_RISE_EINT1 */
6761 #define ARIZONA_JD2_FALL_EINT1 0x0002 /* JD2_FALL_EINT1 */
6762 #define ARIZONA_JD2_FALL_EINT1_MASK 0x0002 /* JD2_FALL_EINT1 */
6765 #define ARIZONA_JD2_RISE_EINT1 0x0001 /* JD2_RISE_EINT1 */
6766 #define ARIZONA_JD2_RISE_EINT1_MASK 0x0001 /* JD2_RISE_EINT1 */
6767 #define ARIZONA_JD2_RISE_EINT1_SHIFT 0 /* JD2_RISE_EINT1 */
6771 * R3410 (0xD52) - AOD IRQ2
6773 #define ARIZONA_MICD_CLAMP_FALL_EINT2 0x0080 /* MICD_CLAMP_FALL_EINT2 */
6774 #define ARIZONA_MICD_CLAMP_FALL_EINT2_MASK 0x0080 /* MICD_CLAMP_FALL_EINT2 */
6776 #define ARIZONA_MICD_CLAMP_RISE_EINT2 0x0040 /* MICD_CLAMP_RISE_EINT2 */
6777 #define ARIZONA_MICD_CLAMP_RISE_EINT2_MASK 0x0040 /* MICD_CLAMP_RISE_EINT2 */
6779 #define ARIZONA_GP5_FALL_EINT2 0x0020 /* GP5_FALL_EINT2 */
6780 #define ARIZONA_GP5_FALL_EINT2_MASK 0x0020 /* GP5_FALL_EINT2 */
6783 #define ARIZONA_GP5_RISE_EINT2 0x0010 /* GP5_RISE_EINT2 */
6784 #define ARIZONA_GP5_RISE_EINT2_MASK 0x0010 /* GP5_RISE_EINT2 */
6787 #define ARIZONA_JD1_FALL_EINT2 0x0008 /* JD1_FALL_EINT2 */
6788 #define ARIZONA_JD1_FALL_EINT2_MASK 0x0008 /* JD1_FALL_EINT2 */
6791 #define ARIZONA_JD1_RISE_EINT2 0x0004 /* JD1_RISE_EINT2 */
6792 #define ARIZONA_JD1_RISE_EINT2_MASK 0x0004 /* JD1_RISE_EINT2 */
6795 #define ARIZONA_JD2_FALL_EINT2 0x0002 /* JD2_FALL_EINT2 */
6796 #define ARIZONA_JD2_FALL_EINT2_MASK 0x0002 /* JD2_FALL_EINT2 */
6799 #define ARIZONA_JD2_RISE_EINT2 0x0001 /* JD2_RISE_EINT2 */
6800 #define ARIZONA_JD2_RISE_EINT2_MASK 0x0001 /* JD2_RISE_EINT2 */
6801 #define ARIZONA_JD2_RISE_EINT2_SHIFT 0 /* JD2_RISE_EINT2 */
6805 * R3411 (0xD53) - AOD IRQ Mask IRQ1
6807 #define ARIZONA_IM_GP5_FALL_EINT1 0x0020 /* IM_GP5_FALL_EINT1 */
6808 #define ARIZONA_IM_GP5_FALL_EINT1_MASK 0x0020 /* IM_GP5_FALL_EINT1 */
6811 #define ARIZONA_IM_GP5_RISE_EINT1 0x0010 /* IM_GP5_RISE_EINT1 */
6812 #define ARIZONA_IM_GP5_RISE_EINT1_MASK 0x0010 /* IM_GP5_RISE_EINT1 */
6815 #define ARIZONA_IM_JD1_FALL_EINT1 0x0008 /* IM_JD1_FALL_EINT1 */
6816 #define ARIZONA_IM_JD1_FALL_EINT1_MASK 0x0008 /* IM_JD1_FALL_EINT1 */
6819 #define ARIZONA_IM_JD1_RISE_EINT1 0x0004 /* IM_JD1_RISE_EINT1 */
6820 #define ARIZONA_IM_JD1_RISE_EINT1_MASK 0x0004 /* IM_JD1_RISE_EINT1 */
6823 #define ARIZONA_IM_JD2_FALL_EINT1 0x0002 /* IM_JD2_FALL_EINT1 */
6824 #define ARIZONA_IM_JD2_FALL_EINT1_MASK 0x0002 /* IM_JD2_FALL_EINT1 */
6827 #define ARIZONA_IM_JD2_RISE_EINT1 0x0001 /* IM_JD2_RISE_EINT1 */
6828 #define ARIZONA_IM_JD2_RISE_EINT1_MASK 0x0001 /* IM_JD2_RISE_EINT1 */
6829 #define ARIZONA_IM_JD2_RISE_EINT1_SHIFT 0 /* IM_JD2_RISE_EINT1 */
6833 * R3412 (0xD54) - AOD IRQ Mask IRQ2
6835 #define ARIZONA_IM_GP5_FALL_EINT2 0x0020 /* IM_GP5_FALL_EINT2 */
6836 #define ARIZONA_IM_GP5_FALL_EINT2_MASK 0x0020 /* IM_GP5_FALL_EINT2 */
6839 #define ARIZONA_IM_GP5_RISE_EINT2 0x0010 /* IM_GP5_RISE_EINT2 */
6840 #define ARIZONA_IM_GP5_RISE_EINT2_MASK 0x0010 /* IM_GP5_RISE_EINT2 */
6843 #define ARIZONA_IM_JD1_FALL_EINT2 0x0008 /* IM_JD1_FALL_EINT2 */
6844 #define ARIZONA_IM_JD1_FALL_EINT2_MASK 0x0008 /* IM_JD1_FALL_EINT2 */
6847 #define ARIZONA_IM_JD1_RISE_EINT2 0x0004 /* IM_JD1_RISE_EINT2 */
6848 #define ARIZONA_IM_JD1_RISE_EINT2_MASK 0x0004 /* IM_JD1_RISE_EINT2 */
6851 #define ARIZONA_IM_JD2_FALL_EINT2 0x0002 /* IM_JD2_FALL_EINT2 */
6852 #define ARIZONA_IM_JD2_FALL_EINT2_MASK 0x0002 /* IM_JD2_FALL_EINT2 */
6855 #define ARIZONA_IM_JD2_RISE_EINT2 0x0001 /* IM_JD2_RISE_EINT2 */
6856 #define ARIZONA_IM_JD2_RISE_EINT2_MASK 0x0001 /* IM_JD2_RISE_EINT2 */
6857 #define ARIZONA_IM_JD2_RISE_EINT2_SHIFT 0 /* IM_JD2_RISE_EINT2 */
6861 * R3413 (0xD55) - AOD IRQ Raw Status
6863 #define ARIZONA_MICD_CLAMP_STS 0x0008 /* MICD_CLAMP_STS */
6864 #define ARIZONA_MICD_CLAMP_STS_MASK 0x0008 /* MICD_CLAMP_STS */
6867 #define ARIZONA_GP5_STS 0x0004 /* GP5_STS */
6868 #define ARIZONA_GP5_STS_MASK 0x0004 /* GP5_STS */
6871 #define ARIZONA_JD2_STS 0x0002 /* JD2_STS */
6872 #define ARIZONA_JD2_STS_MASK 0x0002 /* JD2_STS */
6875 #define ARIZONA_JD1_STS 0x0001 /* JD1_STS */
6876 #define ARIZONA_JD1_STS_MASK 0x0001 /* JD1_STS */
6877 #define ARIZONA_JD1_STS_SHIFT 0 /* JD1_STS */
6881 * R3414 (0xD56) - Jack detect debounce
6883 #define ARIZONA_MICD_CLAMP_DB 0x0008 /* MICD_CLAMP_DB */
6884 #define ARIZONA_MICD_CLAMP_DB_MASK 0x0008 /* MICD_CLAMP_DB */
6887 #define ARIZONA_JD2_DB 0x0002 /* JD2_DB */
6888 #define ARIZONA_JD2_DB_MASK 0x0002 /* JD2_DB */
6891 #define ARIZONA_JD1_DB 0x0001 /* JD1_DB */
6892 #define ARIZONA_JD1_DB_MASK 0x0001 /* JD1_DB */
6893 #define ARIZONA_JD1_DB_SHIFT 0 /* JD1_DB */
6897 * R3584 (0xE00) - FX_Ctrl1
6899 #define ARIZONA_FX_RATE_MASK 0x7800 /* FX_RATE - [14:11] */
6904 * R3585 (0xE01) - FX_Ctrl2
6906 #define ARIZONA_FX_STS_MASK 0xFFF0 /* FX_STS - [15:4] */
6911 * R3600 (0xE10) - EQ1_1
6913 #define ARIZONA_EQ1_B1_GAIN_MASK 0xF800 /* EQ1_B1_GAIN - [15:11] */
6916 #define ARIZONA_EQ1_B2_GAIN_MASK 0x07C0 /* EQ1_B2_GAIN - [10:6] */
6919 #define ARIZONA_EQ1_B3_GAIN_MASK 0x003E /* EQ1_B3_GAIN - [5:1] */
6922 #define ARIZONA_EQ1_ENA 0x0001 /* EQ1_ENA */
6923 #define ARIZONA_EQ1_ENA_MASK 0x0001 /* EQ1_ENA */
6924 #define ARIZONA_EQ1_ENA_SHIFT 0 /* EQ1_ENA */
6928 * R3601 (0xE11) - EQ1_2
6930 #define ARIZONA_EQ1_B4_GAIN_MASK 0xF800 /* EQ1_B4_GAIN - [15:11] */
6933 #define ARIZONA_EQ1_B5_GAIN_MASK 0x07C0 /* EQ1_B5_GAIN - [10:6] */
6936 #define ARIZONA_EQ1_B1_MODE 0x0001 /* EQ1_B1_MODE */
6937 #define ARIZONA_EQ1_B1_MODE_MASK 0x0001 /* EQ1_B1_MODE */
6938 #define ARIZONA_EQ1_B1_MODE_SHIFT 0 /* EQ1_B1_MODE */
6942 * R3602 (0xE12) - EQ1_3
6944 #define ARIZONA_EQ1_B1_A_MASK 0xFFFF /* EQ1_B1_A - [15:0] */
6945 #define ARIZONA_EQ1_B1_A_SHIFT 0 /* EQ1_B1_A - [15:0] */
6946 #define ARIZONA_EQ1_B1_A_WIDTH 16 /* EQ1_B1_A - [15:0] */
6949 * R3603 (0xE13) - EQ1_4
6951 #define ARIZONA_EQ1_B1_B_MASK 0xFFFF /* EQ1_B1_B - [15:0] */
6952 #define ARIZONA_EQ1_B1_B_SHIFT 0 /* EQ1_B1_B - [15:0] */
6953 #define ARIZONA_EQ1_B1_B_WIDTH 16 /* EQ1_B1_B - [15:0] */
6956 * R3604 (0xE14) - EQ1_5
6958 #define ARIZONA_EQ1_B1_PG_MASK 0xFFFF /* EQ1_B1_PG - [15:0] */
6959 #define ARIZONA_EQ1_B1_PG_SHIFT 0 /* EQ1_B1_PG - [15:0] */
6960 #define ARIZONA_EQ1_B1_PG_WIDTH 16 /* EQ1_B1_PG - [15:0] */
6963 * R3605 (0xE15) - EQ1_6
6965 #define ARIZONA_EQ1_B2_A_MASK 0xFFFF /* EQ1_B2_A - [15:0] */
6966 #define ARIZONA_EQ1_B2_A_SHIFT 0 /* EQ1_B2_A - [15:0] */
6967 #define ARIZONA_EQ1_B2_A_WIDTH 16 /* EQ1_B2_A - [15:0] */
6970 * R3606 (0xE16) - EQ1_7
6972 #define ARIZONA_EQ1_B2_B_MASK 0xFFFF /* EQ1_B2_B - [15:0] */
6973 #define ARIZONA_EQ1_B2_B_SHIFT 0 /* EQ1_B2_B - [15:0] */
6974 #define ARIZONA_EQ1_B2_B_WIDTH 16 /* EQ1_B2_B - [15:0] */
6977 * R3607 (0xE17) - EQ1_8
6979 #define ARIZONA_EQ1_B2_C_MASK 0xFFFF /* EQ1_B2_C - [15:0] */
6980 #define ARIZONA_EQ1_B2_C_SHIFT 0 /* EQ1_B2_C - [15:0] */
6981 #define ARIZONA_EQ1_B2_C_WIDTH 16 /* EQ1_B2_C - [15:0] */
6984 * R3608 (0xE18) - EQ1_9
6986 #define ARIZONA_EQ1_B2_PG_MASK 0xFFFF /* EQ1_B2_PG - [15:0] */
6987 #define ARIZONA_EQ1_B2_PG_SHIFT 0 /* EQ1_B2_PG - [15:0] */
6988 #define ARIZONA_EQ1_B2_PG_WIDTH 16 /* EQ1_B2_PG - [15:0] */
6991 * R3609 (0xE19) - EQ1_10
6993 #define ARIZONA_EQ1_B3_A_MASK 0xFFFF /* EQ1_B3_A - [15:0] */
6994 #define ARIZONA_EQ1_B3_A_SHIFT 0 /* EQ1_B3_A - [15:0] */
6995 #define ARIZONA_EQ1_B3_A_WIDTH 16 /* EQ1_B3_A - [15:0] */
6998 * R3610 (0xE1A) - EQ1_11
7000 #define ARIZONA_EQ1_B3_B_MASK 0xFFFF /* EQ1_B3_B - [15:0] */
7001 #define ARIZONA_EQ1_B3_B_SHIFT 0 /* EQ1_B3_B - [15:0] */
7002 #define ARIZONA_EQ1_B3_B_WIDTH 16 /* EQ1_B3_B - [15:0] */
7005 * R3611 (0xE1B) - EQ1_12
7007 #define ARIZONA_EQ1_B3_C_MASK 0xFFFF /* EQ1_B3_C - [15:0] */
7008 #define ARIZONA_EQ1_B3_C_SHIFT 0 /* EQ1_B3_C - [15:0] */
7009 #define ARIZONA_EQ1_B3_C_WIDTH 16 /* EQ1_B3_C - [15:0] */
7012 * R3612 (0xE1C) - EQ1_13
7014 #define ARIZONA_EQ1_B3_PG_MASK 0xFFFF /* EQ1_B3_PG - [15:0] */
7015 #define ARIZONA_EQ1_B3_PG_SHIFT 0 /* EQ1_B3_PG - [15:0] */
7016 #define ARIZONA_EQ1_B3_PG_WIDTH 16 /* EQ1_B3_PG - [15:0] */
7019 * R3613 (0xE1D) - EQ1_14
7021 #define ARIZONA_EQ1_B4_A_MASK 0xFFFF /* EQ1_B4_A - [15:0] */
7022 #define ARIZONA_EQ1_B4_A_SHIFT 0 /* EQ1_B4_A - [15:0] */
7023 #define ARIZONA_EQ1_B4_A_WIDTH 16 /* EQ1_B4_A - [15:0] */
7026 * R3614 (0xE1E) - EQ1_15
7028 #define ARIZONA_EQ1_B4_B_MASK 0xFFFF /* EQ1_B4_B - [15:0] */
7029 #define ARIZONA_EQ1_B4_B_SHIFT 0 /* EQ1_B4_B - [15:0] */
7030 #define ARIZONA_EQ1_B4_B_WIDTH 16 /* EQ1_B4_B - [15:0] */
7033 * R3615 (0xE1F) - EQ1_16
7035 #define ARIZONA_EQ1_B4_C_MASK 0xFFFF /* EQ1_B4_C - [15:0] */
7036 #define ARIZONA_EQ1_B4_C_SHIFT 0 /* EQ1_B4_C - [15:0] */
7037 #define ARIZONA_EQ1_B4_C_WIDTH 16 /* EQ1_B4_C - [15:0] */
7040 * R3616 (0xE20) - EQ1_17
7042 #define ARIZONA_EQ1_B4_PG_MASK 0xFFFF /* EQ1_B4_PG - [15:0] */
7043 #define ARIZONA_EQ1_B4_PG_SHIFT 0 /* EQ1_B4_PG - [15:0] */
7044 #define ARIZONA_EQ1_B4_PG_WIDTH 16 /* EQ1_B4_PG - [15:0] */
7047 * R3617 (0xE21) - EQ1_18
7049 #define ARIZONA_EQ1_B5_A_MASK 0xFFFF /* EQ1_B5_A - [15:0] */
7050 #define ARIZONA_EQ1_B5_A_SHIFT 0 /* EQ1_B5_A - [15:0] */
7051 #define ARIZONA_EQ1_B5_A_WIDTH 16 /* EQ1_B5_A - [15:0] */
7054 * R3618 (0xE22) - EQ1_19
7056 #define ARIZONA_EQ1_B5_B_MASK 0xFFFF /* EQ1_B5_B - [15:0] */
7057 #define ARIZONA_EQ1_B5_B_SHIFT 0 /* EQ1_B5_B - [15:0] */
7058 #define ARIZONA_EQ1_B5_B_WIDTH 16 /* EQ1_B5_B - [15:0] */
7061 * R3619 (0xE23) - EQ1_20
7063 #define ARIZONA_EQ1_B5_PG_MASK 0xFFFF /* EQ1_B5_PG - [15:0] */
7064 #define ARIZONA_EQ1_B5_PG_SHIFT 0 /* EQ1_B5_PG - [15:0] */
7065 #define ARIZONA_EQ1_B5_PG_WIDTH 16 /* EQ1_B5_PG - [15:0] */
7068 * R3620 (0xE24) - EQ1_21
7070 #define ARIZONA_EQ1_B1_C_MASK 0xFFFF /* EQ1_B1_C - [15:0] */
7071 #define ARIZONA_EQ1_B1_C_SHIFT 0 /* EQ1_B1_C - [15:0] */
7072 #define ARIZONA_EQ1_B1_C_WIDTH 16 /* EQ1_B1_C - [15:0] */
7075 * R3622 (0xE26) - EQ2_1
7077 #define ARIZONA_EQ2_B1_GAIN_MASK 0xF800 /* EQ2_B1_GAIN - [15:11] */
7080 #define ARIZONA_EQ2_B2_GAIN_MASK 0x07C0 /* EQ2_B2_GAIN - [10:6] */
7083 #define ARIZONA_EQ2_B3_GAIN_MASK 0x003E /* EQ2_B3_GAIN - [5:1] */
7086 #define ARIZONA_EQ2_ENA 0x0001 /* EQ2_ENA */
7087 #define ARIZONA_EQ2_ENA_MASK 0x0001 /* EQ2_ENA */
7088 #define ARIZONA_EQ2_ENA_SHIFT 0 /* EQ2_ENA */
7092 * R3623 (0xE27) - EQ2_2
7094 #define ARIZONA_EQ2_B4_GAIN_MASK 0xF800 /* EQ2_B4_GAIN - [15:11] */
7097 #define ARIZONA_EQ2_B5_GAIN_MASK 0x07C0 /* EQ2_B5_GAIN - [10:6] */
7100 #define ARIZONA_EQ2_B1_MODE 0x0001 /* EQ2_B1_MODE */
7101 #define ARIZONA_EQ2_B1_MODE_MASK 0x0001 /* EQ2_B1_MODE */
7102 #define ARIZONA_EQ2_B1_MODE_SHIFT 0 /* EQ2_B1_MODE */
7106 * R3624 (0xE28) - EQ2_3
7108 #define ARIZONA_EQ2_B1_A_MASK 0xFFFF /* EQ2_B1_A - [15:0] */
7109 #define ARIZONA_EQ2_B1_A_SHIFT 0 /* EQ2_B1_A - [15:0] */
7110 #define ARIZONA_EQ2_B1_A_WIDTH 16 /* EQ2_B1_A - [15:0] */
7113 * R3625 (0xE29) - EQ2_4
7115 #define ARIZONA_EQ2_B1_B_MASK 0xFFFF /* EQ2_B1_B - [15:0] */
7116 #define ARIZONA_EQ2_B1_B_SHIFT 0 /* EQ2_B1_B - [15:0] */
7117 #define ARIZONA_EQ2_B1_B_WIDTH 16 /* EQ2_B1_B - [15:0] */
7120 * R3626 (0xE2A) - EQ2_5
7122 #define ARIZONA_EQ2_B1_PG_MASK 0xFFFF /* EQ2_B1_PG - [15:0] */
7123 #define ARIZONA_EQ2_B1_PG_SHIFT 0 /* EQ2_B1_PG - [15:0] */
7124 #define ARIZONA_EQ2_B1_PG_WIDTH 16 /* EQ2_B1_PG - [15:0] */
7127 * R3627 (0xE2B) - EQ2_6
7129 #define ARIZONA_EQ2_B2_A_MASK 0xFFFF /* EQ2_B2_A - [15:0] */
7130 #define ARIZONA_EQ2_B2_A_SHIFT 0 /* EQ2_B2_A - [15:0] */
7131 #define ARIZONA_EQ2_B2_A_WIDTH 16 /* EQ2_B2_A - [15:0] */
7134 * R3628 (0xE2C) - EQ2_7
7136 #define ARIZONA_EQ2_B2_B_MASK 0xFFFF /* EQ2_B2_B - [15:0] */
7137 #define ARIZONA_EQ2_B2_B_SHIFT 0 /* EQ2_B2_B - [15:0] */
7138 #define ARIZONA_EQ2_B2_B_WIDTH 16 /* EQ2_B2_B - [15:0] */
7141 * R3629 (0xE2D) - EQ2_8
7143 #define ARIZONA_EQ2_B2_C_MASK 0xFFFF /* EQ2_B2_C - [15:0] */
7144 #define ARIZONA_EQ2_B2_C_SHIFT 0 /* EQ2_B2_C - [15:0] */
7145 #define ARIZONA_EQ2_B2_C_WIDTH 16 /* EQ2_B2_C - [15:0] */
7148 * R3630 (0xE2E) - EQ2_9
7150 #define ARIZONA_EQ2_B2_PG_MASK 0xFFFF /* EQ2_B2_PG - [15:0] */
7151 #define ARIZONA_EQ2_B2_PG_SHIFT 0 /* EQ2_B2_PG - [15:0] */
7152 #define ARIZONA_EQ2_B2_PG_WIDTH 16 /* EQ2_B2_PG - [15:0] */
7155 * R3631 (0xE2F) - EQ2_10
7157 #define ARIZONA_EQ2_B3_A_MASK 0xFFFF /* EQ2_B3_A - [15:0] */
7158 #define ARIZONA_EQ2_B3_A_SHIFT 0 /* EQ2_B3_A - [15:0] */
7159 #define ARIZONA_EQ2_B3_A_WIDTH 16 /* EQ2_B3_A - [15:0] */
7162 * R3632 (0xE30) - EQ2_11
7164 #define ARIZONA_EQ2_B3_B_MASK 0xFFFF /* EQ2_B3_B - [15:0] */
7165 #define ARIZONA_EQ2_B3_B_SHIFT 0 /* EQ2_B3_B - [15:0] */
7166 #define ARIZONA_EQ2_B3_B_WIDTH 16 /* EQ2_B3_B - [15:0] */
7169 * R3633 (0xE31) - EQ2_12
7171 #define ARIZONA_EQ2_B3_C_MASK 0xFFFF /* EQ2_B3_C - [15:0] */
7172 #define ARIZONA_EQ2_B3_C_SHIFT 0 /* EQ2_B3_C - [15:0] */
7173 #define ARIZONA_EQ2_B3_C_WIDTH 16 /* EQ2_B3_C - [15:0] */
7176 * R3634 (0xE32) - EQ2_13
7178 #define ARIZONA_EQ2_B3_PG_MASK 0xFFFF /* EQ2_B3_PG - [15:0] */
7179 #define ARIZONA_EQ2_B3_PG_SHIFT 0 /* EQ2_B3_PG - [15:0] */
7180 #define ARIZONA_EQ2_B3_PG_WIDTH 16 /* EQ2_B3_PG - [15:0] */
7183 * R3635 (0xE33) - EQ2_14
7185 #define ARIZONA_EQ2_B4_A_MASK 0xFFFF /* EQ2_B4_A - [15:0] */
7186 #define ARIZONA_EQ2_B4_A_SHIFT 0 /* EQ2_B4_A - [15:0] */
7187 #define ARIZONA_EQ2_B4_A_WIDTH 16 /* EQ2_B4_A - [15:0] */
7190 * R3636 (0xE34) - EQ2_15
7192 #define ARIZONA_EQ2_B4_B_MASK 0xFFFF /* EQ2_B4_B - [15:0] */
7193 #define ARIZONA_EQ2_B4_B_SHIFT 0 /* EQ2_B4_B - [15:0] */
7194 #define ARIZONA_EQ2_B4_B_WIDTH 16 /* EQ2_B4_B - [15:0] */
7197 * R3637 (0xE35) - EQ2_16
7199 #define ARIZONA_EQ2_B4_C_MASK 0xFFFF /* EQ2_B4_C - [15:0] */
7200 #define ARIZONA_EQ2_B4_C_SHIFT 0 /* EQ2_B4_C - [15:0] */
7201 #define ARIZONA_EQ2_B4_C_WIDTH 16 /* EQ2_B4_C - [15:0] */
7204 * R3638 (0xE36) - EQ2_17
7206 #define ARIZONA_EQ2_B4_PG_MASK 0xFFFF /* EQ2_B4_PG - [15:0] */
7207 #define ARIZONA_EQ2_B4_PG_SHIFT 0 /* EQ2_B4_PG - [15:0] */
7208 #define ARIZONA_EQ2_B4_PG_WIDTH 16 /* EQ2_B4_PG - [15:0] */
7211 * R3639 (0xE37) - EQ2_18
7213 #define ARIZONA_EQ2_B5_A_MASK 0xFFFF /* EQ2_B5_A - [15:0] */
7214 #define ARIZONA_EQ2_B5_A_SHIFT 0 /* EQ2_B5_A - [15:0] */
7215 #define ARIZONA_EQ2_B5_A_WIDTH 16 /* EQ2_B5_A - [15:0] */
7218 * R3640 (0xE38) - EQ2_19
7220 #define ARIZONA_EQ2_B5_B_MASK 0xFFFF /* EQ2_B5_B - [15:0] */
7221 #define ARIZONA_EQ2_B5_B_SHIFT 0 /* EQ2_B5_B - [15:0] */
7222 #define ARIZONA_EQ2_B5_B_WIDTH 16 /* EQ2_B5_B - [15:0] */
7225 * R3641 (0xE39) - EQ2_20
7227 #define ARIZONA_EQ2_B5_PG_MASK 0xFFFF /* EQ2_B5_PG - [15:0] */
7228 #define ARIZONA_EQ2_B5_PG_SHIFT 0 /* EQ2_B5_PG - [15:0] */
7229 #define ARIZONA_EQ2_B5_PG_WIDTH 16 /* EQ2_B5_PG - [15:0] */
7232 * R3642 (0xE3A) - EQ2_21
7234 #define ARIZONA_EQ2_B1_C_MASK 0xFFFF /* EQ2_B1_C - [15:0] */
7235 #define ARIZONA_EQ2_B1_C_SHIFT 0 /* EQ2_B1_C - [15:0] */
7236 #define ARIZONA_EQ2_B1_C_WIDTH 16 /* EQ2_B1_C - [15:0] */
7239 * R3644 (0xE3C) - EQ3_1
7241 #define ARIZONA_EQ3_B1_GAIN_MASK 0xF800 /* EQ3_B1_GAIN - [15:11] */
7244 #define ARIZONA_EQ3_B2_GAIN_MASK 0x07C0 /* EQ3_B2_GAIN - [10:6] */
7247 #define ARIZONA_EQ3_B3_GAIN_MASK 0x003E /* EQ3_B3_GAIN - [5:1] */
7250 #define ARIZONA_EQ3_ENA 0x0001 /* EQ3_ENA */
7251 #define ARIZONA_EQ3_ENA_MASK 0x0001 /* EQ3_ENA */
7252 #define ARIZONA_EQ3_ENA_SHIFT 0 /* EQ3_ENA */
7256 * R3645 (0xE3D) - EQ3_2
7258 #define ARIZONA_EQ3_B4_GAIN_MASK 0xF800 /* EQ3_B4_GAIN - [15:11] */
7261 #define ARIZONA_EQ3_B5_GAIN_MASK 0x07C0 /* EQ3_B5_GAIN - [10:6] */
7264 #define ARIZONA_EQ3_B1_MODE 0x0001 /* EQ3_B1_MODE */
7265 #define ARIZONA_EQ3_B1_MODE_MASK 0x0001 /* EQ3_B1_MODE */
7266 #define ARIZONA_EQ3_B1_MODE_SHIFT 0 /* EQ3_B1_MODE */
7270 * R3646 (0xE3E) - EQ3_3
7272 #define ARIZONA_EQ3_B1_A_MASK 0xFFFF /* EQ3_B1_A - [15:0] */
7273 #define ARIZONA_EQ3_B1_A_SHIFT 0 /* EQ3_B1_A - [15:0] */
7274 #define ARIZONA_EQ3_B1_A_WIDTH 16 /* EQ3_B1_A - [15:0] */
7277 * R3647 (0xE3F) - EQ3_4
7279 #define ARIZONA_EQ3_B1_B_MASK 0xFFFF /* EQ3_B1_B - [15:0] */
7280 #define ARIZONA_EQ3_B1_B_SHIFT 0 /* EQ3_B1_B - [15:0] */
7281 #define ARIZONA_EQ3_B1_B_WIDTH 16 /* EQ3_B1_B - [15:0] */
7284 * R3648 (0xE40) - EQ3_5
7286 #define ARIZONA_EQ3_B1_PG_MASK 0xFFFF /* EQ3_B1_PG - [15:0] */
7287 #define ARIZONA_EQ3_B1_PG_SHIFT 0 /* EQ3_B1_PG - [15:0] */
7288 #define ARIZONA_EQ3_B1_PG_WIDTH 16 /* EQ3_B1_PG - [15:0] */
7291 * R3649 (0xE41) - EQ3_6
7293 #define ARIZONA_EQ3_B2_A_MASK 0xFFFF /* EQ3_B2_A - [15:0] */
7294 #define ARIZONA_EQ3_B2_A_SHIFT 0 /* EQ3_B2_A - [15:0] */
7295 #define ARIZONA_EQ3_B2_A_WIDTH 16 /* EQ3_B2_A - [15:0] */
7298 * R3650 (0xE42) - EQ3_7
7300 #define ARIZONA_EQ3_B2_B_MASK 0xFFFF /* EQ3_B2_B - [15:0] */
7301 #define ARIZONA_EQ3_B2_B_SHIFT 0 /* EQ3_B2_B - [15:0] */
7302 #define ARIZONA_EQ3_B2_B_WIDTH 16 /* EQ3_B2_B - [15:0] */
7305 * R3651 (0xE43) - EQ3_8
7307 #define ARIZONA_EQ3_B2_C_MASK 0xFFFF /* EQ3_B2_C - [15:0] */
7308 #define ARIZONA_EQ3_B2_C_SHIFT 0 /* EQ3_B2_C - [15:0] */
7309 #define ARIZONA_EQ3_B2_C_WIDTH 16 /* EQ3_B2_C - [15:0] */
7312 * R3652 (0xE44) - EQ3_9
7314 #define ARIZONA_EQ3_B2_PG_MASK 0xFFFF /* EQ3_B2_PG - [15:0] */
7315 #define ARIZONA_EQ3_B2_PG_SHIFT 0 /* EQ3_B2_PG - [15:0] */
7316 #define ARIZONA_EQ3_B2_PG_WIDTH 16 /* EQ3_B2_PG - [15:0] */
7319 * R3653 (0xE45) - EQ3_10
7321 #define ARIZONA_EQ3_B3_A_MASK 0xFFFF /* EQ3_B3_A - [15:0] */
7322 #define ARIZONA_EQ3_B3_A_SHIFT 0 /* EQ3_B3_A - [15:0] */
7323 #define ARIZONA_EQ3_B3_A_WIDTH 16 /* EQ3_B3_A - [15:0] */
7326 * R3654 (0xE46) - EQ3_11
7328 #define ARIZONA_EQ3_B3_B_MASK 0xFFFF /* EQ3_B3_B - [15:0] */
7329 #define ARIZONA_EQ3_B3_B_SHIFT 0 /* EQ3_B3_B - [15:0] */
7330 #define ARIZONA_EQ3_B3_B_WIDTH 16 /* EQ3_B3_B - [15:0] */
7333 * R3655 (0xE47) - EQ3_12
7335 #define ARIZONA_EQ3_B3_C_MASK 0xFFFF /* EQ3_B3_C - [15:0] */
7336 #define ARIZONA_EQ3_B3_C_SHIFT 0 /* EQ3_B3_C - [15:0] */
7337 #define ARIZONA_EQ3_B3_C_WIDTH 16 /* EQ3_B3_C - [15:0] */
7340 * R3656 (0xE48) - EQ3_13
7342 #define ARIZONA_EQ3_B3_PG_MASK 0xFFFF /* EQ3_B3_PG - [15:0] */
7343 #define ARIZONA_EQ3_B3_PG_SHIFT 0 /* EQ3_B3_PG - [15:0] */
7344 #define ARIZONA_EQ3_B3_PG_WIDTH 16 /* EQ3_B3_PG - [15:0] */
7347 * R3657 (0xE49) - EQ3_14
7349 #define ARIZONA_EQ3_B4_A_MASK 0xFFFF /* EQ3_B4_A - [15:0] */
7350 #define ARIZONA_EQ3_B4_A_SHIFT 0 /* EQ3_B4_A - [15:0] */
7351 #define ARIZONA_EQ3_B4_A_WIDTH 16 /* EQ3_B4_A - [15:0] */
7354 * R3658 (0xE4A) - EQ3_15
7356 #define ARIZONA_EQ3_B4_B_MASK 0xFFFF /* EQ3_B4_B - [15:0] */
7357 #define ARIZONA_EQ3_B4_B_SHIFT 0 /* EQ3_B4_B - [15:0] */
7358 #define ARIZONA_EQ3_B4_B_WIDTH 16 /* EQ3_B4_B - [15:0] */
7361 * R3659 (0xE4B) - EQ3_16
7363 #define ARIZONA_EQ3_B4_C_MASK 0xFFFF /* EQ3_B4_C - [15:0] */
7364 #define ARIZONA_EQ3_B4_C_SHIFT 0 /* EQ3_B4_C - [15:0] */
7365 #define ARIZONA_EQ3_B4_C_WIDTH 16 /* EQ3_B4_C - [15:0] */
7368 * R3660 (0xE4C) - EQ3_17
7370 #define ARIZONA_EQ3_B4_PG_MASK 0xFFFF /* EQ3_B4_PG - [15:0] */
7371 #define ARIZONA_EQ3_B4_PG_SHIFT 0 /* EQ3_B4_PG - [15:0] */
7372 #define ARIZONA_EQ3_B4_PG_WIDTH 16 /* EQ3_B4_PG - [15:0] */
7375 * R3661 (0xE4D) - EQ3_18
7377 #define ARIZONA_EQ3_B5_A_MASK 0xFFFF /* EQ3_B5_A - [15:0] */
7378 #define ARIZONA_EQ3_B5_A_SHIFT 0 /* EQ3_B5_A - [15:0] */
7379 #define ARIZONA_EQ3_B5_A_WIDTH 16 /* EQ3_B5_A - [15:0] */
7382 * R3662 (0xE4E) - EQ3_19
7384 #define ARIZONA_EQ3_B5_B_MASK 0xFFFF /* EQ3_B5_B - [15:0] */
7385 #define ARIZONA_EQ3_B5_B_SHIFT 0 /* EQ3_B5_B - [15:0] */
7386 #define ARIZONA_EQ3_B5_B_WIDTH 16 /* EQ3_B5_B - [15:0] */
7389 * R3663 (0xE4F) - EQ3_20
7391 #define ARIZONA_EQ3_B5_PG_MASK 0xFFFF /* EQ3_B5_PG - [15:0] */
7392 #define ARIZONA_EQ3_B5_PG_SHIFT 0 /* EQ3_B5_PG - [15:0] */
7393 #define ARIZONA_EQ3_B5_PG_WIDTH 16 /* EQ3_B5_PG - [15:0] */
7396 * R3664 (0xE50) - EQ3_21
7398 #define ARIZONA_EQ3_B1_C_MASK 0xFFFF /* EQ3_B1_C - [15:0] */
7399 #define ARIZONA_EQ3_B1_C_SHIFT 0 /* EQ3_B1_C - [15:0] */
7400 #define ARIZONA_EQ3_B1_C_WIDTH 16 /* EQ3_B1_C - [15:0] */
7403 * R3666 (0xE52) - EQ4_1
7405 #define ARIZONA_EQ4_B1_GAIN_MASK 0xF800 /* EQ4_B1_GAIN - [15:11] */
7408 #define ARIZONA_EQ4_B2_GAIN_MASK 0x07C0 /* EQ4_B2_GAIN - [10:6] */
7411 #define ARIZONA_EQ4_B3_GAIN_MASK 0x003E /* EQ4_B3_GAIN - [5:1] */
7414 #define ARIZONA_EQ4_ENA 0x0001 /* EQ4_ENA */
7415 #define ARIZONA_EQ4_ENA_MASK 0x0001 /* EQ4_ENA */
7416 #define ARIZONA_EQ4_ENA_SHIFT 0 /* EQ4_ENA */
7420 * R3667 (0xE53) - EQ4_2
7422 #define ARIZONA_EQ4_B4_GAIN_MASK 0xF800 /* EQ4_B4_GAIN - [15:11] */
7425 #define ARIZONA_EQ4_B5_GAIN_MASK 0x07C0 /* EQ4_B5_GAIN - [10:6] */
7428 #define ARIZONA_EQ4_B1_MODE 0x0001 /* EQ4_B1_MODE */
7429 #define ARIZONA_EQ4_B1_MODE_MASK 0x0001 /* EQ4_B1_MODE */
7430 #define ARIZONA_EQ4_B1_MODE_SHIFT 0 /* EQ4_B1_MODE */
7434 * R3668 (0xE54) - EQ4_3
7436 #define ARIZONA_EQ4_B1_A_MASK 0xFFFF /* EQ4_B1_A - [15:0] */
7437 #define ARIZONA_EQ4_B1_A_SHIFT 0 /* EQ4_B1_A - [15:0] */
7438 #define ARIZONA_EQ4_B1_A_WIDTH 16 /* EQ4_B1_A - [15:0] */
7441 * R3669 (0xE55) - EQ4_4
7443 #define ARIZONA_EQ4_B1_B_MASK 0xFFFF /* EQ4_B1_B - [15:0] */
7444 #define ARIZONA_EQ4_B1_B_SHIFT 0 /* EQ4_B1_B - [15:0] */
7445 #define ARIZONA_EQ4_B1_B_WIDTH 16 /* EQ4_B1_B - [15:0] */
7448 * R3670 (0xE56) - EQ4_5
7450 #define ARIZONA_EQ4_B1_PG_MASK 0xFFFF /* EQ4_B1_PG - [15:0] */
7451 #define ARIZONA_EQ4_B1_PG_SHIFT 0 /* EQ4_B1_PG - [15:0] */
7452 #define ARIZONA_EQ4_B1_PG_WIDTH 16 /* EQ4_B1_PG - [15:0] */
7455 * R3671 (0xE57) - EQ4_6
7457 #define ARIZONA_EQ4_B2_A_MASK 0xFFFF /* EQ4_B2_A - [15:0] */
7458 #define ARIZONA_EQ4_B2_A_SHIFT 0 /* EQ4_B2_A - [15:0] */
7459 #define ARIZONA_EQ4_B2_A_WIDTH 16 /* EQ4_B2_A - [15:0] */
7462 * R3672 (0xE58) - EQ4_7
7464 #define ARIZONA_EQ4_B2_B_MASK 0xFFFF /* EQ4_B2_B - [15:0] */
7465 #define ARIZONA_EQ4_B2_B_SHIFT 0 /* EQ4_B2_B - [15:0] */
7466 #define ARIZONA_EQ4_B2_B_WIDTH 16 /* EQ4_B2_B - [15:0] */
7469 * R3673 (0xE59) - EQ4_8
7471 #define ARIZONA_EQ4_B2_C_MASK 0xFFFF /* EQ4_B2_C - [15:0] */
7472 #define ARIZONA_EQ4_B2_C_SHIFT 0 /* EQ4_B2_C - [15:0] */
7473 #define ARIZONA_EQ4_B2_C_WIDTH 16 /* EQ4_B2_C - [15:0] */
7476 * R3674 (0xE5A) - EQ4_9
7478 #define ARIZONA_EQ4_B2_PG_MASK 0xFFFF /* EQ4_B2_PG - [15:0] */
7479 #define ARIZONA_EQ4_B2_PG_SHIFT 0 /* EQ4_B2_PG - [15:0] */
7480 #define ARIZONA_EQ4_B2_PG_WIDTH 16 /* EQ4_B2_PG - [15:0] */
7483 * R3675 (0xE5B) - EQ4_10
7485 #define ARIZONA_EQ4_B3_A_MASK 0xFFFF /* EQ4_B3_A - [15:0] */
7486 #define ARIZONA_EQ4_B3_A_SHIFT 0 /* EQ4_B3_A - [15:0] */
7487 #define ARIZONA_EQ4_B3_A_WIDTH 16 /* EQ4_B3_A - [15:0] */
7490 * R3676 (0xE5C) - EQ4_11
7492 #define ARIZONA_EQ4_B3_B_MASK 0xFFFF /* EQ4_B3_B - [15:0] */
7493 #define ARIZONA_EQ4_B3_B_SHIFT 0 /* EQ4_B3_B - [15:0] */
7494 #define ARIZONA_EQ4_B3_B_WIDTH 16 /* EQ4_B3_B - [15:0] */
7497 * R3677 (0xE5D) - EQ4_12
7499 #define ARIZONA_EQ4_B3_C_MASK 0xFFFF /* EQ4_B3_C - [15:0] */
7500 #define ARIZONA_EQ4_B3_C_SHIFT 0 /* EQ4_B3_C - [15:0] */
7501 #define ARIZONA_EQ4_B3_C_WIDTH 16 /* EQ4_B3_C - [15:0] */
7504 * R3678 (0xE5E) - EQ4_13
7506 #define ARIZONA_EQ4_B3_PG_MASK 0xFFFF /* EQ4_B3_PG - [15:0] */
7507 #define ARIZONA_EQ4_B3_PG_SHIFT 0 /* EQ4_B3_PG - [15:0] */
7508 #define ARIZONA_EQ4_B3_PG_WIDTH 16 /* EQ4_B3_PG - [15:0] */
7511 * R3679 (0xE5F) - EQ4_14
7513 #define ARIZONA_EQ4_B4_A_MASK 0xFFFF /* EQ4_B4_A - [15:0] */
7514 #define ARIZONA_EQ4_B4_A_SHIFT 0 /* EQ4_B4_A - [15:0] */
7515 #define ARIZONA_EQ4_B4_A_WIDTH 16 /* EQ4_B4_A - [15:0] */
7518 * R3680 (0xE60) - EQ4_15
7520 #define ARIZONA_EQ4_B4_B_MASK 0xFFFF /* EQ4_B4_B - [15:0] */
7521 #define ARIZONA_EQ4_B4_B_SHIFT 0 /* EQ4_B4_B - [15:0] */
7522 #define ARIZONA_EQ4_B4_B_WIDTH 16 /* EQ4_B4_B - [15:0] */
7525 * R3681 (0xE61) - EQ4_16
7527 #define ARIZONA_EQ4_B4_C_MASK 0xFFFF /* EQ4_B4_C - [15:0] */
7528 #define ARIZONA_EQ4_B4_C_SHIFT 0 /* EQ4_B4_C - [15:0] */
7529 #define ARIZONA_EQ4_B4_C_WIDTH 16 /* EQ4_B4_C - [15:0] */
7532 * R3682 (0xE62) - EQ4_17
7534 #define ARIZONA_EQ4_B4_PG_MASK 0xFFFF /* EQ4_B4_PG - [15:0] */
7535 #define ARIZONA_EQ4_B4_PG_SHIFT 0 /* EQ4_B4_PG - [15:0] */
7536 #define ARIZONA_EQ4_B4_PG_WIDTH 16 /* EQ4_B4_PG - [15:0] */
7539 * R3683 (0xE63) - EQ4_18
7541 #define ARIZONA_EQ4_B5_A_MASK 0xFFFF /* EQ4_B5_A - [15:0] */
7542 #define ARIZONA_EQ4_B5_A_SHIFT 0 /* EQ4_B5_A - [15:0] */
7543 #define ARIZONA_EQ4_B5_A_WIDTH 16 /* EQ4_B5_A - [15:0] */
7546 * R3684 (0xE64) - EQ4_19
7548 #define ARIZONA_EQ4_B5_B_MASK 0xFFFF /* EQ4_B5_B - [15:0] */
7549 #define ARIZONA_EQ4_B5_B_SHIFT 0 /* EQ4_B5_B - [15:0] */
7550 #define ARIZONA_EQ4_B5_B_WIDTH 16 /* EQ4_B5_B - [15:0] */
7553 * R3685 (0xE65) - EQ4_20
7555 #define ARIZONA_EQ4_B5_PG_MASK 0xFFFF /* EQ4_B5_PG - [15:0] */
7556 #define ARIZONA_EQ4_B5_PG_SHIFT 0 /* EQ4_B5_PG - [15:0] */
7557 #define ARIZONA_EQ4_B5_PG_WIDTH 16 /* EQ4_B5_PG - [15:0] */
7560 * R3686 (0xE66) - EQ4_21
7562 #define ARIZONA_EQ4_B1_C_MASK 0xFFFF /* EQ4_B1_C - [15:0] */
7563 #define ARIZONA_EQ4_B1_C_SHIFT 0 /* EQ4_B1_C - [15:0] */
7564 #define ARIZONA_EQ4_B1_C_WIDTH 16 /* EQ4_B1_C - [15:0] */
7567 * R3712 (0xE80) - DRC1 ctrl1
7569 #define ARIZONA_DRC1_SIG_DET_RMS_MASK 0xF800 /* DRC1_SIG_DET_RMS - [15:11] */
7572 #define ARIZONA_DRC1_SIG_DET_PK_MASK 0x0600 /* DRC1_SIG_DET_PK - [10:9] */
7575 #define ARIZONA_DRC1_NG_ENA 0x0100 /* DRC1_NG_ENA */
7576 #define ARIZONA_DRC1_NG_ENA_MASK 0x0100 /* DRC1_NG_ENA */
7579 #define ARIZONA_DRC1_SIG_DET_MODE 0x0080 /* DRC1_SIG_DET_MODE */
7580 #define ARIZONA_DRC1_SIG_DET_MODE_MASK 0x0080 /* DRC1_SIG_DET_MODE */
7583 #define ARIZONA_DRC1_SIG_DET 0x0040 /* DRC1_SIG_DET */
7584 #define ARIZONA_DRC1_SIG_DET_MASK 0x0040 /* DRC1_SIG_DET */
7587 #define ARIZONA_DRC1_KNEE2_OP_ENA 0x0020 /* DRC1_KNEE2_OP_ENA */
7588 #define ARIZONA_DRC1_KNEE2_OP_ENA_MASK 0x0020 /* DRC1_KNEE2_OP_ENA */
7591 #define ARIZONA_DRC1_QR 0x0010 /* DRC1_QR */
7592 #define ARIZONA_DRC1_QR_MASK 0x0010 /* DRC1_QR */
7595 #define ARIZONA_DRC1_ANTICLIP 0x0008 /* DRC1_ANTICLIP */
7596 #define ARIZONA_DRC1_ANTICLIP_MASK 0x0008 /* DRC1_ANTICLIP */
7599 #define ARIZONA_DRC1L_ENA 0x0002 /* DRC1L_ENA */
7600 #define ARIZONA_DRC1L_ENA_MASK 0x0002 /* DRC1L_ENA */
7603 #define ARIZONA_DRC1R_ENA 0x0001 /* DRC1R_ENA */
7604 #define ARIZONA_DRC1R_ENA_MASK 0x0001 /* DRC1R_ENA */
7605 #define ARIZONA_DRC1R_ENA_SHIFT 0 /* DRC1R_ENA */
7609 * R3713 (0xE81) - DRC1 ctrl2
7611 #define ARIZONA_DRC1_ATK_MASK 0x1E00 /* DRC1_ATK - [12:9] */
7614 #define ARIZONA_DRC1_DCY_MASK 0x01E0 /* DRC1_DCY - [8:5] */
7617 #define ARIZONA_DRC1_MINGAIN_MASK 0x001C /* DRC1_MINGAIN - [4:2] */
7620 #define ARIZONA_DRC1_MAXGAIN_MASK 0x0003 /* DRC1_MAXGAIN - [1:0] */
7621 #define ARIZONA_DRC1_MAXGAIN_SHIFT 0 /* DRC1_MAXGAIN - [1:0] */
7622 #define ARIZONA_DRC1_MAXGAIN_WIDTH 2 /* DRC1_MAXGAIN - [1:0] */
7625 * R3714 (0xE82) - DRC1 ctrl3
7627 #define ARIZONA_DRC1_NG_MINGAIN_MASK 0xF000 /* DRC1_NG_MINGAIN - [15:12] */
7630 #define ARIZONA_DRC1_NG_EXP_MASK 0x0C00 /* DRC1_NG_EXP - [11:10] */
7633 #define ARIZONA_DRC1_QR_THR_MASK 0x0300 /* DRC1_QR_THR - [9:8] */
7636 #define ARIZONA_DRC1_QR_DCY_MASK 0x00C0 /* DRC1_QR_DCY - [7:6] */
7639 #define ARIZONA_DRC1_HI_COMP_MASK 0x0038 /* DRC1_HI_COMP - [5:3] */
7642 #define ARIZONA_DRC1_LO_COMP_MASK 0x0007 /* DRC1_LO_COMP - [2:0] */
7643 #define ARIZONA_DRC1_LO_COMP_SHIFT 0 /* DRC1_LO_COMP - [2:0] */
7644 #define ARIZONA_DRC1_LO_COMP_WIDTH 3 /* DRC1_LO_COMP - [2:0] */
7647 * R3715 (0xE83) - DRC1 ctrl4
7649 #define ARIZONA_DRC1_KNEE_IP_MASK 0x07E0 /* DRC1_KNEE_IP - [10:5] */
7652 #define ARIZONA_DRC1_KNEE_OP_MASK 0x001F /* DRC1_KNEE_OP - [4:0] */
7653 #define ARIZONA_DRC1_KNEE_OP_SHIFT 0 /* DRC1_KNEE_OP - [4:0] */
7654 #define ARIZONA_DRC1_KNEE_OP_WIDTH 5 /* DRC1_KNEE_OP - [4:0] */
7657 * R3716 (0xE84) - DRC1 ctrl5
7659 #define ARIZONA_DRC1_KNEE2_IP_MASK 0x03E0 /* DRC1_KNEE2_IP - [9:5] */
7662 #define ARIZONA_DRC1_KNEE2_OP_MASK 0x001F /* DRC1_KNEE2_OP - [4:0] */
7663 #define ARIZONA_DRC1_KNEE2_OP_SHIFT 0 /* DRC1_KNEE2_OP - [4:0] */
7664 #define ARIZONA_DRC1_KNEE2_OP_WIDTH 5 /* DRC1_KNEE2_OP - [4:0] */
7667 * R3721 (0xE89) - DRC2 ctrl1
7669 #define ARIZONA_DRC2_SIG_DET_RMS_MASK 0xF800 /* DRC2_SIG_DET_RMS - [15:11] */
7672 #define ARIZONA_DRC2_SIG_DET_PK_MASK 0x0600 /* DRC2_SIG_DET_PK - [10:9] */
7675 #define ARIZONA_DRC2_NG_ENA 0x0100 /* DRC2_NG_ENA */
7676 #define ARIZONA_DRC2_NG_ENA_MASK 0x0100 /* DRC2_NG_ENA */
7679 #define ARIZONA_DRC2_SIG_DET_MODE 0x0080 /* DRC2_SIG_DET_MODE */
7680 #define ARIZONA_DRC2_SIG_DET_MODE_MASK 0x0080 /* DRC2_SIG_DET_MODE */
7683 #define ARIZONA_DRC2_SIG_DET 0x0040 /* DRC2_SIG_DET */
7684 #define ARIZONA_DRC2_SIG_DET_MASK 0x0040 /* DRC2_SIG_DET */
7687 #define ARIZONA_DRC2_KNEE2_OP_ENA 0x0020 /* DRC2_KNEE2_OP_ENA */
7688 #define ARIZONA_DRC2_KNEE2_OP_ENA_MASK 0x0020 /* DRC2_KNEE2_OP_ENA */
7691 #define ARIZONA_DRC2_QR 0x0010 /* DRC2_QR */
7692 #define ARIZONA_DRC2_QR_MASK 0x0010 /* DRC2_QR */
7695 #define ARIZONA_DRC2_ANTICLIP 0x0008 /* DRC2_ANTICLIP */
7696 #define ARIZONA_DRC2_ANTICLIP_MASK 0x0008 /* DRC2_ANTICLIP */
7699 #define ARIZONA_DRC2L_ENA 0x0002 /* DRC2L_ENA */
7700 #define ARIZONA_DRC2L_ENA_MASK 0x0002 /* DRC2L_ENA */
7703 #define ARIZONA_DRC2R_ENA 0x0001 /* DRC2R_ENA */
7704 #define ARIZONA_DRC2R_ENA_MASK 0x0001 /* DRC2R_ENA */
7705 #define ARIZONA_DRC2R_ENA_SHIFT 0 /* DRC2R_ENA */
7709 * R3722 (0xE8A) - DRC2 ctrl2
7711 #define ARIZONA_DRC2_ATK_MASK 0x1E00 /* DRC2_ATK - [12:9] */
7714 #define ARIZONA_DRC2_DCY_MASK 0x01E0 /* DRC2_DCY - [8:5] */
7717 #define ARIZONA_DRC2_MINGAIN_MASK 0x001C /* DRC2_MINGAIN - [4:2] */
7720 #define ARIZONA_DRC2_MAXGAIN_MASK 0x0003 /* DRC2_MAXGAIN - [1:0] */
7721 #define ARIZONA_DRC2_MAXGAIN_SHIFT 0 /* DRC2_MAXGAIN - [1:0] */
7722 #define ARIZONA_DRC2_MAXGAIN_WIDTH 2 /* DRC2_MAXGAIN - [1:0] */
7725 * R3723 (0xE8B) - DRC2 ctrl3
7727 #define ARIZONA_DRC2_NG_MINGAIN_MASK 0xF000 /* DRC2_NG_MINGAIN - [15:12] */
7730 #define ARIZONA_DRC2_NG_EXP_MASK 0x0C00 /* DRC2_NG_EXP - [11:10] */
7733 #define ARIZONA_DRC2_QR_THR_MASK 0x0300 /* DRC2_QR_THR - [9:8] */
7736 #define ARIZONA_DRC2_QR_DCY_MASK 0x00C0 /* DRC2_QR_DCY - [7:6] */
7739 #define ARIZONA_DRC2_HI_COMP_MASK 0x0038 /* DRC2_HI_COMP - [5:3] */
7742 #define ARIZONA_DRC2_LO_COMP_MASK 0x0007 /* DRC2_LO_COMP - [2:0] */
7743 #define ARIZONA_DRC2_LO_COMP_SHIFT 0 /* DRC2_LO_COMP - [2:0] */
7744 #define ARIZONA_DRC2_LO_COMP_WIDTH 3 /* DRC2_LO_COMP - [2:0] */
7747 * R3724 (0xE8C) - DRC2 ctrl4
7749 #define ARIZONA_DRC2_KNEE_IP_MASK 0x07E0 /* DRC2_KNEE_IP - [10:5] */
7752 #define ARIZONA_DRC2_KNEE_OP_MASK 0x001F /* DRC2_KNEE_OP - [4:0] */
7753 #define ARIZONA_DRC2_KNEE_OP_SHIFT 0 /* DRC2_KNEE_OP - [4:0] */
7754 #define ARIZONA_DRC2_KNEE_OP_WIDTH 5 /* DRC2_KNEE_OP - [4:0] */
7757 * R3725 (0xE8D) - DRC2 ctrl5
7759 #define ARIZONA_DRC2_KNEE2_IP_MASK 0x03E0 /* DRC2_KNEE2_IP - [9:5] */
7762 #define ARIZONA_DRC2_KNEE2_OP_MASK 0x001F /* DRC2_KNEE2_OP - [4:0] */
7763 #define ARIZONA_DRC2_KNEE2_OP_SHIFT 0 /* DRC2_KNEE2_OP - [4:0] */
7764 #define ARIZONA_DRC2_KNEE2_OP_WIDTH 5 /* DRC2_KNEE2_OP - [4:0] */
7767 * R3776 (0xEC0) - HPLPF1_1
7769 #define ARIZONA_LHPF1_MODE 0x0002 /* LHPF1_MODE */
7770 #define ARIZONA_LHPF1_MODE_MASK 0x0002 /* LHPF1_MODE */
7773 #define ARIZONA_LHPF1_ENA 0x0001 /* LHPF1_ENA */
7774 #define ARIZONA_LHPF1_ENA_MASK 0x0001 /* LHPF1_ENA */
7775 #define ARIZONA_LHPF1_ENA_SHIFT 0 /* LHPF1_ENA */
7779 * R3777 (0xEC1) - HPLPF1_2
7781 #define ARIZONA_LHPF1_COEFF_MASK 0xFFFF /* LHPF1_COEFF - [15:0] */
7782 #define ARIZONA_LHPF1_COEFF_SHIFT 0 /* LHPF1_COEFF - [15:0] */
7783 #define ARIZONA_LHPF1_COEFF_WIDTH 16 /* LHPF1_COEFF - [15:0] */
7786 * R3780 (0xEC4) - HPLPF2_1
7788 #define ARIZONA_LHPF2_MODE 0x0002 /* LHPF2_MODE */
7789 #define ARIZONA_LHPF2_MODE_MASK 0x0002 /* LHPF2_MODE */
7792 #define ARIZONA_LHPF2_ENA 0x0001 /* LHPF2_ENA */
7793 #define ARIZONA_LHPF2_ENA_MASK 0x0001 /* LHPF2_ENA */
7794 #define ARIZONA_LHPF2_ENA_SHIFT 0 /* LHPF2_ENA */
7798 * R3781 (0xEC5) - HPLPF2_2
7800 #define ARIZONA_LHPF2_COEFF_MASK 0xFFFF /* LHPF2_COEFF - [15:0] */
7801 #define ARIZONA_LHPF2_COEFF_SHIFT 0 /* LHPF2_COEFF - [15:0] */
7802 #define ARIZONA_LHPF2_COEFF_WIDTH 16 /* LHPF2_COEFF - [15:0] */
7805 * R3784 (0xEC8) - HPLPF3_1
7807 #define ARIZONA_LHPF3_MODE 0x0002 /* LHPF3_MODE */
7808 #define ARIZONA_LHPF3_MODE_MASK 0x0002 /* LHPF3_MODE */
7811 #define ARIZONA_LHPF3_ENA 0x0001 /* LHPF3_ENA */
7812 #define ARIZONA_LHPF3_ENA_MASK 0x0001 /* LHPF3_ENA */
7813 #define ARIZONA_LHPF3_ENA_SHIFT 0 /* LHPF3_ENA */
7817 * R3785 (0xEC9) - HPLPF3_2
7819 #define ARIZONA_LHPF3_COEFF_MASK 0xFFFF /* LHPF3_COEFF - [15:0] */
7820 #define ARIZONA_LHPF3_COEFF_SHIFT 0 /* LHPF3_COEFF - [15:0] */
7821 #define ARIZONA_LHPF3_COEFF_WIDTH 16 /* LHPF3_COEFF - [15:0] */
7824 * R3788 (0xECC) - HPLPF4_1
7826 #define ARIZONA_LHPF4_MODE 0x0002 /* LHPF4_MODE */
7827 #define ARIZONA_LHPF4_MODE_MASK 0x0002 /* LHPF4_MODE */
7830 #define ARIZONA_LHPF4_ENA 0x0001 /* LHPF4_ENA */
7831 #define ARIZONA_LHPF4_ENA_MASK 0x0001 /* LHPF4_ENA */
7832 #define ARIZONA_LHPF4_ENA_SHIFT 0 /* LHPF4_ENA */
7836 * R3789 (0xECD) - HPLPF4_2
7838 #define ARIZONA_LHPF4_COEFF_MASK 0xFFFF /* LHPF4_COEFF - [15:0] */
7839 #define ARIZONA_LHPF4_COEFF_SHIFT 0 /* LHPF4_COEFF - [15:0] */
7840 #define ARIZONA_LHPF4_COEFF_WIDTH 16 /* LHPF4_COEFF - [15:0] */
7843 * R3808 (0xEE0) - ASRC_ENABLE
7845 #define ARIZONA_ASRC2L_ENA 0x0008 /* ASRC2L_ENA */
7846 #define ARIZONA_ASRC2L_ENA_MASK 0x0008 /* ASRC2L_ENA */
7849 #define ARIZONA_ASRC2R_ENA 0x0004 /* ASRC2R_ENA */
7850 #define ARIZONA_ASRC2R_ENA_MASK 0x0004 /* ASRC2R_ENA */
7853 #define ARIZONA_ASRC1L_ENA 0x0002 /* ASRC1L_ENA */
7854 #define ARIZONA_ASRC1L_ENA_MASK 0x0002 /* ASRC1L_ENA */
7857 #define ARIZONA_ASRC1R_ENA 0x0001 /* ASRC1R_ENA */
7858 #define ARIZONA_ASRC1R_ENA_MASK 0x0001 /* ASRC1R_ENA */
7859 #define ARIZONA_ASRC1R_ENA_SHIFT 0 /* ASRC1R_ENA */
7863 * R3810 (0xEE2) - ASRC_RATE1
7865 #define ARIZONA_ASRC_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */
7870 * R3811 (0xEE3) - ASRC_RATE2
7872 #define ARIZONA_ASRC_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */
7877 * R3824 (0xEF0) - ISRC 1 CTRL 1
7879 #define ARIZONA_ISRC1_FSH_MASK 0x7800 /* ISRC1_FSH - [14:11] */
7882 #define ARIZONA_ISRC1_CLK_SEL_MASK 0x0700 /* ISRC1_CLK_SEL - [10:8] */
7887 * R3825 (0xEF1) - ISRC 1 CTRL 2
7889 #define ARIZONA_ISRC1_FSL_MASK 0x7800 /* ISRC1_FSL - [14:11] */
7894 * R3826 (0xEF2) - ISRC 1 CTRL 3
7896 #define ARIZONA_ISRC1_INT0_ENA 0x8000 /* ISRC1_INT0_ENA */
7897 #define ARIZONA_ISRC1_INT0_ENA_MASK 0x8000 /* ISRC1_INT0_ENA */
7900 #define ARIZONA_ISRC1_INT1_ENA 0x4000 /* ISRC1_INT1_ENA */
7901 #define ARIZONA_ISRC1_INT1_ENA_MASK 0x4000 /* ISRC1_INT1_ENA */
7904 #define ARIZONA_ISRC1_INT2_ENA 0x2000 /* ISRC1_INT2_ENA */
7905 #define ARIZONA_ISRC1_INT2_ENA_MASK 0x2000 /* ISRC1_INT2_ENA */
7908 #define ARIZONA_ISRC1_INT3_ENA 0x1000 /* ISRC1_INT3_ENA */
7909 #define ARIZONA_ISRC1_INT3_ENA_MASK 0x1000 /* ISRC1_INT3_ENA */
7912 #define ARIZONA_ISRC1_DEC0_ENA 0x0200 /* ISRC1_DEC0_ENA */
7913 #define ARIZONA_ISRC1_DEC0_ENA_MASK 0x0200 /* ISRC1_DEC0_ENA */
7916 #define ARIZONA_ISRC1_DEC1_ENA 0x0100 /* ISRC1_DEC1_ENA */
7917 #define ARIZONA_ISRC1_DEC1_ENA_MASK 0x0100 /* ISRC1_DEC1_ENA */
7920 #define ARIZONA_ISRC1_DEC2_ENA 0x0080 /* ISRC1_DEC2_ENA */
7921 #define ARIZONA_ISRC1_DEC2_ENA_MASK 0x0080 /* ISRC1_DEC2_ENA */
7924 #define ARIZONA_ISRC1_DEC3_ENA 0x0040 /* ISRC1_DEC3_ENA */
7925 #define ARIZONA_ISRC1_DEC3_ENA_MASK 0x0040 /* ISRC1_DEC3_ENA */
7928 #define ARIZONA_ISRC1_NOTCH_ENA 0x0001 /* ISRC1_NOTCH_ENA */
7929 #define ARIZONA_ISRC1_NOTCH_ENA_MASK 0x0001 /* ISRC1_NOTCH_ENA */
7930 #define ARIZONA_ISRC1_NOTCH_ENA_SHIFT 0 /* ISRC1_NOTCH_ENA */
7934 * R3827 (0xEF3) - ISRC 2 CTRL 1
7936 #define ARIZONA_ISRC2_FSH_MASK 0x7800 /* ISRC2_FSH - [14:11] */
7939 #define ARIZONA_ISRC2_CLK_SEL_MASK 0x0700 /* ISRC2_CLK_SEL - [10:8] */
7944 * R3828 (0xEF4) - ISRC 2 CTRL 2
7946 #define ARIZONA_ISRC2_FSL_MASK 0x7800 /* ISRC2_FSL - [14:11] */
7951 * R3829 (0xEF5) - ISRC 2 CTRL 3
7953 #define ARIZONA_ISRC2_INT0_ENA 0x8000 /* ISRC2_INT0_ENA */
7954 #define ARIZONA_ISRC2_INT0_ENA_MASK 0x8000 /* ISRC2_INT0_ENA */
7957 #define ARIZONA_ISRC2_INT1_ENA 0x4000 /* ISRC2_INT1_ENA */
7958 #define ARIZONA_ISRC2_INT1_ENA_MASK 0x4000 /* ISRC2_INT1_ENA */
7961 #define ARIZONA_ISRC2_INT2_ENA 0x2000 /* ISRC2_INT2_ENA */
7962 #define ARIZONA_ISRC2_INT2_ENA_MASK 0x2000 /* ISRC2_INT2_ENA */
7965 #define ARIZONA_ISRC2_INT3_ENA 0x1000 /* ISRC2_INT3_ENA */
7966 #define ARIZONA_ISRC2_INT3_ENA_MASK 0x1000 /* ISRC2_INT3_ENA */
7969 #define ARIZONA_ISRC2_DEC0_ENA 0x0200 /* ISRC2_DEC0_ENA */
7970 #define ARIZONA_ISRC2_DEC0_ENA_MASK 0x0200 /* ISRC2_DEC0_ENA */
7973 #define ARIZONA_ISRC2_DEC1_ENA 0x0100 /* ISRC2_DEC1_ENA */
7974 #define ARIZONA_ISRC2_DEC1_ENA_MASK 0x0100 /* ISRC2_DEC1_ENA */
7977 #define ARIZONA_ISRC2_DEC2_ENA 0x0080 /* ISRC2_DEC2_ENA */
7978 #define ARIZONA_ISRC2_DEC2_ENA_MASK 0x0080 /* ISRC2_DEC2_ENA */
7981 #define ARIZONA_ISRC2_DEC3_ENA 0x0040 /* ISRC2_DEC3_ENA */
7982 #define ARIZONA_ISRC2_DEC3_ENA_MASK 0x0040 /* ISRC2_DEC3_ENA */
7985 #define ARIZONA_ISRC2_NOTCH_ENA 0x0001 /* ISRC2_NOTCH_ENA */
7986 #define ARIZONA_ISRC2_NOTCH_ENA_MASK 0x0001 /* ISRC2_NOTCH_ENA */
7987 #define ARIZONA_ISRC2_NOTCH_ENA_SHIFT 0 /* ISRC2_NOTCH_ENA */
7991 * R3830 (0xEF6) - ISRC 3 CTRL 1
7993 #define ARIZONA_ISRC3_FSH_MASK 0x7800 /* ISRC3_FSH - [14:11] */
7996 #define ARIZONA_ISRC3_CLK_SEL_MASK 0x0700 /* ISRC3_CLK_SEL - [10:8] */
8001 * R3831 (0xEF7) - ISRC 3 CTRL 2
8003 #define ARIZONA_ISRC3_FSL_MASK 0x7800 /* ISRC3_FSL - [14:11] */
8008 * R3832 (0xEF8) - ISRC 3 CTRL 3
8010 #define ARIZONA_ISRC3_INT0_ENA 0x8000 /* ISRC3_INT0_ENA */
8011 #define ARIZONA_ISRC3_INT0_ENA_MASK 0x8000 /* ISRC3_INT0_ENA */
8014 #define ARIZONA_ISRC3_INT1_ENA 0x4000 /* ISRC3_INT1_ENA */
8015 #define ARIZONA_ISRC3_INT1_ENA_MASK 0x4000 /* ISRC3_INT1_ENA */
8018 #define ARIZONA_ISRC3_INT2_ENA 0x2000 /* ISRC3_INT2_ENA */
8019 #define ARIZONA_ISRC3_INT2_ENA_MASK 0x2000 /* ISRC3_INT2_ENA */
8022 #define ARIZONA_ISRC3_INT3_ENA 0x1000 /* ISRC3_INT3_ENA */
8023 #define ARIZONA_ISRC3_INT3_ENA_MASK 0x1000 /* ISRC3_INT3_ENA */
8026 #define ARIZONA_ISRC3_DEC0_ENA 0x0200 /* ISRC3_DEC0_ENA */
8027 #define ARIZONA_ISRC3_DEC0_ENA_MASK 0x0200 /* ISRC3_DEC0_ENA */
8030 #define ARIZONA_ISRC3_DEC1_ENA 0x0100 /* ISRC3_DEC1_ENA */
8031 #define ARIZONA_ISRC3_DEC1_ENA_MASK 0x0100 /* ISRC3_DEC1_ENA */
8034 #define ARIZONA_ISRC3_DEC2_ENA 0x0080 /* ISRC3_DEC2_ENA */
8035 #define ARIZONA_ISRC3_DEC2_ENA_MASK 0x0080 /* ISRC3_DEC2_ENA */
8038 #define ARIZONA_ISRC3_DEC3_ENA 0x0040 /* ISRC3_DEC3_ENA */
8039 #define ARIZONA_ISRC3_DEC3_ENA_MASK 0x0040 /* ISRC3_DEC3_ENA */
8042 #define ARIZONA_ISRC3_NOTCH_ENA 0x0001 /* ISRC3_NOTCH_ENA */
8043 #define ARIZONA_ISRC3_NOTCH_ENA_MASK 0x0001 /* ISRC3_NOTCH_ENA */
8044 #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT 0 /* ISRC3_NOTCH_ENA */
8048 * R3840 (0xF00) - Clock Control
8050 #define ARIZONA_EXT_NG_SEL_CLR 0x0080 /* EXT_NG_SEL_CLR */
8051 #define ARIZONA_EXT_NG_SEL_CLR_MASK 0x0080 /* EXT_NG_SEL_CLR */
8054 #define ARIZONA_EXT_NG_SEL_SET 0x0040 /* EXT_NG_SEL_SET */
8055 #define ARIZONA_EXT_NG_SEL_SET_MASK 0x0040 /* EXT_NG_SEL_SET */
8058 #define ARIZONA_CLK_R_ENA_CLR 0x0020 /* CLK_R_ENA_CLR */
8059 #define ARIZONA_CLK_R_ENA_CLR_MASK 0x0020 /* CLK_R_ENA_CLR */
8062 #define ARIZONA_CLK_R_ENA_SET 0x0010 /* CLK_R_ENA_SET */
8063 #define ARIZONA_CLK_R_ENA_SET_MASK 0x0010 /* CLK_R_ENA_SET */
8066 #define ARIZONA_CLK_NG_ENA_CLR 0x0008 /* CLK_NG_ENA_CLR */
8067 #define ARIZONA_CLK_NG_ENA_CLR_MASK 0x0008 /* CLK_NG_ENA_CLR */
8070 #define ARIZONA_CLK_NG_ENA_SET 0x0004 /* CLK_NG_ENA_SET */
8071 #define ARIZONA_CLK_NG_ENA_SET_MASK 0x0004 /* CLK_NG_ENA_SET */
8074 #define ARIZONA_CLK_L_ENA_CLR 0x0002 /* CLK_L_ENA_CLR */
8075 #define ARIZONA_CLK_L_ENA_CLR_MASK 0x0002 /* CLK_L_ENA_CLR */
8078 #define ARIZONA_CLK_L_ENA_SET 0x0001 /* CLK_L_ENA_SET */
8079 #define ARIZONA_CLK_L_ENA_SET_MASK 0x0001 /* CLK_L_ENA_SET */
8080 #define ARIZONA_CLK_L_ENA_SET_SHIFT 0 /* CLK_L_ENA_SET */
8084 * R3841 (0xF01) - ANC SRC
8086 #define ARIZONA_IN_RXANCR_SEL_MASK 0x0070 /* IN_RXANCR_SEL - [4:6] */
8089 #define ARIZONA_IN_RXANCL_SEL_MASK 0x0007 /* IN_RXANCL_SEL - [0:2] */
8090 #define ARIZONA_IN_RXANCL_SEL_SHIFT 0 /* IN_RXANCL_SEL - [0:2] */
8091 #define ARIZONA_IN_RXANCL_SEL_WIDTH 3 /* IN_RXANCL_SEL - [0:2] */
8094 * R3863 (0xF17) - FCL ADC Reformatter Control
8096 #define ARIZONA_FCL_MIC_MODE_SEL 0x000C /* FCL_MIC_MODE_SEL - [2:3] */
8101 * R3954 (0xF72) - FCR ADC Reformatter Control
8103 #define ARIZONA_FCR_MIC_MODE_SEL 0x000C /* FCR_MIC_MODE_SEL - [2:3] */
8108 * R4352 (0x1100) - DSP1 Control 1
8110 #define ARIZONA_DSP1_RATE_MASK 0x7800 /* DSP1_RATE - [14:11] */
8113 #define ARIZONA_DSP1_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
8114 #define ARIZONA_DSP1_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
8117 #define ARIZONA_DSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
8118 #define ARIZONA_DSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
8121 #define ARIZONA_DSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
8122 #define ARIZONA_DSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
8125 #define ARIZONA_DSP1_START 0x0001 /* DSP1_START */
8126 #define ARIZONA_DSP1_START_MASK 0x0001 /* DSP1_START */
8127 #define ARIZONA_DSP1_START_SHIFT 0 /* DSP1_START */
8131 * R4353 (0x1101) - DSP1 Clocking 1
8133 #define ARIZONA_DSP1_CLK_SEL_MASK 0x0007 /* DSP1_CLK_SEL - [2:0] */
8134 #define ARIZONA_DSP1_CLK_SEL_SHIFT 0 /* DSP1_CLK_SEL - [2:0] */
8135 #define ARIZONA_DSP1_CLK_SEL_WIDTH 3 /* DSP1_CLK_SEL - [2:0] */
8138 * R4356 (0x1104) - DSP1 Status 1
8140 #define ARIZONA_DSP1_RAM_RDY 0x0001 /* DSP1_RAM_RDY */
8141 #define ARIZONA_DSP1_RAM_RDY_MASK 0x0001 /* DSP1_RAM_RDY */
8142 #define ARIZONA_DSP1_RAM_RDY_SHIFT 0 /* DSP1_RAM_RDY */
8146 * R4357 (0x1105) - DSP1 Status 2
8148 #define ARIZONA_DSP1_PING_FULL 0x8000 /* DSP1_PING_FULL */
8149 #define ARIZONA_DSP1_PING_FULL_MASK 0x8000 /* DSP1_PING_FULL */
8152 #define ARIZONA_DSP1_PONG_FULL 0x4000 /* DSP1_PONG_FULL */
8153 #define ARIZONA_DSP1_PONG_FULL_MASK 0x4000 /* DSP1_PONG_FULL */
8156 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK 0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
8157 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
8158 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */