include/linux/hp_sdc.h

2  * HP i8042 System Device Controller -- header
10  * 1. Redistributions of source code must retain the above copyright
31  * HP-HIL Technical Reference Manual.  Hewlett Packard Product No. 45918A
34  * 	for Part Number 1820-4784 Revision B.  Dwg No. A-1820-4784-2
104 #define HP_SDC_STATUS_PUP	0x70	/* Successful power-up self test */
134 #define HP_SDC_STR		0x7f    /* i8042 self-test result */
146 #define HP_SDC_CFG_ROLLOVER	0x08	/* WTF is "N-key rollover"? */
149 #define HP_SDC_CFG_KBD_OLD	0x03	/* keyboard code for non-HIL */
150 #define HP_SDC_CFG_KBD_NEW	0x07	/* keyboard code from HIL autoconfig */
151 #define HP_SDC_CFG_REV		0x40	/* Code revision bit */
164 #define HP_SDC_XTD_REV		0x07	/* contains revision code */
167 	case 0x1: str = "1820-3712"; break;		\
168 	case 0x2: str = "1820-4379"; break;		\
169 	case 0x3: str = "1820-4784"; break;		\
173 #define HP_SDC_XTD_BBRTC	0x20	/* OKI MSM-58321 BBRTC present */
187 #define HP_SDC_CMD_READ_RAM	0x00	/* Load from i8042 RAM (autoinc) */
190 #define HP_SDC_CMD_READ_KCC	0x11	/* Load primary kbd config code */
191 #define HP_SDC_CMD_READ_KLC	0x12	/* Load primary kbd language code */
197 #define HP_SDC_CMD_READ_D0	0xf0	/* Load from i8042 RAM location 0x70 */
198 #define HP_SDC_CMD_READ_D1	0xf1	/* Load from i8042 RAM location 0x71 */
199 #define HP_SDC_CMD_READ_D2	0xf2	/* Load from i8042 RAM location 0x72 */
200 #define HP_SDC_CMD_READ_D3	0xf3	/* Load from i8042 RAM location 0x73 */
201 #define HP_SDC_CMD_READ_VT1	0xf4	/* Load from i8042 RAM location 0x74 */
202 #define HP_SDC_CMD_READ_VT2	0xf5	/* Load from i8042 RAM location 0x75 */
203 #define HP_SDC_CMD_READ_VT3	0xf6	/* Load from i8042 RAM location 0x76 */
204 #define HP_SDC_CMD_READ_VT4	0xf7	/* Load from i8042 RAM location 0x77 */
205 #define HP_SDC_CMD_READ_KBN	0xf8	/* Load from i8042 RAM location 0x78 */
206 #define HP_SDC_CMD_READ_KBC	0xf9	/* Load from i8042 RAM location 0x79 */
207 #define HP_SDC_CMD_READ_LPS	0xfa	/* Load from i8042 RAM location 0x7a */
208 #define HP_SDC_CMD_READ_LPC	0xfb	/* Load from i8042 RAM location 0x7b */
209 #define HP_SDC_CMD_READ_RSV	0xfc	/* Load from i8042 RAM location 0x7c */
210 #define HP_SDC_CMD_READ_LPR	0xfd	/* Load from i8042 RAM location 0x7d */
211 #define HP_SDC_CMD_READ_XTD	0xfe	/* Load from i8042 RAM location 0x7e */
212 #define HP_SDC_CMD_READ_STR	0xff	/* Load from i8042 RAM location 0x7f */
225 #define HP_SDC_CMD_SET_D0	0xe0	/* Load to i8042 RAM location 0x70 */
226 #define HP_SDC_CMD_SET_D1	0xe1	/* Load to i8042 RAM location 0x71 */
227 #define HP_SDC_CMD_SET_D2	0xe2	/* Load to i8042 RAM location 0x72 */
228 #define HP_SDC_CMD_SET_D3	0xe3	/* Load to i8042 RAM location 0x73 */
229 #define HP_SDC_CMD_SET_VT1	0xe4	/* Load to i8042 RAM location 0x74 */
230 #define HP_SDC_CMD_SET_VT2	0xe5	/* Load to i8042 RAM location 0x75 */
231 #define HP_SDC_CMD_SET_VT3	0xe6	/* Load to i8042 RAM location 0x76 */
232 #define HP_SDC_CMD_SET_VT4	0xe7	/* Load to i8042 RAM location 0x77 */
233 #define HP_SDC_CMD_SET_KBN	0xe8	/* Load to i8042 RAM location 0x78 */
234 #define HP_SDC_CMD_SET_KBC	0xe9	/* Load to i8042 RAM location 0x79 */
235 #define HP_SDC_CMD_SET_LPS	0xea	/* Load to i8042 RAM location 0x7a */
236 #define HP_SDC_CMD_SET_LPC	0xeb	/* Load to i8042 RAM location 0x7b */
237 #define HP_SDC_CMD_SET_RSV	0xec	/* Load to i8042 RAM location 0x7c */
238 #define HP_SDC_CMD_SET_LPR	0xed	/* Load to i8042 RAM location 0x7d */
239 #define HP_SDC_CMD_SET_XTD	0xee	/* Load to i8042 RAM location 0x7e */
240 #define HP_SDC_CMD_SET_STR	0xef	/* Load to i8042 RAM location 0x7f */
242 #define HP_SDC_CMD_DO_RTCW	0xc2	/* i8042 RAM 0x70 --> RTC */
243 #define HP_SDC_CMD_DO_RTCR	0xc3	/* RTC[0x70 0:3] --> irq/status/data */
244 #define HP_SDC_CMD_DO_BEEP	0xc4	/* i8042 RAM 0x70-74  --> beeper,VT3 */
245 #define HP_SDC_CMD_DO_HIL	0xc5	/* i8042 RAM 0x70-73 -->
254 #define HP_SDC_HIL_RC_DONE	0x80	/* i8042 auto-configured loop */
257 #define HP_SDC_HIL_RC		0x84	/* i8042 is auto-configuring loop */
268 	unsigned long	base_io, status_io, data_io; /* Our IO ports */
275 	uint8_t		r7[4];          /* current i8042[0x70 - 0x74] values */