Lines Matching defs:SRC
102 #define BPF_ALU64_REG_OFF(OP, DST, SRC, OFF) \
106 .src_reg = SRC, \
110 #define BPF_ALU64_REG(OP, DST, SRC) \
111 BPF_ALU64_REG_OFF(OP, DST, SRC, 0)
113 #define BPF_ALU32_REG_OFF(OP, DST, SRC, OFF) \
117 .src_reg = SRC, \
121 #define BPF_ALU32_REG(OP, DST, SRC) \
122 BPF_ALU32_REG_OFF(OP, DST, SRC, 0)
168 #define BPF_MOV64_REG(DST, SRC) \
172 .src_reg = SRC, \
176 #define BPF_MOV32_REG(DST, SRC) \
180 .src_reg = SRC, \
190 #define BPF_MOV64_PERCPU_REG(DST, SRC) \
194 .src_reg = SRC, \
223 #define BPF_MOVSX64_REG(DST, SRC, OFF) \
227 .src_reg = SRC, \
231 #define BPF_MOVSX32_REG(DST, SRC, OFF) \
235 .src_reg = SRC, \
267 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \
271 .src_reg = SRC, \
287 #define BPF_MOV64_RAW(TYPE, DST, SRC, IMM) \
291 .src_reg = SRC, \
295 #define BPF_MOV32_RAW(TYPE, DST, SRC, IMM) \
299 .src_reg = SRC, \
315 #define BPF_LD_IND(SIZE, SRC, IMM) \
319 .src_reg = SRC, \
325 #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \
329 .src_reg = SRC, \
335 #define BPF_LDX_MEMSX(SIZE, DST, SRC, OFF) \
339 .src_reg = SRC, \
345 #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \
349 .src_reg = SRC, \
369 #define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF) \
373 .src_reg = SRC, \
378 #define BPF_STX_XADD(SIZE, DST, SRC, OFF) BPF_ATOMIC_OP(SIZE, BPF_ADD, DST, SRC, OFF)
392 #define BPF_JMP_REG(OP, DST, SRC, OFF) \
396 .src_reg = SRC, \
412 #define BPF_JMP32_REG(OP, DST, SRC, OFF) \
416 .src_reg = SRC, \
474 #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \
478 .src_reg = SRC, \