Lines Matching +full:mixed +full:- +full:burst
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
96 * it is to be repeated and other per-transfer attributes.
103 * | Frame-1 | Frame-2 | ~ | Frame-'numf' |
111 * struct data_chunk - Element of scatter-gather list that makes a frame.
133 * struct dma_interleaved_template - Template to convey DMAC the transfer pattern
164 * struct dma_vec - DMA vector
174 * enum dma_ctrl_flags - DMA flags to augment operation preparation,
176 * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
178 * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client
181 * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q
182 * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P
183 * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as
186 * @DMA_PREP_FENCE - tell the driver that subsequent operations depend
218 * enum sum_check_bits - bit position of pq_check_flags
226 * enum pq_check_flags - result of async_{xor,pq}_zero_sum operations
227 * @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise
228 * @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise
237 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
243 * enum dma_desc_metadata_mode - per descriptor metadata mode types supported
244 * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the
249 * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
255 * - DMA_DEV_TO_MEM:
263 * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA
274 * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
282 * - DMA_DEV_TO_MEM:
299 * struct dma_chan_percpu - the per-CPU part of struct dma_chan
310 * struct dma_router - DMA router structure
320 * struct dma_chan - devices supply DMA channels, clients use them
331 * @local: per-cpu pointer to a struct dma_chan_percpu
333 * @table_count: number of appearances in the mem-to-mem allocation table
336 * @private: private data for certain client-channel associations
365 * struct dma_chan_dev - relate sysfs device node to backing channel device
369 * @chan_dma_dev: The channel is using custom/different dma-mapping
380 * enum dma_slave_buswidth - defines bus width of the DMA slave
397 * struct dma_slave_config - dma slave channel runtime config
417 * in one burst to the device. Typically something like half the
463 * enum dma_residue_granularity - Granularity of the reported transfer residue
473 * the hardware supports scatter-gather and the segment descriptor has a field
477 * burst. This is typically only supported if the hardware has a progress
489 * struct dma_slave_caps - expose capabilities of a slave channel only
498 * @min_burst: min burst capability per-transfer
499 * @max_burst: max burst capability per-transfer
500 * @max_sg_burst: max number of SG list entries executed in a single burst
527 return dev_name(&chan->dev->device); in dma_chan_name()
531 * typedef dma_filter_fn - callback filter for dma_request_channel
537 * being returned. Where 'suitable' indicates a non-busy channel that
588 * struct dma_async_tx_descriptor - async transaction descriptor
589 * ---dma generic offload fields---
590 * @cookie: tracking cookie for this transaction, set to -EBUSY if
600 * @desc_metadata_mode: core managed metadata mode to protect mixed use of
605 * ---async_tx api specific fields---
634 kref_get(&unmap->kref); in dma_set_unmap()
635 tx->unmap = unmap; in dma_set_unmap()
658 if (!tx->unmap) in dma_descriptor_unmap()
661 dmaengine_unmap_put(tx->unmap); in dma_descriptor_unmap()
662 tx->unmap = NULL; in dma_descriptor_unmap()
694 spin_lock_bh(&txd->lock); in txd_lock()
698 spin_unlock_bh(&txd->lock); in txd_unlock()
702 txd->next = next; in txd_chain()
703 next->parent = txd; in txd_chain()
707 txd->parent = NULL; in txd_clear_parent()
711 txd->next = NULL; in txd_clear_next()
715 return txd->parent; in txd_parent()
719 return txd->next; in txd_next()
724 * struct dma_tx_state - filled in to report the status of
741 * enum dmaengine_alignment - defines alignment of the DMA async tx
757 * struct dma_slave_map - associates slave device and it's slave channel with
770 * struct dma_filter - information for slave device/channel to filter_fn/param
783 * struct dma_device - info on the entity supplying DMA services
793 * @max_pq: maximum number of PQ sources and PQ-continue capability
810 * @min_burst: min burst capability per-transfer
811 * @max_burst: max burst capability per-transfer
812 * @max_sg_burst: max number of SG list entries executed in a single burst
837 * with per-channel specific ones
962 if (chan->device->device_config) in dmaengine_slave_config()
963 return chan->device->device_config(chan, config); in dmaengine_slave_config()
965 return -ENOSYS; in dmaengine_slave_config()
983 if (!chan || !chan->device || !chan->device->device_prep_slave_sg) in dmaengine_prep_slave_single()
986 return chan->device->device_prep_slave_sg(chan, &sg, 1, in dmaengine_prep_slave_single()
991 * dmaengine_prep_peripheral_dma_vec() - Prepare a DMA scatter-gather descriptor
1002 if (!chan || !chan->device || !chan->device->device_prep_peripheral_dma_vec) in dmaengine_prep_peripheral_dma_vec()
1005 return chan->device->device_prep_peripheral_dma_vec(chan, vecs, nents, in dmaengine_prep_peripheral_dma_vec()
1013 if (!chan || !chan->device || !chan->device->device_prep_slave_sg) in dmaengine_prep_slave_sg()
1016 return chan->device->device_prep_slave_sg(chan, sgl, sg_len, in dmaengine_prep_slave_sg()
1027 if (!chan || !chan->device || !chan->device->device_prep_slave_sg) in dmaengine_prep_rio_sg()
1030 return chan->device->device_prep_slave_sg(chan, sgl, sg_len, in dmaengine_prep_rio_sg()
1040 if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic) in dmaengine_prep_dma_cyclic()
1043 return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, in dmaengine_prep_dma_cyclic()
1051 if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma) in dmaengine_prep_interleaved_dma()
1054 !test_bit(DMA_REPEAT, chan->device->cap_mask.bits)) in dmaengine_prep_interleaved_dma()
1057 return chan->device->device_prep_interleaved_dma(chan, xt, flags); in dmaengine_prep_interleaved_dma()
1061 * dmaengine_prep_dma_memset() - Prepare a DMA memset descriptor.
1072 if (!chan || !chan->device || !chan->device->device_prep_dma_memset) in dmaengine_prep_dma_memset()
1075 return chan->device->device_prep_dma_memset(chan, dest, value, in dmaengine_prep_dma_memset()
1083 if (!chan || !chan->device || !chan->device->device_prep_dma_memcpy) in dmaengine_prep_dma_memcpy()
1086 return chan->device->device_prep_dma_memcpy(chan, dest, src, in dmaengine_prep_dma_memcpy()
1096 return !!(chan->device->desc_metadata_modes & mode); in dmaengine_is_metadata_mode_supported()
1110 return -EINVAL; in dmaengine_desc_attach_metadata()
1121 return -EINVAL; in dmaengine_desc_set_metadata_len()
1126 * dmaengine_terminate_all() - Terminate all active DMA transfers
1134 if (chan->device->device_terminate_all) in dmaengine_terminate_all()
1135 return chan->device->device_terminate_all(chan); in dmaengine_terminate_all()
1137 return -ENOSYS; in dmaengine_terminate_all()
1141 * dmaengine_terminate_async() - Terminate all active DMA transfers
1163 if (chan->device->device_terminate_all) in dmaengine_terminate_async()
1164 return chan->device->device_terminate_all(chan); in dmaengine_terminate_async()
1166 return -EINVAL; in dmaengine_terminate_async()
1170 * dmaengine_synchronize() - Synchronize DMA channel termination
1183 * This function must only be called from non-atomic context and must not be
1191 if (chan->device->device_synchronize) in dmaengine_synchronize()
1192 chan->device->device_synchronize(chan); in dmaengine_synchronize()
1196 * dmaengine_terminate_sync() - Terminate all active DMA transfers
1205 * This function must only be called from non-atomic context and must not be
1224 if (chan->device->device_pause) in dmaengine_pause()
1225 return chan->device->device_pause(chan); in dmaengine_pause()
1227 return -ENOSYS; in dmaengine_pause()
1232 if (chan->device->device_resume) in dmaengine_resume()
1233 return chan->device->device_resume(chan); in dmaengine_resume()
1235 return -ENOSYS; in dmaengine_resume()
1241 return chan->device->device_tx_status(chan, cookie, state); in dmaengine_tx_status()
1246 return desc->tx_submit(desc); in dmaengine_submit()
1252 return !(((1 << align) - 1) & (off1 | off2 | len)); in dmaengine_check_align()
1258 return dmaengine_check_align(dev->copy_align, off1, off2, len); in is_dma_copy_aligned()
1264 return dmaengine_check_align(dev->xor_align, off1, off2, len); in is_dma_xor_aligned()
1270 return dmaengine_check_align(dev->pq_align, off1, off2, len); in is_dma_pq_aligned()
1276 return dmaengine_check_align(dev->fill_align, off1, off2, len); in is_dma_fill_aligned()
1282 dma->max_pq = maxpq; in dma_set_maxpq()
1284 dma->max_pq |= DMA_HAS_PQ_CONTINUE; in dma_set_maxpq()
1301 return (dma->max_pq & DMA_HAS_PQ_CONTINUE) == DMA_HAS_PQ_CONTINUE; in dma_dev_has_pq_continue()
1306 return dma->max_pq & ~DMA_HAS_PQ_CONTINUE; in dma_dev_to_maxpq()
1309 /* dma_maxpq - reduce maxpq in the face of continued operations
1310 * @dma - dma device with PQ capability
1311 * @flags - to check if DMA_PREP_CONTINUE and DMA_PREP_PQ_DISABLE_P are set
1327 return dma_dev_to_maxpq(dma) - 1; in dma_maxpq()
1329 return dma_dev_to_maxpq(dma) - 3; in dma_maxpq()
1349 return dmaengine_get_icg(xt->dst_inc, xt->dst_sgl, in dmaengine_get_dst_icg()
1350 chunk->icg, chunk->dst_icg); in dmaengine_get_dst_icg()
1356 return dmaengine_get_icg(xt->src_inc, xt->src_sgl, in dmaengine_get_src_icg()
1357 chunk->icg, chunk->src_icg); in dmaengine_get_src_icg()
1360 /* --- public DMA engine API --- */
1400 tx->flags |= DMA_CTRL_ACK; in async_tx_ack()
1405 tx->flags &= ~DMA_CTRL_ACK; in async_tx_clear_ack()
1410 return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; in async_tx_test_ack()
1417 set_bit(tx_type, dstp->bits); in __dma_cap_set()
1424 clear_bit(tx_type, dstp->bits); in __dma_cap_clear()
1430 bitmap_zero(dstp->bits, DMA_TX_TYPE_END); in __dma_cap_zero()
1437 return test_bit(tx_type, srcp->bits); in __dma_has_cap()
1444 * dma_async_issue_pending - flush pending transactions to HW
1452 chan->device->device_issue_pending(chan); in dma_async_issue_pending()
1456 * dma_async_is_tx_complete - poll for transaction completion
1464 * the status of multiple cookies without re-checking hardware state.
1472 status = chan->device->device_tx_status(chan, cookie, &state); in dma_async_is_tx_complete()
1481 * dma_async_is_complete - test a cookie against chan state
1508 st->last = last; in dma_set_tx_state()
1509 st->used = used; in dma_set_tx_state()
1510 st->residue = residue; in dma_set_tx_state()
1553 return ERR_PTR(-ENODEV); in dma_request_chan()
1558 return ERR_PTR(-ENODEV); in dma_request_chan_by_mask()
1566 return -ENXIO; in dma_get_slave_caps()
1575 ret = dma_get_slave_caps(tx->chan, &caps); in dmaengine_desc_set_reuse()
1580 return -EPERM; in dmaengine_desc_set_reuse()
1582 tx->flags |= DMA_CTRL_REUSE; in dmaengine_desc_set_reuse()
1588 tx->flags &= ~DMA_CTRL_REUSE; in dmaengine_desc_clear_reuse()
1593 return (tx->flags & DMA_CTRL_REUSE) == DMA_CTRL_REUSE; in dmaengine_desc_test_reuse()
1600 return -EPERM; in dmaengine_desc_free()
1602 return desc->desc_free(desc); in dmaengine_desc_free()
1605 /* --- DMA device --- */
1664 if (chan->dev->chan_dma_dev) in dmaengine_get_dma_device()
1665 return &chan->dev->device; in dmaengine_get_dma_device()
1667 return chan->device->dev; in dmaengine_get_dma_device()