Lines Matching +full:dma +full:- +full:write

1 /* SPDX-License-Identifier: GPL-2.0 */
3  * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
30  * struct dw_edma_core_ops - platform-specific eDMA methods
32  *			method accepts the channel id in the end-to-end
33  *			numbering with the eDMA write channels being placed
56  * enum dw_edma_chip_flags - Flags specific to an eDMA chip
64  * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
67  * @nr_irqs:		 total number of DMA IRQs
68  * @ops			 DMA channel to IRQ number mapping
70  * @reg_base		 DMA register base address
71  * @ll_wr_cnt		 DMA write link list count
72  * @ll_rd_cnt		 DMA read link list count
73  * @rg_region		 DMA register region
74  * @ll_region_wr	 DMA descriptor link list memory for write channel
75  * @ll_region_rd	 DMA descriptor link list memory for read channel
76  * @dt_region_wr	 DMA data memory for write channel
77  * @dt_region_rd	 DMA data memory for read channel
78  * @mf			 DMA register map format
111 	return -ENODEV;  in dw_edma_probe()